JP3394788B2 - Frequency discriminator - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a frequency discriminator for detecting a difference between a carrier frequency of a modulated wave and a reference carrier frequency for demodulation in a device for demodulating a quadrature amplitude modulated wave.

[0002]

2. Description of the Related Art In recent years, in a digital radio transmission system, a multilevel transmission system based on a quadrature amplitude modulation system, which is advantageous in terms of effective use of radio frequencies and the like, is often used. The multilevel number of such a modulation system is the transmission capacity. And the demand for improved performance is increasing more and more. However, with such an increase in the number of multivalues, the accuracy of signal arrangement on the signal space diagram (hereinafter, simply referred to as “signal space”) of the modulated wave is required more strictly, and if the accuracy is not sufficient, For example, drift, pseudo pull-in, and other obstacles occur during demodulation.

In order to avoid such obstacles and construct a stable transmission system, compensation of transmission path distortion, correction of discriminator drift, equalization of fading, compensation of interference noise, and other techniques are indispensable. is there. However, these techniques cannot be realized unless the frequency of the reference carrier signal used during demodulation matches the carrier frequency of the modulated wave (received wave) with high accuracy. An automatic frequency control circuit that absorbs the above-described difference with a certain accuracy by sequentially variably controlling the frequency of the signal to an appropriate value is provided, and the circuit is provided with a frequency discriminator that gives a reference for such control.

FIG. 15 is a diagram showing a configuration example of a conventional frequency discriminator. In the figure, the output of the quadrature detector 150 that detects the received signal converted to the predetermined intermediate frequency is 2
Two orthogonal baseband signals I and Q are obtained, and these signals are given to the inputs of A / D converters 151 ₁ and 151 ₂ , respectively. The output of the A / D converter 151 ₁ is bisected and connected to the multiplicand inputs of the multipliers 152 ₁ and 152 ₂ , and the output of the A / D converter 151 ₂ is multiplied by the multipliers 152 ₁ and 1 2.
Connected in halves to the multiplicand input of 52 ₂ . Multiplier 15
The output of 2 ₁ is connected to the minuend input of subtractor 153, and the output of multiplier 152 ₂ is connected to the subtraction input of subtractor 153. The output of the subtractor 153 is the latch circuit (FF) 154.
Of the latch circuit 154, and the output of the latch circuit 154 is connected to the minuend input of the subtractor 155. The output of the subtractor 155 is connected via the integrator 156 to the control input of the automatic frequency control circuit arranged in the subsequent stage.

In the frequency discriminator having such a configuration, the received signal is 4-phase PSK-modulated by the transmission information, and as shown in FIG. 16, on the time axis marked by the clock synchronized with each bit of the transmission information, The demodulated signal of the received wave at time t _n (hereinafter referred to as “symbol”) is indicated by the signal point r _n indicated by the coordinates (i (t _n ), q (t _n )) on the signal space, and If the original signal point of the signal points is the signal point R ₁ indicated by the coordinates (i ₀ (t _n ), q ₀ (t _n )) on the same signal space,
Generally, the polarities i _d (t _n ) and q _d (t _n ) corresponding to the axes I and Q of the signal space of the error indicated by the difference between these coordinates are used for the carrier of the received signal and at the time of demodulation. The phase difference Δθ (t _n ) from the reference carrier is

[0006]

[Equation 1]

It is given by the equation: Further, the frequency component Δf of such an error is Δf (t _n ) = Δθ (t _n ) −Δθ (t) with respect to the time t _n−1 , which is carved with the clock preceding at time t _n on the time axis. _n-1 ) is given by the equation.

The multiplier 152 ₁ is an A / D converter 15
The value of the first term on the right-hand side of the above equation is calculated for each clock cycle described above from each symbol digitally converted by 1 ₁ and 151 ₂ . The multiplier 152 ₂ calculates the right-hand side value of the second term of the above equation in a similar manner. The subtractor 153 calculates the phase difference Δθ shown in the above equation from each term thus obtained.
The subtractor 155 obtains the difference between the phase difference value newly given from the subtractor 153 and the preceding phase difference value Δθ (t _n−1 ) accumulated in the storage circuit 154, and is expressed by an equation. The frequency component Δf is calculated. The integrator 156 is configured by using a counter or an accumulator, and integrates the frequency components obtained in this way to obtain the average value of the frequency deviation of the reference carrier wave for demodulation with respect to the carrier wave frequency of the received signal to obtain the automatic frequency. Give to the control circuit.

[0009]

By the way, in such a conventional frequency discriminator, for example, as shown in FIG. 17, a received signal is demodulated at time t ₁ and at time t ₂ subsequent to that time, respectively. If the signal points (i (t ₁ ), q (t ₁ )) and (i (t ₂ ), q (t ₂ )) of the obtained symbols are located on the opposite sides of each other via the Q axis, , The phase difference at these times has different signs as shown by the inequality of Δθ (t ₁ )> 0 Δθ (t ₂ ) <0, and the frequency component obtained from such phase difference is Δf ( As shown by the equation of t ₂ ) = Δθ (t ₂ ) −Δθ (t ₁ ) <0, since the sign is given by the inverted value, a large error occurs in the frequency deviation of the reference carrier wave to be obtained. Further, such an error similarly occurs in the I-axis on the signal space, and is not limited to the case of the four-phase PSK modulation system, but is similar to the case of the quadrature modulation system having a large multi-valued number such as 16QAM. Occurs in

When a multi-valued quadrature amplitude modulation method such as 16QAM is used, the amplitude component of the received signal changes according to the transmission information, and the signal from the origin of the signal space to the signal point corresponding to the signal is changed. Since the linear distance also changes, an error occurs in the phase difference calculated by the above equation, and the accuracy of the frequency deviation of the reference carrier wave deteriorates.

An object of the present invention is to provide a frequency discriminator capable of accurately obtaining the frequency deviation of the demodulation reference carrier wave from the carrier wave of the received signal regardless of the amplitude phase modulation method.

[0012]

FIG. 1 is a block diagram showing the principle of the invention described in claim 1. In FIG. According to the present invention, for each symbol obtained by demodulating a quadrature amplitude modulation wave and digitally converting it, from the coordinates of the signal point indicating the symbol in the signal space, the codes i _d and q _{d of the} coordinates and the original signal point are calculated. calculated and an error i _e, q _e with respect to the coordinate, and _{Δθ = i d × q e -i} e
The phase error Δθ of the reference carrier wave signal for demodulation with respect to the carrier wave signal of the quadrature amplitude modulation wave by the arithmetic operation shown in the equation of × q _d.
Phase error detecting means 11 for obtaining
In the frequency discriminator including the frequency deviation detecting means 13 for calculating the frequency deviation of the reference carrier signal with respect to the carrier signal by differentiating the phase error Δθ obtained by 1 in the time for giving the timing of digital conversion. Limiting means 15 for limiting the frequency deviation obtained by the following to an upper limit value or less corresponding to the accuracy of the reference carrier signal.
It is characterized by having.

FIG. 2 is a block diagram of the principle of the invention described in claim 2. According to the present invention, for each symbol obtained by demodulating a quadrature amplitude modulation wave and digitally converting it, from the coordinates of the signal point indicating the symbol in the signal space, the codes i _d and q _{d of the} coordinates and the original signal point are calculated. Error for coordinates i _e , q _e
Seeking the door, and _{Δθ = i d × q e -i} e × phase error detection means 11 by arithmetic operation shown in the equation q _d determine the phase error [Delta] [theta] of the reference carrier signal for demodulation for carrier signal quadrature amplitude modulated wave And a frequency deviation detecting means 13 for differentiating the phase error Δθ obtained by the phase error detecting means 11 with respect to a time for giving a timing of digital conversion to obtain a frequency deviation of the reference carrier wave signal with respect to the carrier wave signal. , In the signal space, in any of the prohibited area and other areas sandwiched between a virtual straight line obtained by rotating each axis bidirectionally around the origin by a predetermined angle and the axis,
It is characterized by further comprising output control means 21 for judging whether or not the signal point of the symbol is located based on the coordinates, and thinning out and outputting the frequency deviation obtained by the frequency deviation detecting means 13 according to the result of the judgment. To do.

FIG. 3 is a block diagram showing the principle of the invention described in claim 3. According to the present invention, for each symbol obtained by demodulating a quadrature amplitude modulation wave and digitally converting it, from the coordinates of the signal point indicating the symbol in the signal space, the codes i _d and q _{d of the} coordinates and the original signal point are calculated. Error for coordinates i _e , q _e
Seeking the door, and _{Δθ = i d × q e -i} e × phase error detection means 11 by arithmetic operation shown in the equation q _d determine the phase error [Delta] [theta] of the reference carrier signal for demodulation for carrier signal quadrature amplitude modulated wave And a frequency deviation detecting means 13 for differentiating the phase error Δθ obtained by the phase error detecting means 11 with respect to a time for giving a timing of digital conversion to obtain a frequency deviation of the reference carrier wave signal with respect to the carrier wave signal. , The sign of the phase error Δθ obtained by the phase error detecting means 11 and the sign of the phase error similarly obtained prior to the deviation thereof are determined, and determined by the frequency deviation detecting means 13 according to the result of the determination. It is characterized in that it is provided with an output control means 31 for thinning out and outputting the obtained frequency deviation.

FIG. 4 is a block diagram showing the principle of the invention described in claim 4. According to the present invention, for each symbol obtained by demodulating a quadrature amplitude modulation wave and digitally converting it, from the coordinates of the signal point indicating the symbol in the signal space, the codes i _d and q _{d of the} coordinates and the original signal point are calculated. Error for coordinates i _e , q _e
Seeking the door, and _{Δθ = i d × q e -i} e × phase error detection means 11 by arithmetic operation shown in the equation q _d determine the phase error [Delta] [theta] of the reference carrier signal for demodulation for carrier signal quadrature amplitude modulated wave And a frequency deviation detecting means 13 for differentiating the phase error Δθ obtained by the phase error detecting means 11 with respect to a time for giving a timing of digital conversion to obtain a frequency deviation of the reference carrier wave signal with respect to the carrier wave signal. , In the signal space, it is determined whether the signal point of the symbol is located in the area showing the allowable range of the phase error Δθ in the vicinity of each signal point having the same straight line distance from the origin, or in the other area. The output control means 41 for thinning out and outputting the frequency deviation determined by the frequency deviation detecting means 13 in accordance with the above is provided.

FIG. 5 is a block diagram showing the principle of the invention described in claim 5. According to the present invention, for each symbol obtained by demodulating a quadrature amplitude modulation wave and digitally converting it, from the coordinates of the signal point indicating the symbol in the signal space, the codes i _d and q _{d of the} coordinates and the original signal point are calculated. Error for coordinates i _e , q _e
Seeking the door, and _{Δθ = i d × q e -i} e × phase error detection means 51 for the arithmetic operation shown in the equation q _d determine the phase error [Delta] [theta] of the reference carrier signal for demodulation for carrier signal quadrature amplitude modulated wave And the amplitude component calculation means 53 for obtaining the linear distance from the origin in the signal space of the coordinates based on the coordinates.
And the phase error Δθ obtained by the phase error detecting means 51 is divided by the linear distance obtained by the amplitude component calculating means 53, and the phase error is normalized by the linear distance. And frequency deviation detecting means 57 for calculating the frequency deviation of the reference carrier signal with respect to the carrier signal by differentiating the phase error normalized by the above with a time giving a timing of digital conversion.

[0017]

In the frequency discriminator according to the first aspect of the invention, the limiting means 15 sets the upper limit of the frequency deviation of the reference carrier signal obtained by the phase error detecting means 11 and the frequency deviation detecting means 13 in accordance with the frequency accuracy of the signal. Limit below the value.

That is, the signal point of each symbol obtained by sequentially demodulating the quadrature amplitude modulation wave and further digitally converting the signal point and the signal point of the symbol obtained in the same way are passed through either axis in the signal space. When located on the opposite side, in the conventional example, a large error occurs in the phase error Δθ of the reference carrier wave signal calculated by the phase error detecting means 11, and a large error also occurs in the frequency deviation obtained by the frequency deviation detecting means 13. However, such an error is suppressed by performing the above-mentioned restriction.

In the frequency discriminator according to the second aspect, the output control means 21 has the coordinates in the signal space of each symbol obtained by sequentially demodulating and digitally converting the quadrature amplitude modulation wave, with the origin centered in that space. As a result, when each axis is located outside the area sandwiched by the virtual straight line obtained by rotating the axes bidirectionally by a predetermined angle and the axis, the frequency deviation of the reference carrier signal obtained by the frequency deviation detecting means 13 is output, and conversely. When it is located in the above-mentioned area, the output of the frequency deviation is thinned out.

Such a symbol is generally sandwiched by the axis and the above-mentioned virtual straight line when the symbol is located at a point on the opposite side of the preceding symbol via any axis in the signal space. Often located within the area. Further, the angle of the virtual straight line is given as a value proportional to the product of the maximum frequency deviation of the reference carrier signal and the maximum period of the above-mentioned digital conversion, and can be set to that value in advance. Similar to the frequency discriminator described in (1), the error component of the frequency deviation obtained by the frequency deviation detecting means 13 is suppressed.

In the frequency discriminator according to the third aspect, generally, each symbol obtained by sequentially demodulating the quadrature amplitude modulation wave and further digitally converting the same is obtained in the same manner as the symbol obtained similarly. The output control unit 31 determines whether or not the sign of the phase error Δθ obtained by the phase error detection unit 11 is reversed when the position is located on the opposite side of the axis. Then, when there is no reverse rotation, the frequency deviation obtained by the frequency deviation detecting means 31 is output, and when there is reverse sign, the output of the frequency deviation is thinned out.

Therefore, similarly to the frequency discriminator according to the first aspect, the error component of the frequency deviation obtained by the frequency deviation detecting means 13 is suppressed. In the frequency discriminator according to claim 4, in the output control means 41, the symbols for which the phase error detection means 11 calculates the phase error Δθ include signal points having the same linear distance from the origin in the signal space. When located outside the region showing the allowable range of the phase error in the vicinity of the signal point, the frequency deviation detecting means 13
The frequency deviation obtained by the above is output, and conversely, when the frequency deviation is located in such an area as described above, the output of the frequency deviation is thinned out.

That is, at the output end of the output control means 41, the frequency deviation of the reference carrier wave calculated by the frequency deviation detection means 13 based on the symbols located at points where the linear distances from the origin are substantially equal in the signal space is obtained. Therefore, the accuracy of the deviation is maintained at a high value even when the amplitude component of the quadrature modulated wave changes according to the transmission information.

In the frequency discriminator of the fifth aspect, the amplitude component calculating means 53 causes the origin of the space to be calculated based on the coordinates in the signal space of each symbol obtained by demodulating the quadrature amplitude modulated wave and digitally converting it. The normalization means 55 divides the phase error Δθ of the reference carrier signal obtained by the phase error detection means 51 by the above-mentioned straight line distance.

Such a linear distance indicates a variation of the amplitude of the quadrature amplitude modulation wave according to the transmission information, and the frequency deviation detecting means 57 is a reference by differentiating the phase error normalized by the linear distance with time. Since the frequency deviation of the carrier wave signal is obtained, the accuracy of the deviation is maintained at a high value regardless of the method of quadrature amplitude modulation.

[0026]

Embodiments of the present invention will now be described in detail with reference to the drawings. FIG. 6 is a diagram showing an embodiment corresponding to the invention described in claim 1.

In the figure, parts having the same functions and configurations as those shown in FIG. 15 are designated by the same reference numerals, and the description thereof will be omitted here. In the configuration of the present invention, a latch circuit (FF) 61 is provided between the output of the subtractor 155 and the input of the integrator 156 in the present embodiment.
Further, between the output of the subtractor 155 and the clock input of the latch circuit 61, a comparator 62 for comparing the output signal of the subtractor 155 with a predetermined threshold value, and the result of the comparison are synchronized with the clock CLK to be described above. And an AND gate 63 for supplying the clock input.

Regarding the correspondence relationship between this embodiment and the block diagram shown in FIG. 1, the multipliers 152 ₁ and 152 ₂ and the subtractor 153 correspond to the phase error detecting means 11, and the latch circuit 154 and the subtractor 155. Corresponds to the frequency deviation detecting means 13, and the comparator 62, the AND gate 63 and the latch circuit 61 correspond to the limiting means 15.

The operation of this embodiment will be described below. The comparator 62 determines the magnitude relationship between the frequency deviation Δf calculated by the subtractor 155 by the arithmetic operation shown in the above equation and a predetermined threshold value ΔF, and when the former is smaller than the latter, the latch circuit 61 via the AND gate 63. To the clock CLK. On the contrary, when the former is larger than the latter, the supply of the clock to the latch circuit 61 is blocked via the AND gate 63. Here, the threshold value ΔF is given by the maximum allowable error of the reference carrier wave frequency for demodulation with respect to the carrier wave frequency of the received signal.

As described above, according to this embodiment, the signal point indicating the symbol obtained by demodulating the received signal and the signal point indicating the symbol preceding the symbol are located on any axis in the signal space. A large error due to the phase difference shown in the above formula when located on the opposite side through is detected based on the threshold value ΔF,
The update of the frequency error (deviation) held in the latch circuit 61 is suspended.

Therefore, a large error that occurs in the frequency deviation obtained at the output of the integrator 156 in the conventional example is suppressed. FIG. 7 is a diagram showing another embodiment corresponding to the invention described in claim 1.

In the figure, parts having the same functions and configurations as those shown in FIG. 6 are designated by the same reference numerals, and the description thereof will be omitted here. The difference between the present embodiment and the embodiment shown in FIG. 6 is that the frequency deviation obtained at the output of the integrator 156 according to the preceding symbol and the output of the subtractor 155 according to the following symbol. The difference is that the subtractor 71 for obtaining the frequency deviation and the difference, and the comparator 72 for comparing the difference and the above-mentioned threshold value ΔF are provided in place of the comparator 62.

Regarding the correspondence between this embodiment and the block diagram shown in FIG. 4, the subtracter 71 and the comparator 7
2, the AND gate 63 and the latch circuit 61 correspond to the limiting means 15, and the others are the same as the corresponding relationship in the embodiment shown in FIG.

In the frequency discriminator having such a configuration, the subtractor 71 obtains the difference between the frequency deviations calculated according to the preceding symbol and the subsequent symbol, and the comparator 72 calculates the difference and the threshold value ΔF. To compare. Since the AND gate 63 regulates the holding operation of the latch circuit 61 when the above-mentioned difference exceeds the threshold value ΔF, the frequency deviation obtained at its output does not include a large error amount as in the conventional example, and the frequency deviation of the reference carrier wave is included. Detection accuracy is improved.

FIG. 8 is a diagram showing an embodiment corresponding to the invention described in claim 2. In FIG. In the figures, FIG. 6 and FIG.
The parts having the same functions and configurations as those shown in are given the same reference numerals, and the description thereof will be omitted here.

The characteristic configuration of the present invention is the present embodiment.
Between the output of subtractor 155 and the input of integrator 156
A latch circuit (FF) 61 is provided and further an A / D converter
151 ₁, 151₂Output and clock of latch circuit 61
Signal space of each symbol obtained by demodulation with the input
A signal point position determination circuit 81 for determining the upper position and its determination
The result of the determination is synchronized with the clock CLK and the clock
In addition, the AND gate 63 is provided for the input.

Regarding the correspondence between this embodiment and the block diagram shown in FIG. 2, the signal point position determination circuit 81, the AND gate 63 and the latch circuit 61 are the output control means 21.
7 and other points are the same as the correspondence relationship in the embodiment shown in FIG.

The operation of this embodiment will be described below. In the signal point position determination circuit 81, as shown in FIG. 8 (a), all the values that the input symbol can take are preliminarily calculated from each axis in the signal space.

[0039]

[Equation 2]

The maximum allowable phase difference θ given by the equation
Binary information indicating which of the area separated by _max or more and the other area is provided as a table on the ROM. In addition, the signal point position determination circuit 81 is used in the A / D converter 1
The AND gate 63 refers to the above-mentioned table based on each symbol given from 51 ₁ and 151 ₂ , and the AND gate 63 determines the phase difference θ obtained for the new symbol according to the logical value of the reference result of such a table. (t _n ) is the latch circuit 61
The switching is controlled to be latched or not.

As described above, in the present embodiment, in general, a symbol located in the vicinity of any axis in the signal space and the preceding symbol due to the phase shift due to the error of the reference carrier frequency pass through the axis. The above-described control is performed by utilizing the possibility that the integrator 1 is located on the opposite side, and the integrator 1
Since a phase difference including a large error is not given to 56 as in the conventional example, the detection accuracy of the frequency deviation of the reference carrier is improved.

Further, the contents of the above-mentioned table are not limited to the binary information shown in FIG.
As shown in (b), the contents may be determined based on boundary points set by connecting points parallel to each axis.

FIG. 10 is a diagram showing an embodiment corresponding to the invention described in claim 3. In FIG. In the figure, parts having the same functions and configurations as those shown in FIG. 6 are designated by the same reference numerals, and the description thereof will be omitted here.

The difference between the present embodiment and the embodiment shown in FIG. 6 is the exclusive logic for comparing the sign bit of the output signal of the subtracter 153 and the output signal of the latch circuit 154 instead of the comparator 62. The point is that the sum gate 101 is provided.

Regarding the correspondence relationship between this embodiment and the block diagram shown in FIG. 3, the exclusive OR gate 101, the AND gate 63 and the latch circuit 61 are the output control means 3.
Corresponds to 1, the other is the corresponding relationship between the same way in the embodiment shown in FIG.

In the frequency discriminator having such a configuration, the exclusive OR gate 101 is based on the phase difference calculated based on the preceding symbol and held in the latch circuit 154 and the subtractor 153 based on the subsequent symbol. The difference between the sign bit and the phase difference obtained in the output of
The latching operation of the latch circuit 61 is controlled via 3.

That is, when the sign bits thus compared are different, it means that the preceding symbol and the following symbol are located on the opposite sides of the signal space via the axis. The frequency deviation input to the integrator 156 does not include a large error as in the conventional example, and the detection accuracy of the frequency deviation of the reference carrier is improved.

FIG. 11 is a diagram showing an embodiment corresponding to the invention described in claim 4. In FIG. In the figure, parts having the same functions and configurations as those shown in FIG. 8 are designated by the same reference numerals, and the description thereof will be omitted here.

The structural difference between this embodiment and the embodiment shown in FIG. 8 is that instead of the signal point position determination circuit 81, a built-in RO is used.
The point is that the signal point position determination circuit 111 is different only in the contents of the table set on M.

Regarding the correspondence between this embodiment and the block diagram shown in FIG. 4, the signal point position determination circuit 111, the AND gate 63 and the latch circuit 61 are the output control means 4.
1 and the other is the same as the correspondence relationship in the embodiment shown in FIG.

The operation of this embodiment will be described below. The signal point position determination circuit 111 stores in its built-in ROM, for example, when the modulation method of the received signal is 16QAM.
One of the two tables shown in (a) and (b) is provided.
In such a table, binary information for identifying a region covering the vicinity of a signal point having the same distance from the origin on the signal space and other regions in correspondence with all possible values of each symbol is provided. It is set in advance. Signal point position determination circuit 111
Refers to the above-mentioned table according to the symbols obtained at the outputs of the A / D converters 151 ₁ and 151 ₂ , and the linear distance from the origin is almost the same in the signal space with respect to the symbol preceding the symbol. Binary information indicating whether or not is acquired and output. The latch operation of the latch circuit 61 is interrupted according to the logical value of such binary information.

Therefore, the frequency deviation obtained at the output of the latch circuit 61 is calculated based on only the symbols having the substantially same linear distance from the origin in the signal space, so that the modulation by the transmission information is performed as in the conventional example. The accuracy of detecting the frequency deviation of the reference carrier wave is improved without including a large error caused by the change of the amplitude component of the quadrature amplitude modulation wave according to the above.

FIG. 13 is a diagram showing an embodiment corresponding to the invention described in claim 5. In FIG. In the figure, parts having the same functions and configurations as those shown in FIG. 15 are designated by the same reference numerals, and the description thereof will be omitted here.

The characteristic configuration of the present invention is the present embodiment.
Connects the output of subtractor 153 to the dividend input.
The continued divider 131 is arranged, and the A / D converter 151 is arranged.₁,
151 ₂Between the output of and the divisor input of divider 131
The calculation circuit 132 is arranged.

Regarding the correspondence between this embodiment and the block diagram shown in FIG. 5, the multipliers 152 ₁ and 152 ₂ and the subtractor 153 correspond to the phase error detecting means 51, and the distance calculating circuit 132 corresponds to the amplitude component. The divider 131 corresponds to the calculator 53, the normalizer 55, and the latch circuit 154.
And the subtractor 155 corresponds to the frequency deviation detecting means 57.

The operation of this embodiment will be described below. The distance calculation circuit 132 gives, for each symbol in the signal space, a point (coordinates (i (t _k ), q (t _k )) indicating the symbol, where k = 1, 2, ... From the distance l _k to the formula of l _k = (i ² (t _k ) + q ² (t _k )) ^1/2 or the approximate formula of l _k ≈i (t _k ) + q (t _k ). Go and ask. Divider 131
Divides the phase difference θ (t _k ) obtained at the output of the subtracter 153 by the distance l _k described above.

That is, the preceding symbol (FIG. 14)
This given subsequent symbols (FIG. 14) with respect to, and when the amplitude of the received signal for each symbol in accordance with the transmission information is changed from l _k to l _{k + 1} is corresponding to these symbols For the carrier phase Δθ (t _k ), Δθ (t _{k + 1} ), in general,

[0058]

[Equation 3]

Although the proportional expression of is satisfied, the fluctuation is normalized by the linear distance from the origin in the signal space and absorbed, so that if the phases of the carrier waves in these symbols are the same, the phase difference Δθ is obtained. Since a large difference does not occur between (t _k ) and Δθ (t _{k + 1} ) unlike the conventional example, the accuracy of detecting the frequency deviation of the reference carrier is improved.

In each of the above-described embodiments, the frequency deviation corresponding to the error that has occurred in the conventional example is restricted from being held in the latch circuit 61, and is already held instead of the restricted frequency deviation. Although the present value is given to the automatic frequency control circuit, the present invention is not limited to such a method,
For example, the frequency deviation output from the subtractor 155 is limited to a preset upper limit value or less, or when a new frequency deviation is given to the automatic frequency control circuit, a strobe signal which gives a timing for taking in the deviation is used. In that case, you may use the method of restricting that signal being in an active state.

[0061]

As described above, according to the present invention, the frequency deviation of the demodulation reference carrier obtained by performing a predetermined arithmetic operation on the coordinates in the signal space of the symbols obtained by demodulating the quadrature amplitude modulated wave. , The output is decimated based on whether or not the coordinates are near the axis of the signal space or whether or not the sign of the phase error obtained in the process of the arithmetic operation is inverted, and the deviation value of the reference carrier signal A large error is suppressed by directly limiting the deviation from the range sandwiched by the upper and lower limits determined by the frequency accuracy.

Further, when the amplitude of the quadrature amplitude modulated wave varies depending on the transmission information, based on the symbol indicated by the coordinates, the linear distance from the origin corresponding to the variation in the signal space is almost the same. Only the frequency deviation calculated by the above is selected, or the above-mentioned phase error is normalized by the linear distance, and then the frequency deviation is calculated.

That is, since the signal point of each symbol is located on the opposite side of the signal point of the previously obtained symbol via either axis in the signal space, a large error occurs in the above-mentioned phase error. Also, even in the system in which the error of the frequency deviation of the reference carrier signal, which has occurred due to the error in the conventional example, is suppressed and the amplitude phase modulation method is adopted,
The error caused by the amplitude fluctuation of the modulated wave can be reduced.

Therefore, in the device for variably controlling the frequency of the reference carrier wave via the frequency discriminator according to the present invention, the demodulation process is stabilized regardless of the modulation method, and the performance is improved.

[Brief description of drawings]

FIG. 1 is a principle block diagram of the invention according to claim 1.

FIG. 2 is a principle block diagram of the invention described in claim 2.

FIG. 3 is a principle block diagram of the invention according to claim 3;

FIG. 4 is a principle block diagram of the invention according to claim 4;

FIG. 5 is a principle block diagram of the invention according to claim 5;

FIG. 6 is a diagram showing an embodiment corresponding to the invention described in claim 1.

FIG. 7 is a diagram showing another embodiment corresponding to the invention described in claim 1.

FIG. 8 is a diagram showing an embodiment corresponding to the invention described in claim 2.

FIG. 9 is a diagram (1) showing a correspondence relationship between binary information set in the table and signal points.

FIG. 10 is a diagram showing an embodiment corresponding to the invention according to claim 3;

FIG. 11 is a diagram showing an embodiment corresponding to the invention described in claim 4;

FIG. 12 is a diagram (2) showing a correspondence relationship between binary information set in the table and signal points.

FIG. 13 is a diagram showing an embodiment corresponding to the invention described in claim 5;

FIG. 14 is a diagram illustrating a process of suppressing a phase difference error.

FIG. 15 is a diagram showing a configuration example of a conventional frequency discriminator.

FIG. 16 is a diagram illustrating frequency discrimination processing.

FIG. 17 is a diagram illustrating a problem of a conventional frequency discriminator.

[Explanation of symbols]

11,51 Phase error detection means 13,57 Frequency deviation detecting means 15 Limitation means 21, 31, 41 output control means 53 Amplitude component calculation means 55 Normalization means 61,154 Latch circuit (FF) 62,72 Comparator 63 and gate 71,111 Signal point position determination circuit 81,153,155 Subtractor 101 Exclusive OR gate 131 divider 132 distance calculation circuit 150 Quadrature detector 151 A / D converter (A / D) 152 multiplier 156 integrator

─────────────────────────────────────────────────── ─── Continuation of front page (58) Fields surveyed (Int.Cl. ⁷ , DB name) H04L 27/00

Claims (5)

(57) [Claims] 1. For each symbol obtained by demodulating a quadrature amplitude modulated wave and digitally converting it, from the coordinates of the signal point indicating the symbol in the signal space to the symbols i _d , q of the coordinates.
The relative error i _e, q _e and the calculated, and _{Δθ = i d × q e -i} e × q d carrier signal of the quadrature amplitude modulation wave by arithmetic operations shown in the equation for the _d and the coordinates of the original signal point A phase error detecting means (11) for obtaining a phase error Δθ of the demodulation reference carrier signal, and a phase error Δθ obtained by the phase error detecting means (11) are differentiated by a time giving a timing of the digital conversion, A frequency discriminator comprising a frequency deviation detecting means (13) for calculating a frequency deviation of the reference carrier signal with respect to a carrier signal, wherein the frequency deviation obtained by the frequency deviation detecting means (13) is used as the accuracy of the reference carrier signal. A frequency discriminator comprising a limiting means (15) for limiting the value to a value equal to or less than the corresponding upper limit value. 2. For each symbol obtained by demodulating a quadrature amplitude modulated wave and digitally converting it, from the coordinates of the signal point indicating the symbol in the signal space to the codes i _d , q of the coordinates.
The relative error i _e, q _e and the calculated, and _{Δθ = i d × q e -i} e × q d carrier signal of the quadrature amplitude modulation wave by arithmetic operations shown in the equation for the _d and the coordinates of the original signal point A phase error detecting means (11) for obtaining a phase error Δθ of the demodulation reference carrier signal, and a phase error Δθ obtained by the phase error detecting means (11) are differentiated by a time giving a timing of the digital conversion, A frequency discriminator comprising a frequency deviation detection means (13) for obtaining a frequency deviation of the reference carrier signal with respect to a carrier signal, wherein a virtual straight line in which each axis is bidirectionally rotated by a predetermined angle about an origin in the signal space. Based on the coordinates, it is determined whether the signal point of the symbol is located in the prohibited area or the other area sandwiched between the axis and the axis. Frequency discriminator, characterized in that it comprises a frequency deviation detector (13) output control means for outputting thinning out frequency deviation obtained by (21). 3. For each symbol obtained by demodulating a quadrature amplitude modulated wave and digitally converting it, from the coordinates of the signal point indicating the symbol in the signal space to the symbols i _d , q of the coordinates.
The relative error i _e, q _e and the calculated, and _{Δθ = i d × q e -i} e × q d carrier signal of the quadrature amplitude modulation wave by arithmetic operations shown in the equation for the _d and the coordinates of the original signal point A phase error detecting means (11) for obtaining a phase error Δθ of the demodulation reference carrier signal, and a phase error Δθ obtained by the phase error detecting means (11) are differentiated by a time giving a timing of the digital conversion, A frequency discriminator comprising a frequency deviation detecting means (13) for obtaining a frequency deviation of the reference carrier signal with respect to a carrier signal, wherein the phase error Δθ obtained by the phase error detecting means (11) and its deviation are preceded. Similarly, it is determined whether the sign of the phase error is the same as that of the obtained phase error, and the frequency deviation determined by the frequency deviation detecting means (13) is thinned out according to the result of the determination and output. Frequency discriminator, characterized in that it includes an output control unit (31) that. 4. For each symbol obtained by demodulating a quadrature amplitude modulated wave and digitally converting it, from the coordinates of the signal point indicating the symbol in the signal space to the codes i _d , q of the coordinates.
The relative error i _e, q _e and the calculated, and _{Δθ = i d × q e -i} e × q d carrier signal of the quadrature amplitude modulation wave by arithmetic operations shown in the equation for the _d and the coordinates of the original signal point A phase error detecting means (11) for obtaining a phase error Δθ of the demodulation reference carrier signal, and a phase error Δθ obtained by the phase error detecting means (11) are differentiated by a time giving a timing of the digital conversion, A frequency discriminator comprising a frequency deviation detecting means (13) for calculating a frequency deviation of the reference carrier signal with respect to a carrier signal, wherein the phase error Δθ is present in the signal space near each signal point having the same linear distance from the origin. Of the signal point of the symbol is determined in the area indicating the allowable range of the above and other areas, and the frequency deviation detecting means (13) determines the frequency according to the result of the determination. Frequency discriminator, characterized in that it includes an output control means (41) for thinning and outputting a frequency deviation obtained Te. 5. For each symbol obtained by demodulating a quadrature amplitude modulation wave and digitally converting it, from the coordinates of the signal point indicating the symbol in the signal space to the symbols i _d , q of the coordinates.
The relative error i _e, q _e and the calculated, and _{Δθ = i d × q e -i} e × q d carrier signal of the quadrature amplitude modulation wave by arithmetic operations shown in the equation for the _d and the coordinates of the original signal point Phase error detecting means (51) for obtaining the phase error Δθ of the demodulation reference carrier signal, and amplitude component calculating means (53) for obtaining the linear distance of the coordinates from the origin in the signal space based on the coordinates.
And a normalizing means for dividing the phase error Δθ obtained by the phase error detecting means (51) by the linear distance obtained by the amplitude component calculating means (53) and normalizing the phase error by the linear distance. (55) and a frequency deviation detecting means for calculating a frequency deviation of the reference carrier signal with respect to the carrier signal by differentiating the phase error normalized by the normalizing means (55) by a time giving a timing of the digital conversion. 57) and a frequency discriminator.