JPS623Y2 - - Google Patents

Description

[Detailed description of the invention] Some of the television signals currently being broadcast include, for example, a signal at a predetermined portion within each vertical blanking period in order to adjust the phase difference of carrier color signals between relay stations.
VIRS is inserted in the horizontal period.

Such signals are transferred to a VTR (magnetic recording and reproducing device)
When recording on a high-density recording medium, VIRS has only one horizontal period and no vertical correlation or field correlation, so for example, a high-density recorder without a guard band cannot eliminate crosstalk during playback, which can cause image disturbances. . Therefore, it was considered to remove VIRS from the signal during recording.

In such cases, conventionally, an analog switch circuit and a monostable circuit for one horizontal period are provided, the monostable circuit is triggered by a predetermined horizontal synchronization signal after the vertical synchronization signal, and the output of this monostable circuit is used to trigger the analog switch. The circuit was turned off to remove the signal (VIRS) included in a predetermined period.

However, this requires at least three transistors, two for the monostable circuit and one for the gate circuit, resulting in a complicated configuration.

In view of these points, the present invention provides a circuit that has a simple configuration and performs the same operation as described above.

An embodiment of the present invention will be described below with reference to the drawings.

In FIG. 1, 1 is an input terminal to which an analog signal is supplied, and this input terminal 1 is connected to the base of a PNP transistor 3 through a diode 2. And the emitter of this transistor 3 is
It is connected to a +12V DC power supply terminal 5 through a 2200Ω resistor 4, and an output terminal 6 is led out from this emitter. Further, the collector of the transistor 3 is grounded through a 150Ω resistor 7, and this collector is connected to the base of the npn transistor 3. The emitter of this transistor 8 is grounded, and the collector is connected to a resistor 9 with a resistance of 470 kΩ.
and is connected to the base of transistor 3 through a parallel circuit of capacitor 10 of 1000 pF, and
Trigger signal 11 to which the pulse signal is supplied is 220pF
is connected to the base of transistor 8 through capacitor 12 .

In this circuit, in a stable state (before time t ₁ in FIG. 2), transistor 8 is off,
Therefore, it is the same as if the capacitor 10 and resistor 9 were not provided.

Therefore, when a signal as shown in FIG. 2A is supplied to the input terminal 1, the transistor 3 is biased in an active state and operates as an emitter follower, so that a signal having the same waveform as the input signal as shown in FIG. 2B is output from the output terminal 6.

Also, at this time, the base of the transistor 8 has a second
A signal as shown in FIG. C is applied, ie transistor 8 is turned off.

Then, at time _t1 , when a positive pulse signal is applied to the trigger signal 11, the transistor 8 becomes conductive. Therefore, the base potential of the transistor 3 decreases, and the potential of the signal at the output terminal 6 becomes lower than the normal signal level as the transistor becomes conductive.

At the same time, the base potential of transistor 8 rises, and transistor 8 is fixed on.

Therefore, in this state, the capacitor 10 is charged by the base current from the transistor 3, the base potential of the transistor 3 gradually increases, the impedance of the transistor 3 gradually increases, and the base potential of the transistor 8 gradually increases. descend.

Then, at time _t2 , when the base potential of transistor 8 falls below a predetermined value, transistor 8 is turned off, and thereafter transistor 3 is again biased to the active state and operates as an emitter follower.

Further, in this state, the electric charge stored in the capacitor 10 is discharged by the resistor 9 and returns to the original state.

In this way, signals for a predetermined period of time can be removed, and according to the present invention, this operation can be performed with only two transistors, and the same effect as the conventional one can be obtained with a simple configuration.

Note that the length of the signal cutoff period is determined by capacitor 1.
It can be arbitrarily determined by the capacitance value of 0 and the base current value of the transistor 3.

Moreover, since the trigger cannot be performed again after the capacitor 10 has finished discharging, it is necessary to determine the time constant of the capacitor 10 and the resistor 9, taking into consideration the cutoff period and the like. In the above numerical example, the cutoff period is 0.5 mS and the return period is approximately 1 mS.

[Brief description of the drawings]

FIG. 1 is a connection diagram of an example of the present invention, and FIG. 2 is a waveform diagram for explaining the same. 1 is an input terminal, 2 is a diode 2, 3 is a pnp transistor, 4, 7, 9 are resistors, 5 is a power supply terminal, 6 is an output terminal, 8 is an npn transistor, 1
0 and 12 are capacitors, and 11 is a trigger terminal.

Claims (1)

[Scope of utility model registration request] The output of the first transistor is connected to the base input terminal of the second transistor through a parallel circuit consisting of a capacitor and a resistor to form a non-saturated monostable multivibrator, and the trigger is triggered at the base of the second transistor. applying a pulse to apply an analog signal to the base of the first transistor such that a switched analog signal is obtained from the emitter of the first transistor, and setting the length of the switching period to the capacitor and the resistor. An analog switch circuit determined by the time constant of the device.