JPS6236860A - Schottky barrier diode - Google Patents

Abstract

PURPOSE:To enable a high speed operation by connecting the peripheral edge of the second barrier metal electrode provided on the first barrier metal electrode with at least part of a guard ring to reduce a series resistance and an MOS capacity. CONSTITUTION:An N<+> type silicon semiconductor substrate 2, an N-type epitaxial layer 3, a silicon oxide film 4, a ring-shaped P<+> type guard ring 5, a contacting hole 6, the first barrier metal electrode 7, the second barrier metal electrode 8, and Au wirings formed by a wire bonding method substantially at the centers of the electrodes 7, 8 are provided. Since the edge 9 of the electrode 8 is connected with at least part of the ring 5 to connect with the ring 5 formed in the substrate 3 directly without the electrode 7, a series resistance is reduced to decrease an MOS capacity formed of the electrode 8. The film 4 and the substrate 3.

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Application The present invention relates to a Schottky barrier fist diode suitable for high-speed operation.

(b) Prior art In general, a Schottky barrier diode (7!l) is disclosed in Japanese Patent Application No. 513-128968 (Fig. 3).
An N+ type silicon semiconductor substrate (2?J), an N type epitaxial layer (23) that can be stacked on the N type silicon semiconductor substrate (2 sides), and an N type epitaxial layer (23) that can be stacked on the N type silicon semiconductor substrate (2);
A silicon oxide film (
24), a ring-shaped P-type guard ring (2) formed in the epitaxial layer C using a selective diffusion method of boron, and the silicon oxide film (241 formed approximately in the center by a photolithography method). A first barrier metal electrode (271) contacts the semiconductor substrate (c) through the contact hole (a) and the contact hole α). ), a second barrier metal electrode @ (here, Al is used as the second barrier metal electrode (28)) provided on the surface of the first barrier metal electrode +27),
It is composed of an Au wire or the like formed approximately in the center of the barrier metal electrode (c) using a wire bonding method.

←→ Problems to be solved by the invention In the above 71 key barrier diode,
When using a Schottky Paris diode for microwave applications, it is necessary to reduce the MO8 capacitance, junction capacitance, or series resistance.

Therefore, when trying to fabricate a Schottky barrier diode suitable for high-speed operation, there was a problem in that it was difficult to fabricate a high-speed Schottky barrier diode because of the large weight and resistance value described above.

B) Means for Solving the Problems The present invention has been made in view of the above problems, and includes at least one conductivity type semiconductor substrate +2)t31 and the semiconductor substrate (2)(
3) The first barrier metal electrode (force) that contacts the surface and the M2 barrier metal electrode (8) provided on the surface and the barrier metal electrode (corresponding to the periphery of the force (8) Guard ring (
5) and an insulating film (4) provided in a region where the barrier metal's awakening electrode (force (8) does not contact the semiconductor substrate (3)). Periphery (9) of second barrier metal electrode (8)
This is solved by connecting to at least a part of the guard ring (5).

((E) Effect Conventionally, the second barrier metal electrode (to) (for example, Al
), first barrier metal electrode @ (e.g. Mo, TI,
), and the semiconductor substrate Q
However, in the present invention, by connecting the peripheral edge of the second barrier metal electrode (8) to at least a part of the guard ring (5), the second barrier metal electrode ( Since a part of 8) is directly connected to the semiconductor substrate (3) without intervening the first barrier metal electrode (7), it is possible to reduce the series resistance.

Furthermore, since the second barrier metal electrode (8) is not formed outside the guard ring (5), the MO8 capacitance can be reduced.

(F) Example An example of the present invention will be described below with reference to FIG.

As shown in FIG. 1, there is an N+ type silicon semiconductor substrate (2), an N type epitaxial layer (3) laminated on the semiconductor substrate (2), and a heat treatment layer on the N type epitaxial layer (3). A silicon oxide film (4) stacked using an oxidation method or the like; a ring-shaped P-type guard ring (5) formed by selectively etching the silicon oxide film (4); A contact hole (6) formed approximately in the center of the silicon oxide film (4) by photolithography, and a first barrier metal electrode that contacts the semiconductor substrate (3) through the contact hole (6). (Force (here, the first barrier metal electrode (force is M
o, Ti, and Ni (laminated in the order of
8) uses AI) and the barrier metal electrode +7
1 (81) and an Au wire formed approximately in the center using a wire bonding method.

The feature of the present invention is the second barrier metal electrode (8)K. As mentioned above, the second barrier metal electrode (
8) By connecting the peripheral edge (9) of (Al is used here) to at least a portion of the guard ring (5), a portion of the second barrier metal electrode (8) is connected to the first barrier metal. Since the electrode is directly connected to the guard ring (5) formed on the semiconductor substrate (3) without using force, the series resistance can be reduced.

Furthermore, since the peripheral edge (9) of the second barrier metal electrode (8) is connected to the guard ring (5), the second barrier metal electrode (8) is not formed outside the guard ring (5). Therefore, it is possible to reduce the MO8 capacitance formed by the second barrier metal electrode (8), silicon oxide film (4), and semiconductor substrate (3).

FIG. 2 shows another embodiment of the present invention, in which a silicon oxide film O
n is also formed in the inner region of the guard ring.

(G) Effects of the Invention As is clear from the above description, the present invention provides a series connection by connecting the peripheral edge (9) of the second barrier metal electrode (8) to at least a portion of the guard ring (5). The resistance can be reduced and the MO8 capacitance can also be reduced. Therefore, high-speed operation is possible.

[Brief explanation of drawings]

FIG. 1 is a sectional view of a Schottky barrier diode according to an embodiment of the present invention, and FIG. 3 is a sectional view of a conventional Schottky barrier diode. Explanation of the main drawing numbers: (1) is a Schottky barrier diode, (2) is a silicon semiconductor substrate, (3) is an epitaxial layer, (4)
) is silicon oxide film, (5) is guard ring, (6
) is the contact hole, (force is the first barrier metal electrode,
(8) is the second barrier metal electrode, and (9) is the peripheral edge of the second barrier metal electrode. Applicant Sanyo Electric Co., Ltd. and one other representative Patent attorney Shizuka Sano Mistakes Figure 1 Figure 2

Claims (1)

[Claims] (1) A semiconductor substrate of at least one conductivity type, a first barrier metal electrode in contact with the surface of the semiconductor substrate, a second barrier metal electrode provided on the surface of the first barrier metal electrode, and a peripheral edge of the barrier metal electrode. In a Schottky barrier diode comprising a guard ring correspondingly provided on a semiconductor substrate and an insulating film provided in a region where the barrier metal electrode does not come into contact with the semiconductor substrate, the periphery of the second barrier metal electrode A Schottky barrier diode, characterized in that a part of the Schottky barrier diode is connected to at least a part of the guard ring.