JPS6235998B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION This invention is a vertical method in which a large number of compound semiconductor wafers are vertically arranged in a solution containing Si as a dopant, and then heated and cooled to grow an epitaxial layer on the wafers. Concerning improvements in liquid phase epitaxial growth methods.

A vertical liquid phase epitaxial growth method can be used to form an epitaxial growth layer containing Si as a dopant on a compound semiconductor wafer such as GaAs, GaP, or InP.

FIG. 1 is a sectional view of an apparatus for performing liquid phase epitaxial growth.

In this example, semiconductor wafer 1 is a GaAs wafer. Use one with a diameter of about 50 mm.

The jig 2 is a shallow container with a concave cross section, and the semiconductor wafer 1 is housed therein.

Inside the jig 2, there is a
It is filled with a Ga solution 3 in which GaAs is dissolved. The Ga solution contains GaAs, which is to form an epitaxial layer, as a solute. It is desirable that GaAs be at a saturation concentration.

The solute needs to be the same as the component of the semiconductor wafer 1, and when the semiconductor wafer is GaP or InP, the solute is naturally also GaP or InP.

Solution 3 must be able to dissolve the solute and have a sufficiently low melting point. For this reason,
Ga is generally used.

A large number of sets of the wafer 1, jig 2, and solution 3 thus constructed are stacked vertically. Quartz cassette 7
is supported vertically, and sets of wafers and jigs are stacked vertically inside this, so it is called a vertical liquid phase epitaxial growth method. FIG. 7 is an exploded perspective view of the device.

In reality, the solutions 3 are not separated from each other, but two vertical grooves 6 are provided on the sides of the quartz cassette 7, and the Ga solutions communicate with each other through the vertical grooves 6. . In other words, a Ga solution is placed in the quartz crucible 4 in advance, and then the shallow disc-shaped jig 2 with the wafer 1 placed thereon is placed into the quartz cassette 7 in order from above and submerged in the solution 3. I'm going to go.

Since the upper part of the jig 2 is open, the solution 3 enters. However, since the open surface (top surface) of the jig 2 is covered with the bottom surface of the jig 2 one step above, the result is the same as putting a lid on it.

Such a set of jig 2 and wafer 1 is processed simultaneously in one quartz cassette 7. According to the present invention, about 50 sets can be epitaxially grown at the same time. This method is highly suitable for mass production.

A heater 5 is provided around the quartz tube 8.

First, a Ga solution, source poly (GaAs polycrystal), and dopant are placed in a quartz crucible 4.
Turn on the heater 5 and raise the temperature of the furnace to about 1000℃. The source poly and dopant are uniformly dissolved in the Ga solution 3. As the dopant, an impurity necessary for p-type or n-type epitaxial growth is selected, and in the present invention, it is necessary to include Si as the dopant.

As described above, several dozen sets of jigs and wafers are sequentially placed into the uniform solution 3. solution 3
enter into each jig 2. A jig 2 on which a wafer 1 is placed is filled with a solution 3. The upper surface of the wafer and the solution 3 are in direct contact, and the solution blends well with the wafer.

Next, increase the temperature of the furnace from about 800℃ to about 600℃.
Lower gradually. At this time, an epitaxial growth layer is formed on the wafer surface.

The temperature remains uniform for the wafers arranged vertically,
It's not about lowering the temperature. Gradually lower the temperature while keeping the lower part low and the upper part high.

FIG. 2 is a temperature distribution diagram inside the quartz tube. The vertical axis (x) is the vertical height (distance from the bottom of the quartz tube), and the horizontal axis is the temperature. The temperature is not uniform, and a temperature distribution is provided so that the temperature gradient (dT/dx) is positive. Then, the whole is gradually cooled while maintaining the temperature gradient.

The temperature difference ΔT between the topmost and bottommost stacked wafers is about 10°C.

As mentioned above, the Ga solution 3 can flow vertically through the vertical groove 6. Creating such a temperature gradient means that the solution 3 is
This is to make it easier to start crystal growth on the wafer since the temperature is low below and high above. In the internal space of one jig 2, the solution 3 moves rapidly due to convection, but due to the temperature gradient, it crystallizes on the wafer and does not crystallize on the back surface of the jig one step above.

However, on the other hand, the solution 3 can flow slowly through the groove 6. For this reason, the concentration of solute differs between the top and bottom of the quartz tube. In general, there is a tendency for the concentration to be higher in the upper part.

Therefore, despite the high temperature in the upper part and the lower temperature in the lower part, epitaxial growth starts and ends almost at the same time. There is no difference in the thickness of the growth layer between the top and bottom.

In this way, the vertical liquid phase epitaxial method is an excellent method with high mass productivity.

Conventionally, the temperature was lowered to about 600°C, and once epitaxial growth was completed, the temperature was lowered to room temperature at a faster rate while maintaining this temperature gradient ((dT/dx)>0).

After cooling, the jig is taken out from the quartz tube to obtain a wafer on which an epitaxial growth layer has been formed.

Since Ga is still in liquid form, it can be easily removed.

However, there were still difficulties.

This means that Si crystallizes on the surface of the epitaxial wafer, making the surface rough.

Almost 100% Si crystallization occurred in the conventional method. Furthermore, Si crystallization is often observed over almost the entire epitaxial surface of the wafer.

If Si crystallization occurs, if a device is manufactured as is, it will not be possible to obtain a device with good electrical and electro-optical properties. Therefore, the Si crystallized layer must be removed. Although it is possible to remove the Si layer by physical or chemical methods, it is not preferable because there is a risk of damaging the epitaxial growth layer and additional steps are required.

The present inventor considered why Si crystallizes on the epitaxial layer.

After making many epitaxial wafers,
We learned that the difference between cases where crystallization does not appear on the surface of the epitaxial layer and cases where crystallization does appear is related to the presence or absence of a polycrystalline film on the Ga solution.

After the epitaxial growth is completed, the whole is cooled to room temperature, but the solute (in this case
A polycrystalline film of GaAs) may be formed. In the case where the polycrystalline film was formed on the Ga solution, no Si crystallization was observed on the epitaxial growth surface.

In cases in which a polycrystalline film could not be formed, Si crystallization was always observed on the epitaxial growth surface.

There seem to be few exceptions to this relationship.

However, polycrystalline films are rarely formed on Ga solutions, and therefore Si crystallization occurs on at least a portion of the surface of most epitaxial wafers.

The present inventor thought that when a polycrystalline film of solute is formed on the Ga solution, excess Si will be taken into the polycrystalline film.

FIG. 3 is a schematic cross-sectional view of the jig, wafer, and solution in the liquid phase epitaxial method. This explains the motion of Si and GaAs.

While the epitaxial growth continues, both the solute GaAs and the dopant Si are directed downward and come into contact with the surface of the wafer 1. GaAs forms a continuous single crystal layer on the substrate, and Si is uniformly incorporated into this crystal layer at an appropriate concentration.

When the temperature drops to around 600°C, epitaxial growth is almost complete. However, the downward movement of Si still persists. Therefore, Si crystallizes on the surface of the epitaxially grown layer.

The inventor of the present invention thought like this.

If a polycrystalline film of solute is formed on the surface of the solution, Si in the solution is absorbed by the polycrystalline film. It is thought that this prevents the downward movement of Si.

All you have to do is actively create a polycrystalline film on the surface of the solution. By doing so, it should be possible to prevent Si from crystallizing on the epitaxial surface.

FIG. 4 is a cross-sectional view of the jig, wafer, and solution showing the movement of GaAs and Si in the solution when there is a polycrystalline film on the surface.

Here, a GaAs polycrystalline film 7' is formed on the surface of the solution. The GaAs faces upward and becomes part of the polycrystalline film 7'. At the same time, the dopant Si is also directed upward and incorporated into the polycrystalline film.

How can we actively create a polycrystalline film of solute on the surface? This becomes a problem.

All we have to do is reverse the temperature distribution.

By making the upper part cooler, the GaAs in solution can reach a saturated concentration in the upper part and remain unsaturated in the lower part.

FIG. 5 is a graph showing such temperature distribution. The horizontal axis represents temperature, and the vertical axis represents height. The horizontal axis T differentiated by the vertical axis x (dT/dx) is negative.

The present invention was made based on such consideration. In other words, wafers in multiple jigs are stacked vertically and placed in a solution containing a solute at a saturated concentration so that the temperature gradient (dT/dx) > 0, and epitaxial growth is completed. The characteristic of the liquid phase epitaxial growth method of the present invention is that the liquid phase epitaxial growth method of the present invention is cooled so that the temperature gradient (dT/dx)<0.

Of course, the temperature gradient during epitaxial growth and subsequent cooling can be reversed by adjusting the local output of the heater, adjusting the cooling water, etc.

Furthermore, the temperature gradient can be substantially reversed by abruptly changing the position of the wafer within the heater without drastically changing the heater output.

FIG. 6 is a sectional view showing such an embodiment. The left side shows a schematic diagram of the epitaxial growth apparatus, and the right side shows its vertical temperature distribution.

The horizontal axis represents the temperature T, and the vertical axis represents the height x. The maximum temperature is reached in the middle, and the temperature is lower in the upper and lower regions. This is an inverted dogleg-shaped temperature distribution. Of course, this entire curve shifts to the left over time. Although the temperature continues to fall, the distribution remains almost unchanged.

Initially, the stack of wafers is placed in the lower position A, where it is epitaxially grown.

When the epitaxial growth is finished, the stack of wafers is pulled up to position B. Place in position B and slowly cool to room temperature.

In this way, by changing the position of the wafer stack, the temperature distribution can also be reversed.

Add effect.

After the epitaxial growth is completed, the temperature distribution is reversed and the upper part becomes lower temperature, so that a polycrystalline film of solute is formed on the surface of the solution. Since Si is incorporated into the polycrystalline film on the surface, it does not crystallize in the epitaxial growth layer. Epitaxial wafers with clean surfaces can be produced.

There is no need to remove Si afterwards.

The present invention can be used to manufacture Si-doped epitaxial wafers of compound semiconductors such as GaP, GaAs, and InP.

In particular, when used for Si-doped GaAs infrared light emitting epitaxial growth, light emitting diodes made from this wafer can be made with excellent light emitting output and lifetime.

Furthermore, since it is a liquid phase epitaxial growth method, the wafer is not directly exposed to H ₂ gas or N ₂ gas at high temperatures. For this reason, As omission is less likely to occur.
There is an advantage.

In the case of Si-doped GaAs, according to the present invention, 60-70% of all wafers showed no Si epitaxial surface crystallization. Even on wafers with some Si crystallization, about 70% of the wafer area is
There was no crystallization of Si.

In the illustrated example, wafers are placed in a dish-shaped jig and arranged vertically in a quartz tube.

The shape of the jig is arbitrary. It may also be used as a jig with a lid. The jig is made of a suitable material such as carbon or quartz.

What is important is that a number of wafers are vertically spaced apart in a solution containing the solute to form the epitaxial layer, and that the solution communicates with one another. Under such conditions, reversing the temperature gradient can produce the effects described above.

[Brief explanation of the drawing]

FIG. 1 is a sectional view of an apparatus for performing vertical liquid phase epitaxial growth. FIG. 2 is a graph showing the vertical temperature distribution during epitaxial growth of a stacked body in which wafers are stacked at intervals in a solution. FIG. 3 is a schematic cross-sectional view of the jig, wafer, and solution in the liquid phase epitaxial method, and schematically shows the downward movement of Si and GaAs. Figure 4 is a schematic cross-sectional view of the jig, wafer, and solution in the liquid phase epitaxial method, showing the state in which Si and GaAs are moving upward and a polycrystalline film is formed on the surface of the solution. Abbreviated. FIG. 5 is a graph showing the temperature distribution during cooling after epitaxial growth when carrying out the liquid phase epitaxial growth method of the present invention. Figure 6 shows that by moving the stack of wafers in a heater,
1 is a schematic cross-sectional view of a liquid phase epitaxial growth setup to schematically illustrate a method for reversing temperature gradients; FIG. FIG. 7 is an exploded perspective view of parts of the vertical epitaxial growth apparatus. 1... Wafer, 2... Jig, 3... Solution, 4...
...Quartz crucible, 5...Heater, 6...Vertical groove, 7
...Quartz cassette, 8...Quartz tube.

Claims (1)

[Claims] 1. A large number of compound semiconductor wafers are arranged vertically at intervals in a solution containing Si as a dopant and a solute to form an epitaxial layer of a compound semiconductor, and the upper part is at a high temperature and the lower part is at a low temperature. Epitaxial growth is performed while maintaining a temperature gradient of
A liquid phase epitaxial growth method that is characterized by reversing the temperature gradient after growth is completed, and cooling while maintaining the temperature gradient so that the temperature is low at the top and high at the bottom.