JPS6235793A - Reference signal generating circuit for magnetic recording and reproducing device - Google Patents

Abstract

PURPOSE:To eliminate the frequency offset of a luminance signal and a color subcarrier signal by changing frequency division ratios of a frequency divider which divides the frequency of the color subcarrier signal at every specific frequency division period. CONSTITUTION:A frequency divider 1 which inputs the color subcarrier signal as its clock input and divides the frequency of the signal SC by a frequency division ratio DR-59717 generates a frequency-divided pulse DP1 every time 59717 signals SC are counted. The frequency-divided pulse DP1 of this frequency divider 1 is inputted to the clock input of a trailing-stage frequency divider 2. The frequency divider 2 generates a frequency-divided pulse DP2 every time four DPs 1 are counted. The frequency-divided pulse PD1, on the other hand, is supplied to the data input D of a D type flip-flop (D-FF) 3 as a well. The signal generated by inverting the color subcarrier signal SC by an inverter 4 is supplied to the clock input phi of the D-FF3 and its set output Q is supplied to the data input D of the next D-FF5. then, the signal obtained by inverting the color subcarrier signal SC is supplied to the clock input phi of the D-FF5 as well.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a reference signal generation circuit used in a servo circuit of a magnetic recording/reproducing apparatus (VTR).

[Technical Background of the Invention] As is well known, in the drum servo system and capstan servo system of a VTR, in order to accurately synchronize the rotational speed and phase of the drum motor and capstan motor with the phase of the vertical synchronization signal of the video signal. , fsc=3.58MH2
By frequency-dividing the color subcarrier signal using a frequency divider, a reference signal corresponding to one field frequency fFD=59.94H2 is generated.

The frequency division ratio DR at this time is fFDx455/2x525xl/2=fsc...(
1) fSC/fFD=455X525/4 =59718+3/4 ... (2) According to the relational expression, 0R=59718 or DR=
A value of 59719 is used.

[Problems with the Background Art] However, since there is a slight frequency fluctuation in the frequency white of the color subcarrier signal, the above-mentioned method of fixing the frequency division ratio DR does not satisfy the equations (1) and (2). The reference signal that always satisfies the conditions shown in the formula is no longer available, and when the luminance signal is digitally processed and stored in a memory, the storage location shifts by a frame or several frames, and the signal processing for that one change is difficult. There is a problem of interference.

That is, when a frequency offset occurs between the color subcarrier signal and the reference signal, this frequency offset causes a breakdown in the so-called interleaving relationship between the luminance signal and the color signal.

This disruption of the interleaving relationship is hardly a problem in normal playback, etc., but for example, when performing digital signal processing by AD converting the reproduced signal using a sampling clock with a frequency three times that of the subcarrier signal, Due to the frequency offset between the signal and the luminance signal, the phase between them gradually shifts, resulting in a shift in the storage locations of sampled data. Particularly, when data is stored over 10 frames or more, the deviation gradually increases, causing a major hindrance to subsequent signal processing.

[Purpose of the Invention] The present invention has been made to solve the above-mentioned problems, and provides a reference signal generation circuit for a magnetic recording and reproducing device that can eliminate frequency offset between a luminance signal and a color subcarrier signal. is intended to provide.

[Summary of the Invention] The present invention provides a method of dividing a color subcarrier signal by switching the frequency division ratio of a frequency divider between a first frequency division ratio and a second frequency division ratio every predetermined frequency division period. , has achieved the above objectives.

That is, for example, if 4 fields are one division period,
The total frequency division ratio ΣDR during this period is ΣDR= (59718
+3/4) x4=59718x4+3 =59719X3+59718. Therefore, frequency division is performed three times with a frequency division ratio of DR = 59719, and then frequency division is performed with a frequency division ratio of DR = 59718 by 1.
If the frequency relationship between the reference signal and the color subcarrier signal generated in this way satisfies the conditions of equations (1) and (2) on average, as a result, the luminance signal The frequency offset between the color subcarrier signal and the color subcarrier signal can be eliminated.

[Embodiment of the Invention] FIG. 1 is a circuit diagram showing an embodiment of a reference signal generation circuit of the present invention. In the same figure, 1 uses the color subcarrier signal SC as a clock input, and this signal SC is DR=5.
This is a frequency divider that divides the frequency at a frequency division ratio of 9717, and generates a frequency division pulse DPI as shown in FIG. 2(b) every 59717 counts of the signal@SC. The frequency-divided pulse DP1 of the frequency divider 1 is inputted to the clock input of the frequency divider 2 at the next stage.

The frequency divider 2 roughly divides the frequency of the frequency-divided pulse DPI by four, and generates a frequency-divided pulse DP2 as shown in FIG. 2(C) every four counts of DPI.

On the other hand, the frequency-divided pulse DPI is also input to the data output of a D-type flip-flop (hereinafter abbreviated as D-FF) 3. A signal obtained by inverting the color subcarrier signal SC by an inverter 4 is input to the clock signal φ of this D-FF3, and its set output Q is input to the data signal of the next D-FF5. A signal obtained by inverting the color subcarrier signal SC is also input to the clock input φ of the D-FF5.

Therefore, from the set output Q of D-FF3,
) as shown in FIG.
The set output Q of -FF5 outputs a signal SC2 which is obtained by roughly delaying the signal SC1 by one cycle of the signal SC.

Signals SC1 and SC2 of the set outputs Q of the D-FFs 3 and 5 are input to a selector 10 composed of an AND gate 6.7, an OR gate 8, and an inverter 9.

This selector 10 indicates that the frequency divided pulse DP2 of the frequency divider 2 is “
When H'', the output signal SC1 of D-FF3 is selected and output, and after L6+, the output signal SC2 of D-FF5 is selected and output, and the selected output signal is used as the reference signal of the servo circuit (
The frequency divider 1 is configured to be outputted as the frequency fFD)Sref and to reset the frequency divider 1. That is, in the selector 10, the output signal 5C22 of the AND gate 6 as shown in FIG. Figure 2 (g
) is selectively outputted from the AND gate 7 as shown in FIG.

This causes the frequency divider 1 of DR=59717 to
Outputs 4 times, one time is reset after a delay of time corresponding to 1 count value from callan 1 to value 59717,
Also, three out of four times, the reset is delayed by a time corresponding to two count values from the count value 59717.

Therefore, the frequency divider 1 outputs the signal@DPI four times, one time is divided by the frequency division ratio of r59718J, and the remaining three times are divided by the r5
This means that the frequency is divided by a frequency division ratio of 9719J. As a result, 1q of the reference signal 3Ref of the frequency fFD that satisfies the conditions of the above-mentioned equations (1) and (2) is obtained.

Note that the reason why the inverted signal of the color subcarrier signal is input to the clock input φ of the D-FFs 3 and 5 is to ensure that the frequency divider 1 is reset.

Furthermore, in this embodiment, by delaying the reset timing of the frequency divider 1, the frequency division ratio is changed to the first frequency division ratio (DR
= 59718) and the second frequency division ratio (DR = 59719), but if a presettable counter is used as frequency divider 1, the same standard can be achieved by controlling the preset timing of the preset value. Signal 5 Ref
can occur. In addition, a monitoring circuit is provided to monitor the count value of frequency divider 1, and the count value is r597.
Even if the reset is applied in the evening when the temperature reaches 18J or r59719J, the same result will occur.

[Effects of the Invention] As explained above, the present invention switches the frequency division ratio of the frequency divider that divides the color subcarrier signal every predetermined frequency division period, so that This has the effect that the frequency offset with the reference signal can be eliminated, and as a result, the frequency offset between the luminance signal and the color subcarrier signal can also be eliminated.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an embodiment of a reference signal generating circuit to which the present invention is applied, and FIG. 2 is a time chart showing input/output signals of each part in the embodiment. 1.2... Frequency divider, 3.5... D-type flip-flop, 6, 7... AND gate, 8... OR gate,
10...Selector. Agent Patent Attorney Nori Chika Yudo Hiroshi Uji

Claims (1)

[Claims] In a reference signal generation circuit of a magnetic recording and reproducing device that has a frequency divider that divides a color subcarrier signal and generates a reference signal used in a servo circuit of the magnetic recording and reproducing device, a frequency divider that divides a color subcarrier signal is used. A reference signal generation circuit for a magnetic recording/reproducing apparatus, characterized in that the reference signal is generated by switching a frequency division ratio of a frequency generator between a first frequency division ratio and a second frequency division ratio every predetermined frequency division period.