JPS6234433A - Receiver for optical communication - Google Patents

Abstract

PURPOSE:To prevent malfunctions caused by marginal light, by separating the output of a light receiving means into a marginal light component and optical signal component and comparing the marginal component with a prescribed quantity, and then, changing the sensitivity of the light receiving means correspondent to the compared result. CONSTITUTION:A capacitor C1 is used for cutting off a DC component and an inductance L1 and resistance R1 make a photoelectric current produced by a signal component to flow to the direction of the capacitor C1 and another photoelectric current produced by a marginal light component to flow to the direction of the inductance L1. Moreover, a comparator CON1 compares the voltage across both ends of the resistance corresponding to the intensity of the marginal component with a reference voltage and decides whether or not the intensity of the marginal light exceeds a prescribed value. In accordance with the decided results, the comparator CON1 controls the wave detecting sensitivity and prevents noises from being transmitted to a data reading circuit.

Description

[Detailed description of the invention] ■! BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an optical communication device that performs communication using optical signals, and more particularly to a receiving device thereof.

Conventionally, various optical communication devices that perform communication using optical signals have been known.

However, in conventional devices, when there is a large amount of extraneous light other than optical signals, the light receiving element consisting of seven photodiodes generates a photocurrent due to well-known shot noise or pulses caused by fluorescent lamps, etc. , there is a risk that the receiving device may malfunction.

SUMMARY OF THE INVENTION Therefore, it is an object of the present invention to provide an optical communication receiver in which the risk of malfunction due to such external light is reduced.

In order to achieve the above object, the optical communication receiving device according to the present invention includes a light receiving means that outputs an electric signal according to the amount of received light, and the output is converted into an external light component. Separation means for separating the optical signal component into optical signal components; Comparison means for comparing the extra-circular light component with a predetermined amount; Receiving means for receiving the optical signal component; Sensitivity switching for switching the sensitivity of the receiving means according to the comparison result of the comparison means. It is characterized by having a means.

According to the present invention, the sensitivity of the receiving means is reduced when there are many extraneous light components to prevent malfunctions due to extraneous light components.
Even if there are many external light components, the risk of malfunctions can be extremely reduced.

(The following is a blank space.) Embodiments of the present invention will be described in detail below with reference to the drawings.

FIG. 11 is a perspective view showing a camera system that transmits photometric information and controls operations using the optical communication device according to the embodiment of the present invention. In Figure 1, (2) is the camera body with the photographic lens (4) attached, and (6) is electrically connected to the camera body (2) as described later. A receiver of the optical communication device, (8) is a bracket 7) electrically and mechanically connected to the camera body (2) on the bottom surface of the camera body (2), and (10) is a receiver (10) that is connected to the camera body (2) through the bracket (8). This is an electronic flash device that is electrically connected to the camera body (2).

As shown in the front view of the Pt52 diagram, the receiver (6) includes a light receiving window (101) for receiving the optical signal from the transmitter shown in the PIS3 diagram, a power switch (102), and a battery to be described later. A light emitting diode (103) is provided for a voltage drop warning which is turned on when the check circuit determines that the power supply voltage is insufficient. Furthermore, a pair of light receiving lenses (
104) and a pair of upper and lower light shielding doors (105) that can be opened and closed.
are arranged respectively. Its light-shielding 7-door (105
) has a pair of protrusions (10
5a) is formed. (106) is a reception display window, and when a normal reception operation is performed, the
! ! Light-emitting guide (107) for displaying reception, which will be described later
will flash to notify the operator controlling the transmitter that normal reception has occurred. At the rear of the pair of light receiving lenses (104), light receiving elements (PCI) (PD2) each consisting of a photodiode, which will be described later, are arranged.

The receiver (6) has an upper part (6a) and a lower ff1sC.
The shoe (108) provided at the bottom (6b) is attached to the camera body (2) by fitting into the shoe (108) of the camera body (2), and the state is fixed (fixed). (109). In this state, the movable contact pin (110) formed on the shoe 77 (108) contacts the fixed contact provided on the accessory shoe of the camera body (2), and the receiver (6)
) and the camera body (2) are electrically connected. As a result, the camera main body (2) receives exposure data and control data sent from the transmitter via the reception 1ff (6), and further transmits necessary data from the bracket (8). It is also transmitted to the electronic flash VC device (10) via the electronic flash VC device (10).

The upper part (6a) of the receiver (6) can rotate relative to the lower part (6b) about the pongee (X) extending in the vertical direction in Fig. 2, and has a light receiving window (101) and a light receiving display. window(
106) can be changed.

In addition, Uke [! The exposure data received by (6) may be configured to be transmitted to the camera body (2) via a signal hood (111) connected to the input terminal (2a) of the camera body (2). In addition, exposure data is transmitted from the movable contact pin (110) and control data is transmitted from the signal code (111).
The configuration may be such that the information is transmitted to the camera body (2), respectively.

FIG. 3 is a block diagram showing the electric circuit of this embodiment. In FIG. 3, (12) is the transmission (: PIj) of an optical communication device that transmits a digital signal to be transmitted modulated to several tens of KHz as infrared light.

In the transmitter m (12), a meter (M) and a transmitter circuit (1, 2a) are provided. Here, the meter (
M), for example, as proposed by the applicant in Japanese Patent Application No. 59-17897,
The amount of light emitted per flash is measured using the incident light method and stored, and the film sensitivity,
Appropriate shutter speeds and aperture values are calculated from setting data such as shutter speed and aperture value and photometry results and output as exposure data. This exposure data is then converted into an infrared light signal by the transmitting circuit (12a) and transmitted, and is thus received by the light receiving element (PD2) consisting of a photodiode of the receiver (6). Ru.

(E) is a power battery of the receiver (6), and (SW,) is a power switch of the receiver (6). Power switch (S
When W + ) is closed, the photodetector (PD, )
(P D 2) is the transmission If! <12) and outputs a current (, ) according to the intensity of the infrared light signal.

This output current (a) is input to an amplification and detection circuit (14), which amplifies and detects this output current (a) and outputs it as a data signal (b) to a subsequent data reading circuit (16). to communicate. Furthermore, this amplification detection circuit (14)
is the light receiving element (P D , ) (P D
2) A warning signal (c) is output when the steady light component (hereinafter referred to as extra-circumferential light) incident on the light reaches a predetermined value or higher in intensity. The detailed configuration of this amplification/detection circuit (14) is shown in FIG. 4 and will be described in detail later.

The data reading circuit (16) is a circuit that reads and checks the data signal (b) from the amplification/detection circuit (14), stores the data in order to transmit it to the camera body (2), and transfers the data. Yes, and includes an interface circuit for data transfer. Then, the data reading circuit (1
6) transfers the read exposure data to the camera body (2) via the movable contact bin (110) shown in FIG. Further, the data reading circuit (16) includes an amplification detection circuit (16).
If the data signal (b) transmitted from 4) is correctly read, it outputs a signal (d) indicating that the fi signal transmitted by optical communication has been correctly read. From then on,
This signal (d) is called a 7-eye signal.

(18) is a timer circuit, which is a power switch (SWl).
) is closed for a certain period of time, the timer signal (e) output is set to "l(". This timer signal (e)
is a NOR circuit (N
The output signal (g) of this NOR circuit (NOR, ) is further input to one input terminal of an AND circuit (AND, ). The output signal (") of the oscillator (20) is input to the other input terminal of the AND circuit (AND, ).The output signal (") of the NOR circuit (NOR1) is input to the other input terminal of the AND circuit (AND,
g) and the output signal (h) of the AND circuit (AND, ) are input to one-shot circuits (22) and (24), respectively. These one-shot circuits (22) (24)
are each configured to output a pulse with a constant time width in response to the rising edge of the input signals (g) and (h).

The output of both one-shot circuits (22) and (24) is
)('') both pass through the OR circuit (OR1) to the signal (
k) to the battery check circuit (26). The battery check circuit (26) checks the power supply voltage Vcc at a timing according to the input signal (k), and if the power supply voltage Vcc is below a predetermined value, it latches it and outputs an output signal (1). Then, the voltage drop warning light emitting diode (BCLED) is turned on. The operation of this battery check will be described in detail later.

The warning signal (c) of the amplification detection circuit (14), the verify signal (d) of the data reading circuit (16), and the timer signal (e) of the timer circuit (18) are each input to an OR circuit (OR,). Ru. And OR circuit (OR1)
The output of is input to the display drive circuit (30) as a signal (1) via the delay circuit (28),
When any one input signal of R, ) becomes "H", a verify display light emitting diode (VLED) is turned on by the display drive circuit (30) after a certain period of time determined by the delay circuit (28). In other words, the timer circuit (18) outputs the timer signal (e) when the intensity of the peripheral light exceeds a predetermined value and when the data is accurately read. If so, the display drive circuit (30
) is turned on by the output signal (,). Further, when the output of the OR circuit (OR,) becomes L'', after a certain period of time determined by the delay circuit (28), the display drive circuit (30) activates the verification display light emitting diode (V
LED) is turned off.

Next, Fig. f54 shows the detailed configuration of the amplification/detection circuit (14) of this embodiment. In Fig. 4, the light receiving elements (PD, ) (Pl)2) consisting of two photodiodes are connected in parallel with each other, and the output signal (a
) is retrieved. The 7 nodes of both photodetectors (PD, > (PD2)) have an inductance (L, ) and a resistance (R3
) is grounded through. Further, the output signal 4g (a) is input to an amplifier (32) via a capacitor (C5), and the output signal (a) is amplified by the amplifier (32). This amplified signal is input to the detection circuit (34), which detects the signal that has been modulated at several tens of KHz and demodulates it to the original dinotal signal, which is then sent to the subsequent waveform shaping circuit (36). transmitted to. The waveform shaping circuit (36) shapes the waveform of the input signal to be suitable for the subsequent data reading circuit (1G) and outputs it as a data signal (b).

The inductance (Ll) is connected in series with the resistor (R1), and the connection point is the humparator (CON,)
is connected to the non-inverting input terminal of On the other hand, Hunpareta (
A reference power source (Vref, ) that generates a reference voltage is connected to the inverting input terminal of CON, ). Then, the output of the humparator (CON, ) is the above-mentioned warning signal (c).
At the same time, it is also input to the base of the transistor (Tr). The collector of this transistor (Tr) is connected to the detection circuit (34) via a resistor (R1), and the emitter is grounded. Furthermore, the detection circuit (34) is grounded via a resistor (R2).

Here, the transistor (Tri) is used as a switch, and is conductive when the output signal of the humparator (CONI) is H'', and is non-conductive when it is ``L''.

The operation of the amplification/detection circuit having such a configuration will be explained. First, when external light unrelated to the signal to be transmitted hits the light receiving element (P D ,) (P D 2)%,
A photocurrent is generated that is proportional to the intensity of the ambient light.

Such a charging current has a direct current component or a frequency of 60Hz x 2 (
The impedance in the direction of the inductance (L,) is low, and the input impedance in the direction of the capacitor (C,) is a DC component or 60Hz (or 50Hz
Since the low frequency component of Hz)X2 has a high impedance, the charging current flows in the direction of the inductance (L, ) and the resistance (R3). And resistance (R3)
A voltage is generated across the terminal according to the charging current. This voltage is set as the reference power supply (VrcL) by the comparator (CON, ).
When the voltage across the resistor (R,) is lower than the reference voltage, the intensity of the external light component is low and the charging current generated in the photodetector (PD, ) (PD2) is small. , the output of the comparator (CON, ) becomes "L", and the warning signal (c) is not generated. Therefore, in this case, the transistor (Tr) becomes non-conductive, and the current flowing from the detection circuit (34) to the 7-path is kept small by the resistor (R2), and its detection sensitivity is set high. In other words, the light receiving element (PD, ) (P
When the charging current generated in D2) is small, the detection circuit (
The sensitivity of 34) is set high.

In this state, several 10 KH from transmission If(12)
The infrared light signal modulated to z is sent to the photodetector (PD) (PD
2), the light receiving element (PD, ) (PD2) generates a photocurrent due to the peripheral light component and a photocurrent due to the infrared light signal. However, the inductance (Ll) has a high impedance to AC components, while the capacitor (Ll) has a high impedance to AC components.
Since the impedance of C3) decreases, the photodetector (PD
, ) (PD, ), the alternating current component, that is, the charge current component due to the infrared light signal component, is charged to the capacitor (C1
) and is input to the amplifier (32) and amplified. Then, the DC component, that is, the charging current component due to external light is cut off by the capacitor (C4), and therefore flows toward the inductance (Ll) and the resistor (R1). The signal amplified by the amplifier (32) is input to the detection circuit (34) set to be highly sensitive as described above and detected, and the waveform is shaped by the waveform shaping circuit (36) to form the data signal (b). ) is output to the data reading circuit (16).

Conversely, the light receiving element (P D , ) (P
If the output charging current component of D2) is large and the voltage across the resistor (R1) is larger than the reference voltage, the comparator (C
ON, ) output becomes "I("), a warning signal (c) is issued, and the verification display light emitting diode (■L E
D) is lit to warn the user that accurate signal transmission may be interfered with by extraneous light. Furthermore, when the output of the humpator (CON, ) becomes "H", the transistor (Tr, ) becomes conductive, and the detection circuit (34) is grounded through the resistor (R1) in addition to the resistor (R2), and the detection circuit ( As the current flowing from 34) to ground increases, its sensitivity decreases.

This is to remove the well-known effects of shot noise and fluorescent lighting. In other words, the intensity of shot noise is approximately proportional to the square root of the brightness of the external light, and when the external light is strong,
The shot noise mentioned above may be mistaken for a signal component, and the pulsed light from a fluorescent lamp may be mistaken for a signal component, so in order to prevent this, in this embodiment, the extraneous light component is If it is strong, the detection circuit (34)
This reduces the sensitivity of the signal to prevent these noises from being transmitted as a signal.

Here, in order to prevent the output of the comparator (CON,) from repeating "I"("L") due to the illumination of the AC light source, it is necessary to provide hysteresis to the comparator (C0N,). However, since it is not directly related to the present invention, its explanation will be omitted.

That is, to summarize the functions and operations of each electric element in the circuit shown in FIG. The charging current due to the capacitor (C
1), and serves to cause the photocurrent due to the peripheral light component to flow in the direction of the inductance (L, ). Furthermore, the comparator (CON,)l! , the voltage across the resistor (R1) corresponding to the intensity of the external light component is compared with a reference voltage to determine whether the intensity of the external light is greater than or equal to a predetermined value. Here, since the inductance (Ll) has almost no DC resistance value -1,
By reducing the resistance value of the resistor (R1), it is possible to improve the load characteristics when a load resistor is connected to the photodetector (PD2). In other words, it is possible to accurately receive optical signals without the circuit becoming saturated even under high illuminance.

However, if the illuminance becomes too high, noise due to the external light component will be transmitted to the data reading circuit (16) as the data signal (b), so in this embodiment, the comparator (CO
The detection sensitivity is controlled according to the determination result by N,) to prevent noise from being transmitted to the data reading circuit (16), and to display when the extra-circular light component is strong.

ft55 is a circuit diagram showing a modification of the amplification/detection circuit of FIG. 4. In the configuration shown in Figure 4, the funparator (CON,
), the sensitivity of the detection circuit (34) was switched according to the judgment result of the comparator (CON
,), the amplification degree of the amplifier (32) is adjusted in accordance with the determination results of , ). To explain the difference between the configuration shown in FIG. 5 and the configuration shown in FIG. 154, the amplifier (32) has a resistor (R
1) and grounded via a capacitor (C2). The output of the comparator (CONl), whose non-inverting input and inverting input are opposite to those in FIG. A transistor with its emitter connected (
Tr2) are connected together. Therefore, the amplifier (
The amplification degree of 32) is determined by the resistors (R5) and (R6).

In other words, when the outer light component is small and the resulting photocurrent is small, the output of the comparator (CONl) is H"
And since the transistor (Tr2) is conducting,
The amplification degree of the amplifier (32) is determined by both the resistors (R3) and (R6), and is set to a high amplification degree. When the outer light component is large and the resulting photocurrent is higher than the reference voltage, the output of the comparator (CON, ) becomes "L" and the transistor (Tr2) is made non-conductive, so that the amplifier (32) The amplification degree of is determined only by the resistor (R6) and is set to a lower amplification degree. Therefore, according to this modification, when the external light component is strong, by lowering the amplification degree of the amplifier (32), noise is prevented from being transmitted to the data reading circuit (1G) as the data signal (b). are doing. Incidentally, in this modification, the output of the humpator (CON) is output from the inverter (I V
), and the output of this inverter (IV) is used as a warning signal (c).

Furthermore, FIG. fjS6 is a circuit diagram showing another modification of the amplification/detection circuit shown in FIG. 4. In this modification, the detection circuit (34
) is configured to switch the sensitivity in three stages.

In this modification, inductance (Ll) and resistance (R
1) is connected to the non-inverting input terminal of the second comparator (CON 2). A second reference power supply (Vre "2") that generates a reference voltage higher than the reference power supply (■rel+) is connected to the inverting input terminal.The output of this humparator (CON 2) is It is connected to the base of a transistor (T"3) whose collector-emitter is connected in series to a resistor (R7) provided between the detection circuit (34) and ground.

With such a configuration, if the voltage across the resistor (R2) corresponding to the intensity of the external light component is sufficiently low, the comparator (
The output of both CON, ) (CON2) is L'',
Therefore, since both the transistors (T rl) and (T C3) are non-conductive, the sensitivity of the detection circuit (34) is reduced by the resistance (R2).
) and has the highest sensitivity. When the voltage across the resistor (R1) becomes a little higher than that, the reference voltage of the reference power supply (1rcL) is higher than the reference voltage of the reference power supply (1rcL).
Since it is lower than the reference voltage of Vref2), only the output of the comparator (CON,) becomes I('', and only the transistor (Tr,) is conductive and the resistor (R2) is connected in parallel to the resistor (R2).
R1) is connected. Therefore, in this case, the sensitivity of the detection circuit (34) is reduced by one step. Furthermore, when the external light component becomes even stronger and the voltage across the resistor (R1) becomes even higher, the output of both the humperators (CON, ) (CON2) becomes "11" and both the transistors (Trl) (Tr, ) become conductive. Resistor (R1) in parallel with (R2)
and a resistor (R1) are connected, and the sensitivity of the detection circuit (34) is further reduced to the second stage. In this way, according to this modification, the sensitivity of the detection circuit (34) can be changed in three stages. In this modification, the output of the humpator (CON 2) is used as the warning signal (e).

If it is necessary to change the sensitivity of the detection circuit in four or more stages, the number of resistors, transistors, comparators, and reference power supplies may be increased in the same way. Further, similarly to the modification shown in FIG. 5, it is possible to easily change the amplification degree of the amplifier (32) in three or more stages depending on the intensity of the outer light component.

Next, the operation of the battery check system shown in FIG. 3 will be explained using the time chart shown in FIG. 7. 7th
In the figure, (1) shows the operation when the voltage of the power supply battery (E) is sufficient. First, when the power supply switch (SW, ) is closed at the time Jto, the timer circuit ( 18) FlTIT at constant time.

A timer signal (e) is generated. Also, by closing the power switch (SW, ), the signal (r
) is emitted. In this case, the amplification detection circuit (14)
Warning No. 4M (c) and data reading circuit (16) glide 7 eye signal (d) are not emitted, and the surface output is L”
It remains as it is. Then, the output signal (f
) causes the output of the OR circuit (OR, ) to become “H”,
Therefore, it is opened at a predetermined time τ after the output of the OR circuit (OR, ) becomes “H”. The output signal of the delay circuit (28) is delayed by
m) becomes 'H'.Furthermore, the display drive circuit (30) is driven by the output signal (,) of this delay circuit (28), and its output signal (b) becomes '■-r' and is verified. A display light emitting diode (VLED) is turned on.

Here, since the C1 timer signal (e) becomes "H", the output signal (g) of the NOR circuit (NOR) becomes "L", and therefore the output signal (") of the oscillator (20) becomes "H".
It does not appear in the output (h) of l).

At time t, when the timer signal (e) of the timer circuit (18) becomes "L", the output signal (g) of the NOR circuit (NOR) is inverted to "I", and the one-shot circuit (
A short pulse No. 13 (i) is emitted from 22). This pulse No. 13 (i) is input to the pantel check circuit (26) as No. 3 (k) via the OR circuit (oR2). Then, the pantel check circuit (26) checks the power source battery (E) at a timing corresponding to this input pulse (k).
It is determined whether the power supply voltage VCC is equal to or higher than a predetermined value indicated by Vref3 in FIG. 7.

During the time when this battery check is being performed, the output signal (1fi) of the delay circuit (28) is output from the OR circuit (OR,).
time τ from the output of . Since it is delayed by 11",
The light emitting diode (VLED) for verify eye display continues to be lit.

Then, when the timer circuit (18) has elapsed, the timer (H (e) becomes L". Then, the output signal (g ) is inverted to “H”, so the AND circuit (
A signal synchronized with the oscillation signal (r) of the oscillator (2o) is output from the AND circuit (ANI),
The signal is input to the one-shot circuit (24,) as a signal (b). Therefore, the signal (
11), a short pulse (No. 7 (j)) is outputted every time the signal No. 11) rises.The period of this pulse No. 4M (J) is synchronized with the oscillation signal of the oscillator (20).

This pulse (IT number ('') is input to the battery check circuit (26) as a signal (k) through the OR circuit (OR2), and the power supply voltage Vcc is checked at a timing corresponding to this pulse signal (k). It will be done.

In the time T2 from time t2 to t in Fig. 157 and the time T2 from time L4 to t, an infrared optical signal corresponding to the transmission data is transmitted from the transmission fi (12), and the signal is transmitted to the amplification/detection circuit. (14) shows the state of each signal when it is amplified and detected and read by the data reading circuit (16). In this case, the timer circuit (18
The timer signal (e) of ) remains at "■-", and the warning signal (e) from the amplification/detection circuit (14) also remains at "L" because the extra-peripheral light component is small.

When the data reading circuit (16) accurately reads the transmitted data, a verify signal (d) of "H" is generated for a certain period of time T2. This verify signal signal (d
), the output of the OR circuit (OR, ) becomes "H" for a certain period of time T2, and therefore the output from the delay circuit (28) becomes "H" for a period of time τ. After a delay, an "H" signal (m) is output for a time T2. This "H" signal (Ua) causes the display drive circuit (
30) is driven and outputs a signal (n) of "r" for a predetermined time T2, and therefore a verify display light emitting diode (VLED) is lit for a time T2. Furthermore, “H
The verify signal (d) of ``inverts the output signal (g) of the 77 circuit (NOR, ) to L'', so the AND circuit (A
Since one input of the AND circuit (ND, ) becomes L", the AND circuit (
The output signal (11) of AND, ) remains "L".

Therefore, the output signal of the oscillator (20) (n is the AND circuit (A
It no longer appears in the output signal (11) of ND, ). Therefore, while data is being read, both inputs (i) and (j) of the OR circuit (or+2) remain at "L", so no battery check operation is performed during this time.

Then, when the verify signal (d) of the data reading circuit (16) is inverted to "L" at the clock time or 1S, the time 1. Similarly, a short pulse signal appears in the output signal (i) of the funshot circuit (22), and the power supply voltage Vcc is checked by the battery check circuit (26) in accordance with the timing of this pulse.

At this time, the delay circuit (28) inverts the edge 7 eye signal (d) for a time τ. The display drive circuit (30
), the verify display light emitting diode (VLED) is lit.

Next, the operation from time t6 to t7 in FIG. 7 will be explained. This is an operation when the intensity of the external light is high.

First, when the amplification/detection circuit (14) determines that the intensity of the external light is greater than or equal to a predetermined value, it outputs "H" as a warning signal (C). As a result, the output of the OR circuit (OR,) is l
-1", and the verification display light emitting diode (VL
ED) is lit to warn the user that the intensity of the external light is high.

In this case, the timer number (e) of the timer circuit (18) is "L", and the gate 7 eye signal (d) of the data reading circuit (16) is also "L". Therefore, the NOR circuit (N
The output signal (g) of OR, ) becomes “H” and the OR circuit (
As the output signal (k) of OR2), a short pulse is emitted according to the oscillation signal D) of the oscillator (20).

: Accordingly, the battery check circuit (26) is '
, and periodically check the three source voltages Vcc.

Here, a timing pulse (signal (k)) for activating the battery check circuit (26) is generated at a certain time. The reason why it is not emitted between Ll and Ll, [2 and t3, and between t and L5, and is only emitted at other times is as follows. is immediately after the power switch (SW, ) is closed, and the light emitting diode (■1-r=D) for displaying the 7 eyes is lit for a certain period of time T1 after the power switch (SW, ) is closed. During that time, a light emitting diode (13CL E l) for warning of voltage drop is installed to eliminate clutter in the display.
) will not be lit. Then, from the time to L
3 and from t to t, if a battery check is performed during this time and the power supply voltage Vec is at a predetermined value\' r
If it is determined that ef is 3 or less, "11" is input from output No. 15 (0) of the battery check circuit (26) to the data reading circuit (16), thereby causing the verify signal t(d) to become "H". '', the light emitting diode (VLED) for verification display is turned on tlY, and the light emitting diode (VLED) for verification display is turned on to stop operation. This is because the time period 9 becomes shorter and the fixed time period T2 is no longer reached. Therefore, in this embodiment, the battery check operation is not performed during the above three times.

Furthermore, in the receiver of such an optical communication device, the light emitting display needs to be visible from a far away position, and therefore the display light emitting diode is driven with a very large current. Therefore, it is not preferable to light up the voltage drop warning light emitting diodes (BCL, ED) while the verify display light emitting diode (\/LED) is lighting up, so from time L0 to Ll, L2 to 1, and t.
The structure is such that the one-day banter check is not performed between 4 and t5.

However, at time t. Ten τ. From L1+τ. , L2+τ0 to t, +τ. , and L4+τ. From t, ten τ. While the verification display light emitting diode (VLED) is on, the power supply voltage Vcc seems to be the lowest just before the light emitting diode (VLED) is turned off, so the τ. Only before,
That is, the battery is checked at times t1, tl, and tsl2 to check whether the power supply voltage can be stably supplied from now on.

(2) in the time chart of FIG. 7 shows the operation when the power supply voltage Vcc falls below the predetermined value Vref3. The battery check circuit (26) is an OR circuit (OR circuit).
2) Check the power supply voltage Vcc according to the output pulse (k>), and at time t, the voltage Vce reaches the predetermined value V.
If it is determined that it is below ref3, output (+) (0)
As a result, the voltage drop warning light emitting diode (BCLED) is turned on to indicate a drop in the power supply voltage, and the operation of the data reading circuit (16) is stopped. Then, once the power supply voltage Vce becomes equal to or less than the predetermined value Vrer-, the battery check circuit (26) then returns the predetermined value Vre to
Even if the temperature exceeds fY, the output (+) (0) will remain in the "II" state, and this can be canceled using the power switch (SW).
This is done by opening up.

Furthermore, (3) in the time chart of FIG. 7 shows the case where the power supply voltage Vce drops below the predetermined value Vref when the power switch (SWl) is closed and the timer circuit (18) is operating. Showing operation. Here, as mentioned above, the timer signal (e) of the timer circuit (18) is I(''
At a certain time, the battery check is not performed at the time T when the mustard to is opened, and the timer signal (e) is L'''
The battery check circuit (26) is activated for the first time at 1G, and it is determined that the power supply voltage Vcc is below the predetermined value Vrer3, and the voltage drop warning light emitting diode (BCLED) lights up. It will be done.

Furthermore, in (4) of the time chart, the power battery (E) is exhausted and when the power switch (SW, ) is closed, αt
Before 11, the battery voltage E becomes the limit voltage for circuit operation and light emitting diode drive. This shows the behavior when the value is lower than . In this case, the power switch (S
Even if the WI) is closed, the surface-emitting diode (VLIED) (
Since both LEDs (BCLED) do not light up, a voltage drop in the power supply battery (E) is immediately indicated. Here, as is clear from comparing (1) and (4) in the time chart, (1)
In the normal state, after the power supply switch (SW) is closed, the verification display light emitting diode (~
If the battery voltage drop (VLED) is not turned on, it will not be possible to display a display that is distinct from the case when the battery voltage drops (4). Therefore, in this embodiment, the verification display light emitting diode (VLED) is turned on for a certain period of time T1 in the normal state. There is.

(5) in the time chart indicates that the data reading circuit (16) accurately reads the transmitted data, thereby making it "H".
This figure shows the operation when the power supply voltage Vcc becomes less than or equal to the predetermined value Vref when the verify signal (, J) is output and the verify display light emitting diode (VLED) is turned on. In this case, a light emitting diode (■L E D ') for verification display is used as in the j-multiplex.
The battery check circuit (26) is activated by the battery change timing pulse (k) at time t14 when the power supply voltage Vcc is turned off, and the power supply voltage Vcc is checked and its drop is determined, and a voltage drop warning is issued. The light emitting diode (B CL ED ) is turned on to warn of a drop in the electric voltage.

Next, the internal structure of the receiver (in(6)) shown in FIG. 1 will be explained. First, FIGS.
It is a cross section. In FIG. 8(a)(b), the light receiving window (1
01) includes a pair of light-receiving lenses (104), a pair of band-pass filters (112), and a light-receiving element (pD
, )(P D 2) are arranged in order from the outside world.

Further, a pair of upper and lower light-shielding hoods (105) are provided on the outside side of the light-receiving lens (104), respectively.

Figure 8 (a) shows the light shielding when the opening angle of the light shielding 7-door (105) is increased, and Figure 8 (b) shows the light shielding when the opening angle of the continuous light 7-door (105) is small. 7-de (105)
The relationship between the position and the incident light toward the element chip (PDa) in the light receiving element (P D , ) (P D 2) is shown.

FIG. 159 is a perspective view showing the structure of the light shielding 7-door (105) and its rotating shaft (113) of the above-mentioned section 1. The light shielding door (105) is sandwiched between its rotating base (105b) and the head (113a) of a rotating shaft (113) fixedly provided on the receiver body (6). Friction washer (114
) is held on the rotating shaft (113) by J2 friction. And the light shielding 7-door (105) is the operation! (
105a) by manually operating the two rotating shafts (105a).
13), and can be rotated around fjS (a
) and (b), the opening angle can be set arbitrarily and continuously steplessly.

FIG. 10 is a graph showing the specific sensitivity incidence characteristic of the light receiving element (P D , ) (P D 2) with respect to the incident light beam.

In Figure 10, the curve (A) shows the characteristics when the opening angle of each two-element 7-de (105) is increased as in Figure i98 (, ), and the curve (B) shows the characteristics in Figure 8. It shows the characteristics when the opening angle of the light shielding door (105) is made small as shown in (1,).

The light-shielding door (105) is normally used with the opening angle at its maximum as shown in FIG. 8(a). In this case, the light flux incident within the range of incidence angle α from the optical axis is transmitted to the element chip (P
It is possible to capture the entire surface of Da). In this case, the specific sensitivity characteristic of the light receiving section becomes wide as shown by the curve (A) in FIG. 1(). On the other hand, if there is an extremely large amount of external light, that is, if the brightness of the background of the transmitter is extremely high, the receiver cannot receive signals normally. In this case, it is effective to reduce the opening angle of the light shielding door (105) as shown in FIG. 8(1)). In this state, only the light beam incident almost parallel to the optical axis can be received by the entire surface of the element chip (PDa), and the light beam with an incident angle of β or more does not reach the element chip (PDa) at all. In this case, the specific sensitivity characteristic of the light receiving section becomes narrow as shown by track #1j (B) in FIG. Comparing curves (A) and (B), we find that on the optical axis (θ
= 0), both curves have almost the same specific sensitivity, and the area surrounded by the curve and the horizontal axis is larger for curve (B) than for curve (B).
It can be seen that it is a fraction of Δ). Therefore, when the ambient light is strong, the song A9! In order to obtain the specific sensitivity characteristic shown in (B), the light-shielding hood (1
-05) and receive 8! The transmitter (
12) and perform communication, the transmission f: 4 + fi (12
) can be kept almost the same as in the state shown in FIG. 8(a), while the influence of extraneous light can be reduced to a fraction of that. As a result, it is possible to achieve normal reception in the state shown in Figure m8 (,).

Furthermore, since the two light shielding doors (105) can be adjusted to open and close independently, it is also possible to set the center of the aperture created by the two light shielding doors at a position offset from the optical axis. . Therefore, it is also possible to set the specific sensitivity characteristic as shown by curve (B) in the tjS10 diagram with the center shifted from the optical axis.

FIGS. 11(a) and 11(b) each show the A section in FIG. 1. In FIG. 11(,)(b), a verification display light emitting diode (VLED) is housed inside the receiving JA display window (10G). Figure 11 (,) is
It shows a reverse trace of the light rays reflected on the outside side of the reception display window (106) when viewed from a distance along its optical axis. In addition, rjS11 diagram (b) shows a reverse trace of light rays when the reception display window (10G) is viewed from a distance shifted by a certain angle from its optical axis. Furthermore, FIG. 12 shows the spectral transmittance characteristics (C) of the reception display window (106) with respect to wavelength and the verification diode (VL).
The relative intensity characteristics (D) with respect to the wavelength of light emitted by ED) are shown superimposed.

As for the reflected light at the outer surface (106a) of the reception display window (10G), as shown in FIG. (6
c). Therefore, when looking at the reception display window (10G), the pit wall (6c) of the main body of the receiving rock is reflected on its surface (106a). And this pit wall part (6c) is painted black VC'! ';' makes the reflectance low. Therefore, with this configuration, direct reflected light from the outside world does not appear reflected on the outer surface (106a) of the reception display window (106), and a surface with low reflectance appears reflected on the reception display window (106). (10G) surface brightness can be kept low. Also, the reception display window (
The side surface (1,06b) of the light emitting diode (106) also has exactly the same effect as the outer surface (106b). With this configuration, the reception display window (1
Since the brightness of external light reflection of 06) can be reduced,
The S/N ratio of the brightness seen from the outside when the internal 7-eye display light emitting diode (VLED) is turned on can be increased, and the blinking can be easily confirmed by an observer.

In addition, as shown by track #X (C) in Figure 12, the reception display window (106) transmits most of the light emitted by the verification display light emitting diode (VLED) in the visible range, and transmits most of the light emitted by the verification display light emitting diode (VLED) in the visible range. Made of material that absorbs light. Therefore, the chip surface (ch) of the light emitting diode (VLED)
A majority of the components of the external light illuminating the reflective umbrella surface (RP) are blocked by the reception display window (10G). On the other hand, most of the light emitted from the verification eye display light emitting diode (VLED) can pass through the reception display window (IOE) and exit to the outside world. Therefore, the spectral transmittance characteristics of this reception display window (10G) can also increase the S/N ratio of the brightness seen from the outside when the internal verification eye display light emitting diode (V L ED ) blinks. This makes it easier for an observer to confirm blinking.

As described in detail below, according to this embodiment, when there is a possibility that accurate data communication using signal light cannot be performed due to strong intensity of external light, the verification display light emitting diode (V L E D ) As a warning is issued by lighting up, the user can take measures such as changing the direction of the receiving fi (6" I) to ensure accurate data communication, and prevent malfunctions due to inaccurate information transmission. This can be prevented beforehand.Furthermore, when the intensity of the extraneous light is strong, the sensitivity of the amplification and detection circuit (14) can be lowered to reduce the possibility of malfunction due to the extraneous light.Furthermore, according to this embodiment , if the power supply voltage is sufficient, turn on the power switch (S
The verify display light emitting diode (V L E D ) is illuminated with −χ for a certain period of time after the opening of the WI),
When the power supply voltage has slightly decreased, the verification display light emitting diode (V L E D ) and the voltage drop warning light emitting diode (BCLED) are turned on, and the power supply voltage is extremely low. If the voltage decreases, the voltage of both optical diode (V L E D ) (B CLE
D) Since neither of them is turned on by α lighting, three types of states can be distinguished and displayed using two display elements. Further, according to this embodiment, the amplification detection circuit (14
), it is possible to separate the charging current according to the external light component from the charging current according to the signal component, and it is possible to perform the above-mentioned display and sensitivity switching according to the external light component, so it is possible to Places where the ambient light component is strong
ctJ allows accurate optical communication.

In this embodiment, the light receiving element for signal reception (P
Although the configuration is such that the extraneous light component is detected from the output of D , )(P D 2), the present invention is not limited to this, and a light receiving element may be separately provided for extraneous light detection.

However, as in this embodiment, the r
This can simplify the configuration.

FIG. 13 is a circuit diagram showing a main part of another embodiment of the present invention in which one of the photodetecting elements (PD, ) (PD2) consisting of a photodiode is selected and used depending on the temperature. In Figure 13, the voltage (Vcc) from the power supply battery (E)
are analog switches (S W ; ) connected in series to the cathodes of the photodetectors (PD, ) (PD2), respectively.
(S W ,) respectively. The inverting input terminal of the comparator (CON) is connected to a temperature detection circuit (TD) that detects the temperature and outputs the voltage proportional to the detected temperature. - The non-inverting input terminal of the comparator (CON3) is connected to a basic power supply (Vref, ) that produces a basic voltage with respect to ground. The output of the comparator (CON, ) is connected to the date of the analog switch (SW z ), and is also connected to the date of the analog switch (SW, ) via the inverter circuit (IC,). In addition, the anode of the light receiving element (PD, ) (PD2) outputs the output signal (a) from the amplification/detection circuit (14) shown in FIG.
)It is connected to the. Here, FIG. 14 shows the light receiving element (P
The spectral sensitivity characteristics of D,) (PD,) are shown in curves (K) and (F), respectively.

Next, the operation of this embodiment will be explained. First, in a device that performs remote communication using the Ishi-go, it is best to match the spectral sensitivity of the light-receiving element on the receiving side with the spectral sensitivity of the light-emitting diode on the transmitting side. As shown in FIG. 15, the emission peak wavelength of the light emitting diode shifts toward longer wavelengths from (G) to (H) (I) as the temperature rises.

Therefore, even if the light-receiving elements (PD, ) (PD2) have the same spectral sensitivity at low temperatures and match the spectral sensitivity characteristics of the light-emitting diode, the spectral sensitivity of the light-emitting diode changes as the temperature rises, so the light-receiving element ( Among the charging currents generated by PD, ) (PD2), the charging current due to (i) becomes small, and only the charging current due to the external light is large, resulting in a poor S/N ratio.Therefore, this embodiment Then, as shown in Figure 14, two photodetectors (PD,) (PD2) with different spectral sensitivities are provided, and at low temperatures the output of the photodetector (PD,) is used, and at high temperatures, the photodetector By configuring to use the output of (PD2), it is possible to operate with a high S/N ratio at both low and high temperatures.

Here, the temperature detection circuit (TD) used in this example
is configured to detect temperature and output a voltage proportional to the temperature. That is, when the temperature is low, the voltage output by the temperature detection circuit (TD) is small, and when the temperature is high, the voltage output is large. Therefore, when the output voltage from the temperature detection circuit (TD) is lower than the voltage from the reference power supply (Vref=), that is, when the temperature is low, the output of the comparator (CON) becomes H''. When the “H” signal enters the date of the analog switch (SW2), the analog switch (SW2) becomes conductive and the song #at(
A photodetector (PD, ) having the spectral sensitivity characteristics shown in K)
The output of is adopted. Also, at this time, the inverter circuit (
Since the output of IC,) becomes "L", the analog switch (SW)) is in a non-conducting state.

And as the temperature rises, the temperature detection circuit (TD)
The voltage output by the reference Ti source (Vr
When the voltage becomes higher than the voltage from eL) (when the temperature rises), the output of the humpator (CON,) becomes L''.Then, this signal causes the analog switch (SW2
) becomes non-conductive, while the inverter circuit (rc3
) output becomes “H”, so the analog switch (SW>
)'s gate 1 is input, the analog switch (SW3) becomes conductive, and the output of the photodetector T- (PD2) is adopted instead of the output of the photodetector (PD, ). Become.

In this way, two light receiving elements (P
D, ) (P D 2), at low temperatures, the output of the photodetector (PD, ), which has a spectral sensitivity similar to the light emission characteristics of a light emitting diode at low temperatures, is adopted, and at high temperatures, the output of the light receiving element (PD, ) is adopted, which has a spectral sensitivity similar to the light emission characteristics of a light emitting diode at high temperatures. By adopting the output of the photodetector (PD2) that has spectral sensitivities similar to the characteristics, the spectral characteristics of the photodetector and the light emitting diode can be matched to each other at both low and high temperatures, further improving the S/N ratio. I can do it.

It should be noted that the spectral sensitivity 1 and TE of the light receiving element (PD, ) (PD) need only be similar to the spectral characteristics of a light emitting diode, and do not have to be as shown in FIG.

Furthermore, FIG. 16 is a circuit diagram showing a modification of the embodiment of FIG. 13. The modification shown in FIG. 16 shows a configuration in which three light receiving elements (with three spectral sensitivities) are provided and one of them is adopted depending on the temperature. FIG. 17 is a graph showing the spectral sensitivity characteristics of the third light receiving element (r'l), which is used in addition to the previous two light receiving elements (PD, ) (PD2). Incidentally, here, it is also possible to use four or more light receiving elements and selectively adopt the output of one of them depending on the temperature, but since that configuration can be easily considered from the Pt516 diagram, we will not explain it here. I will omit the explanation.

In the f516 diagram, the temperature detection circuit (TD) is the 13th
It is as shown in the figure, and its output is input to a comparison and selection circuit (CS). Then, a comparison selection circuit (C
The output (OUT, ) of S) is connected to the date of an analog switch (SW2) connected in series to the photodetector (PDl), and the output (OUT, T2) is connected to the date of the analog switch (SW2) connected in series to the photodetector (PDl).
, ) is connected in series with the analog switch (SW, ), and the output (OUT , ) is the analog switch (SW
,) connected to dating. Here, the comparison selection circuit (CS) takes in the voltage proportional to the temperature from the temperature detection circuit (TD), and when the voltage is small, that is, when the temperature is low, only output (OUT) No. 43 is output. Set to “H”. At this time, the output (OUT 2) and (OUT ,
) signals are both L''. Then, when the temperature rises a little and the input voltage of the comparison and selection circuit (CS) increases, only the output (OUT 2) signal becomes H'', and the output (O
U T , ) O J: Hi (OUT , ) signals are both set to L''.Furthermore, as the temperature rises, the comparison and selection circuit (
When the input voltage of the comparison and selection circuit (CS) increases further, the comparison and selection circuit (CS)
) sets only the output (OUT, ) signal to "H".

Next, the operation of this modified example will be explained. Here, the details of the operation will be understood from the explanation of the embodiment shown in Fig. f513, and will be briefly explained here. When the temperature detected by the temperature detection circuit (TD) is low, only the signal of the output (OtJT, ) of the comparison and selection circuit (CS) becomes F1'', which causes the analog switch (
Only S W 2 ) is made conductive, and the output of the photodetector (PD, ) is adopted. Then, the temperature rises by 1 and the output of the photodetector (PD) is used rather than the output of the photodetector (PD
Using the output of 3), when the temperature reaches a point where the S/N ratio becomes better, the comparison and selection circuit (CS) outputs (OUT,
) is set to "I(") and the output of the element (D3) is used as the receiver.Furthermore, the temperature is removed once and the light receiving element (PD
When the temperature reaches such a point that the S/N ratio is better if the output of the photodetector (P D 2) is adopted than that of the output of the light receiving element (P
S) sets only the output (OUT 3) to "11" and uses the output of the light receiving element (PDz).

By using a plurality of light-receiving elements with different spectral sensitivities in this way, the S
/N ratio can be improved.

Incidentally, here, the light receiving element (r' D ,)(P D ,)(
The spectral sensitivity characteristics of P D , ) do not need to be as shown in FIGS. 14 and 17, and may be similar to the spectral characteristics of a light emitting diode.

As described in detail above, the optical communication receiving device of the present invention outputs an electrical signal according to the amount of received light in an optical communication receiving device that receives an optical signal emitted from a remote location. a light receiving means; 1. The output is divided into an external light component and an optical signal component!
, a comparing means for comparing the extra-radius light component with a predetermined amount, a receiving means for receiving the optical signal component, and a sensitivity switching means for switching the sensitivity of the receiving means according to the comparison result of the comparing means. It is characterized by
With this configuration, when there are a large number of extraneous light components, it is possible to reduce the sensitivity of the receiving means and prevent malfunctions due to the extraneous light components, thereby extremely reducing the risk of malfunctions even when there are many extraneous light components. I can do it.

[Brief explanation of drawings]

Fig. 1 is a perspective view showing a camera system using an optical communication receiver according to an embodiment of the present invention, Fig. 2 is a front view of the receiving device ↑, and Fig. 3 is a block diagram showing the electric circuit of the system. , fjS4 is a circuit diagram showing the basic configuration of the amplification/detection circuit, FIG. 155 and fjSa are circuit diagrams showing modified examples of the amplification/detection circuit, and FIG. A time chart showing the operation, Figure i8 is a sectional view of B in Figure 1, Figure 9 is a perspective view showing the configuration of the light shielding 7-door, and Figure 10 is the specific sensitivity of the light receiving element due to opening and closing of the light shielding 7-door. 11 is a cross-sectional view of A in FIG. 1, fjS12 is a graph showing the spectral transmittance characteristics of the reception display window and the light emission characteristics of the light emitting diode, and FIG. 14 is a graph showing the spectral sensitivity characteristics of the light receiving element, fjS15 is a graph showing changes in the light emitting characteristics of the light emitting diode due to temperature, and FIG. 17 are graphs showing the spectral sensitivity characteristics of the light receiving element. (P D ,) (P D ,) (14); Light receiving means, (
C,)(L,>(R,): separation means, (CON,)
(CON 2G comparison means, (32) (34036); receiving means, (R2) (R)) (T rl): sensitivity switching means, 4 (R
s) (Ra) (Trz) (Cz); Sensitivity switching means, (R
2) (R5) (R)) (Trl) (Tr-): Sensitivity switching means. Applicant: Minolta Camera Co., Ltd. Figure 1 Figure ω 7

Claims (1)

[Scope of Claims] An optical communication receiving device that receives an optical signal emitted from a remote location, comprising a light receiving means that outputs an electrical signal according to the amount of received light, and the output is divided into an external light component and an optical signal component. It has a separating means for separating, a comparing means for comparing the extra-circular light component with a predetermined amount, a receiving means for receiving the optical signal component, and a sensitivity switching means for switching the sensitivity of the receiving means according to the comparison result of the comparing means. An optical communication receiving device characterized by: