JPS6234068A - Battery check apparatus - Google Patents

Abstract

PURPOSE:To certainly display the state of a battery, by the lighting state of a first display element lighting when the voltage of the battery is a predetermined value or less and that of a second display element lighting when a power source is closed. CONSTITUTION:The titled apparatus is constituted of the voltage detection circuit 26 of a battery E, a first display element BCLED lighting when detected voltage is a predetermined value or less, a signal generation circuit 18 generating a signal when a power source is closed and a second display element VLED lighting by said signal and the state of the battery E is displayed from the lighting states of two elements BCLED, VLED. That is, when the voltage of the battery E is sufficiently high, the element BCLED is put out and the element VLED lights by closing the power source. WHen the voltage of the battery E is lowered to the predetermined value or less but sufficient to light both elements, both elements light. Further, when the voltage of the battery E is lowered and insufficient to light both elements, both elements are put out and, therefore, the state of the battery can be certainly displayed.

Description

[Detailed Description of the Invention] Field of Application of Rakudo The present invention relates to a battery check device, and more specifically, a battery that lights up a display element to indicate a voltage drop when the battery voltage drops below a predetermined value. Concerning a check device.

Various battery check devices as described above have been known in the past.

1. Problem that Akira is trying to solve is α However, with this configuration, if the battery voltage is already extremely low to the point where the display element cannot be lit when the power is turned on, or if the battery is forgotten to be inserted. If it is, the display element will not light up.
This is the same as when the battery voltage is high enough, which is very inconvenient for the user.

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a battery check device that can display the battery status more reliably.

, σ - In order to achieve the above object, the battery check device according to the present invention includes a voltage detection circuit that detects the voltage of the battery, and a light source that turns on when the detected voltage is below a predetermined value. a signal generating circuit that generates a signal when the power is turned on; and a second display element that is turned on by this signal; The present invention is characterized in that the state of the battery is displayed according to the state of the α lamp.

Control According to the present invention, when the voltage of the battery is sufficiently high, the first display element is turned off, and the second display element is turned on when the power is turned on. Also, although the battery voltage has fallen below a predetermined value, the first
If the amount of light is sufficient to light the second display element, both the first and second display elements are lighted. Furthermore, when the voltage of batch IJ - decreases and is insufficient to light up f51 and the second display element, neither ptSl and second display element can be lighted, so that they are turned off.

(The following is a blank space) Actual W Hereinafter, embodiments of the present invention will be described in detail based on the drawings.

FIG. 1 is a perspective view showing a camera system that transmits photometric information and controls operations using an optical communication device according to an embodiment of the present invention. In the Pt51 diagram, (2) is the photographic lens (4
) is the camera body with VC attached, (6) is the receiver of the optical communication device electrically and mechanically connected to the camera body (2) as described later, and (8) is the camera body (2). Brackets 7) and (10) electrically and mechanically connected to the camera body (2) on the lower surface of the camera body (2) are electronic flash devices electrically connected to the camera body (2) via the bracket (8). It is.

As shown in the front view of FIG. 2, the receiver (6) includes:
Lights up when it is determined that the power supply voltage is insufficient by the light receiving window (101) for receiving the optical signal from the transmitter shown in Figure 3, the power switch (102), and the battery check circuit described later. A light emitting diode (103) is provided for warning of voltage drop. Furthermore,
Inside the light receiving window (101) is a pair of light receiving lenses (104).
and a pair of upper and lower light shielding doors (105) that can be opened and closed. The light-shielding hood (105) has
A pair of protrusions (105a) are formed for manual opening and closing. (106) is a reception display window, and when a normal reception operation is performed, a reception display light emitting diode (107), which will be described later, placed inside the window will blink, indicating that a normal reception operation has been performed. The operator controlling the transmitter is informed. A pair of light receiving lenses (
104), light receiving elements (P D , ) (P D 2) each consisting of a photodiode, which will be described later, are arranged.

The receiver (6) has an upper part (6a) and a lower part (6b).
7 shoes provided at the bottom (6b)) (
108) is attached to the camera body (2) by fitting into the accessory shoe of the camera body (2), and this state is fixed by the fixing collar (109). In this state, the movable contact pin (110) formed on the shoe (108) comes into contact with the fixed contact provided on the accessory shoe of the camera body (2), and the receiver (6) and the camera body ( 2) are electrically connected. As a result, the camera body (2) receives exposure data and control data sent from the transmitter via the receiver (6), and necessary data from the bracket (8).
It is also transmitted to the electronic flash device (10) via.

The upper part (6a) of the receiving TFI (6) can rotate relative to the lower part (6b) around the sleeve (X) extending in the vertical direction in Fig. f:lS2, and the receiving window (1,01) Also, the direction in which the light reception display window (106) faces can be changed.

In addition, reception 8! The exposure data received by (6) is
Connected to the input terminal (2a) of the camera body (2) (i
The configuration may be such that exposure data is transmitted to the camera body (2) via a signal code (111), and control data is transmitted from a movable contact bin (110) to a signal hood (11).
1) and may be configured to be transmitted to the camera body (2).

! Figure @3 is a bronch diagram showing the electric circuit of this embodiment. In Fig. 3, (12) indicates a transmitter of an optical communication device that modulates the dinotal signal to be transmitted at several tens of KHz and transmits it as infrared light.
A meter (M) and a transmitting circuit (1,2Ll>) are provided inside the interior.The meter (M) is, for example, as proposed by the applicant in Japanese Patent Application No. 17897-1982. , measures the subject brightness and flash emission amount using the incident light method, stores it, calculates the appropriate shutter speed and aperture value from the setting data such as film sensitivity, shutter speed, aperture value, and the photometry results, and outputs it as exposure data. This exposure data is converted into an infrared light signal by the transmitting circuit (12a) and transmitted, and is transmitted to the light receiving element (p D , ) (P
D2).

(E) is a power battery of the receiver (6), and (SW,) is a power switch of the receiver (6). Power switch (S
When W, ) is closed, the photodetector (P D , )(
PD2) receives an infrared light signal from the transmitter (12) and outputs a current (a) according to its intensity. This output type m(a) is inputted to an amplification/detection circuit (14), which amplifies and detects this output current (a) and converts it into a data signal (b) in a subsequent data reading circuit (16). ). Furthermore, this amplification/detection circuit (14) transmits f
receiver (6) regardless of the infrared light signal from i (12).
The light receiving element (P D , ) (P D 2) outputs a warning signal (c) when the incident steady light component (hereinafter referred to as external light) reaches a predetermined value or more in intensity. The detailed configuration of this amplification/detection circuit (14) is shown in FIG.
Details will be explained later.

The data reading circuit (16) is a circuit that reads and checks the data signal (b) from the amplification/detection circuit (14), stores the data in order to transmit it to the camera body (2), and transfers the data. and includes an interface circuit for data transfer. Then, the data reading circuit (1
6) transfers the read exposure data to the camera body (2) via the movable contact bin (110) shown in FIG. Furthermore, the data reading circuit (16) includes an amplification detection circuit (
If the data signal (b) transmitted from 14) is correctly read, it outputs a signal (d) indicating that the signal transmitted by optical communication has been correctly read. Hereinafter, this signal (d) will be referred to as the Veri7fi signal.

(18) is a timer circuit, which is a power switch (SWl).
) is closed for a certain period of time, the timer signal (e) that is output is set to H". This timer signal (e) is
A NOR circuit (NOR
, ), and the output signal (g) of this 77 circuit (NOR, ) is further input to one input terminal of an AND circuit (AND, ). The output signal (r) of the oscillation 3 (20) is input to the other input terminal of the AND circuit (AND, ). And the output signal (g) of the NOR circuit (NOR1)
and the output signal (11
) are input to the one-shot circuits (22) and (24), respectively.
4) are each configured to output a pulse with a constant time width in response to the rise of the input signals (g) and (h).

Output signal (i) of both one-shot circuits (22) (24)
(j) both pass through an OR circuit (OR1) to a signal (k
) is input to the battery check circuit (26). The battery check circuit (26) checks the power supply voltage Vcc at a timing according to the input signal (k), and if the power supply voltage Vcc is below a predetermined value, it latches it and outputs it (No. is output to light up a voltage drop warning light emitting diode (BCLED).The operation of this battery check will be described in detail later.

The warning signal (c) of the amplification detection circuit (14), the verify signal (d) of the data reading circuit (16), and the timer signal (e) of the timer circuit (18) are each input to an OR circuit (OR,). Ru. And OR circuit (OR1)
The output of is inputted to the display drive circuit (30) as a signal (,,) via the delay circuit (28), and the OR circuit (
When any one input signal of OR, ) becomes “H”,
After a certain period of time determined by the delay circuit (28), the display drive circuit (30) turns on the verify display light emitting diode (V L ED ). In other words, the verification display light emitting diode (V L E D
), if the timer signal (e) is output from the timer circuit (18) when the intensity of the external light is above a predetermined value and when the data is accurately read,
It is turned on by the output signal (n) of the display drive circuit (30). Further, when the output of the OR circuit (OR,) becomes L'', the display drive circuit (30) turns on the verification display light emitting diode (V L E D ) after a certain period of time determined by the delay circuit (28). It is lit.

Next, FIG. 4 shows the T# of the amplification/detection circuit (14) of this embodiment.
Detailed configuration is shown. In FIG. 4, light-receiving elements (P D , ) (P D2 ) consisting of two photodiodes are connected in parallel to each other, and an output signal ( , ) is taken out from the anode side thereof. Both photodetectors (PD, ) (PD2
) is the inductance (Ll) and the resistance (Ll).
R2). Furthermore, the output signal (a)
is input to the amplifier (32) via the capacitor (C1), and the output signal (a) is amplified by the amplifier (32). This amplified signal is input to the detection circuit (34), which detects the signal that has been modulated at several tens of KHz and demodulates it to the original dinotal signal, which is then sent to the subsequent waveform shaping circuit (36). transmitted to.

The waveform shaping circuit (36) shapes the waveform of the input signal to be suitable for the subsequent data reading circuit (16), and outputs it as a data signal (b).

The inductance (Ll) is connected in series with the resistance (R3), and the connection, α, is the comparator (CON,
) is connected to the non-inverting input terminal of the On the other hand, a reference power source (Vrefl) that generates a reference voltage is connected to an inverting input terminal of the comparator (CON, ). Then, the comparator (CON +) output i! , is output as the above-mentioned warning signal (c), and the transistor (Tr
, ) is also input to the base. This transistor (Tr
, ) is connected to the detection circuit (34) via a resistor (R1).
) and the eminter is grounded. Furthermore, the detection circuit (34) is grounded via a resistor (R2). Here, the transistor (Tri) is used as a switch, and is conductive when the output signal of the comparator (CON) is "H" and is non-conductive when it is "L".

The operation of the amplification/detection circuit having such a configuration will be explained. First, when extraneous light unrelated to the signal to be transmitted enters the light receiving element (P D , ) (P D 2), a charging current proportional to the intensity of the extraneous light is generated.

Such a photocurrent has a direct current component or a frequency of 60 Hz x 2
(or 50Hz
Since the low frequency component of Hz)X2 has a high impedance, the photocurrent flows in the direction of the inductance (Ll) and the resistance (R1). And the resistance (R1
) A voltage is generated at both ends according to the photocurrent. This voltage is set to the reference power supply (Vref) by a comparator (CON).
+) and the resistance (R1
) When the voltage across both ends of ) is low, the intensity of the peripheral light component is low and the photocurrent generated in the photodetector (P D , ) (P D 2) is small, so the output of the comparator (CON, ) becomes "L". , no warning signal (c) is generated. Therefore, in this case, the transistor (Tr) becomes non-conductive, the current flowing from the detection circuit (34) to the ground is kept small by the resistor (R2), and its detection sensitivity is set high. In other words, the light receiving element (
When the charging current generated in P D , ) (P D 2) is small, the sensitivity of the detection circuit (34) is set high.

In this state, ll0KHz from transmission fi (12)
The infrared light signal modulated into the photodetector (PD, ) (PD2
), the light receiving element (P D , ) (I' D
2) generates a photocurrent due to the external light component and a charging current due to the infrared light signal. However, the inductance (L,) has a high impedance to alternating current components, while the impedance of the capacitor (C,) decreases, so the output photocurrent of the photodetector (P D , ) (P D 2) is The charging current component due to the AC component, that is, the infrared light signal component, is
The signal is input to the amplifier (32) via the capacitor (C5) and amplified. The DC component, that is, the charging current component due to external light, is cut by the capacitor (C+)1, so the inductance (Ll) and resistance (R,)
flows towards. The signal amplified by the amplifier (32) is sent to the detection circuit (32), which is set to have high sensitivity as described above.
4), the signal is detected, and the waveform is shaped by the waveform shaping circuit (36) and outputted as a data signal (b) to the data reading circuit (16).

Conversely, the light receiving element (P D , ) (P
If the output photocurrent component of D2) is large and the voltage across the resistor (R1) is greater than the reference voltage, the comparator (c
The output of oN, ) becomes "H", a warning signal (e) is issued, and the verify display light emitting diode (VLED) is lit, indicating that there is a risk that accurate signal transmission may be interfered with by external light. User is warned. Furthermore,
When the output of the comparator (CON, ) becomes "I", the transistor (Trl) becomes conductive, and the detection circuit (34) is grounded through the resistor (R3) in addition to the resistor (R2). Since the current flowing from 7- to 7-s increases, its sensitivity decreases.

This is to remove the well-known effects of shot noise and fluorescent lighting. In other words, the intensity of a single shock sound is approximately proportional to the square root of the brightness of the external light, and when the external light is strong,
The shot noise mentioned above may be mistaken for a signal component, and the pulsed light from a fluorescent lamp may be mistaken for a signal component, so in order to prevent this, in this embodiment, the extraneous light component is If it is strong, the detection circuit (34)
This reduces the sensitivity of the signal to prevent these noises from being transmitted as a signal.

Here, in order to prevent the output of the comparator (CON,) from repeating "H" and "L" due to the illumination of the AC light source, it is necessary to provide hysteresis to the comparator (C0N,). However, since it is not directly related to the present invention, its explanation will be omitted.

That is, to summarize the functions and operations of each electric element in the circuit shown in FIG. The photocurrent caused by the capacitor (C
1), and serves to cause the photocurrent due to the peripheral light component to flow in the direction of the inductance (Ll). Furthermore, the comparator (CON, ) has a resistance (CON, ) according to the intensity of the peripheral light component.
The voltage across R1) is compared with a reference voltage to determine whether the intensity of the peripheral light is greater than or equal to a predetermined value. Here, since the inductance (Ll) has almost no DC resistance value, by reducing the resistance value of the resistor (R1), the light receiving element (
It is possible to improve the load characteristics when a load resistor is connected to PD , ) (PD 2). In other words, it is possible to accurately receive optical signals without the circuit becoming saturated even under high illuminance. However, if the illuminance becomes too high, the noise due to the external light component will be transmitted to the data reading circuit (16) as the data signal (b), so in this embodiment, the comparator (CON,
) to prevent noise from being transmitted to the data reading circuit (16), and to display a signal when the external light component is strong.

FIG. 5 is a circuit diagram showing a modification of the amplification/detection circuit of the Pt54 diagram. In the configuration shown in Figure tjS4, the funparator (CO
Although the sensitivity of the detection circuit (34) was changed according to the determination result of the comparator (CON, ), in this modification, the amplification degree of the amplifier (32) is adjusted according to the determination result of the comparator (CON, ). The difference between the configuration shown in FIG. 5 and the configuration shown in FIG. 4 is that the amplifier (32) is grounded via a resistor (R5) and a capacitor (C2). The relationship between the non-inverting input and the inverting input as shown in Figure 4 is that the output of one converter (CON) is connected to the resistor (R6) connected between the amplifier (32) and the capacitor (C2). It is connected to the base of a transistor (TR2) whose collector and emitter are connected in series. Therefore, the amplification degree of the amplifier (32) is determined by the resistor (R5) (Re).

In other words, when the outer light component is small and the resulting photocurrent is small, the output of the comparator (CON, ) is H''
And since the transistor (Trz) is conducting,
The amplification degree of the amplifier (32) is determined by both resistors (R5) and (R6), and is set to a high amplification degree. When the outer light component is large and the resulting photocurrent is higher than the reference voltage, the output of the comparator (CON, ) becomes L'' and the transistor (TR2) is made non-conductive, so that the amplifier (32) The amplification degree is determined only by the resistor (R3) and is set to a lower amplification degree.Therefore, according to this modification, by lowering the amplification degree of the amplifier (32) when the external light component is strong, This prevents noise from being transmitted to the data reading circuit (16) as the data signal (b).In this modification, the output of the comparator (CON) is input to the inverter (IV), The output of this inverter (IV) is a warning signal (
C).

Furthermore, FIG. 6 is a circuit diagram showing another modification of the amplification/detection circuit shown in FIG. 4. This modification is configured to switch the sensitivity of the detection circuit (34) into three levels depending on the determination result of the comparator (CON). In this modification, inductance (Ll) and resistance (R1)
The connection point with CON 2 is connected to the non-inverting input terminal of the second comparator (CON 2). A second reference power source (Vrefz) that generates a higher reference voltage than the reference power source (Vref, ) is connected to the inverting input terminal. And the output of this comparator (CON 2) is
A resistor (R
It is connected to the base of a transistor (Tr3) whose collector and emitter are connected in series to 7).

With such a configuration, if the voltage across the resistor (R1) corresponding to the intensity of the external light component is sufficiently low, the comparator (
Since the outputs of both CON, ) (CON2) are "L" and therefore both transistors (Tr, ) (Tr3) are non-conducting, the sensitivity of the detection circuit (34) is determined by the resistance (R2).
It is determined by only the highest sensitivity and has the highest sensitivity. When the voltage across the resistor (R1) becomes a little higher than that, the reference voltage of the reference power supply (Vrerl) becomes higher than that of the reference power supply (Vrerl).
Since it is lower than the reference voltage of Vrefz), only the output of the comparator (CON +) becomes "H", and only the transistor (Tr) becomes conductive, and the resistor (R3) is connected in parallel to the resistor (R2). . Therefore, in this case, the sensitivity of the detection circuit (34) is reduced by 1 #i. Furthermore, when the external light component becomes even stronger and the voltage across the resistor (R1) becomes even higher, the output of both the comparators (CON, ) (CON2) becomes "I" and the transistors (Tr+) (Tr
s) are both conductive, so connect a resistor (R2) in parallel with the resistor (R2).
R1) and a resistor (R7) are connected, and the detection circuit (34
) sensitivity is further lowered to the second level. In this way, according to this modification, the sensitivity of the detection circuit (34) can be changed in three stages. In this modification, the output of the converter (CON 2) is the warning signal (C
) is used as ν1.

If it is necessary to change the sensitivity of the detection circuit in four or more stages, the number of resistors, transistors, comparators, and reference power supplies may be increased in the same way. Further, similarly to the modified example of the Is diagram, it is possible to easily change the amplification degree of the amplifier (32) in three or more stages depending on the intensity of the external light component.

Figure 7 shows a circuit configuration in which the load characteristics of the photodiodes constituting the light-receiving elements (p D 1) (P D 2) can be used even in bright areas, so that signals can be read without the circuit becoming saturated. . In such a case, the input terminal of the amplifier (32) is connected to the connection point between the light receiving element (P D , ) (PD 2) and the inductance (Ll) via the capacitor (C8). In this case, the output photocurrent of the photodetector (P D ,) (P D z) has its direct current component removed by the capacitor (C,) and is input to the amplifier (32) where it is amplified.
), only the signal is detected by the waveform shaping circuit (36).
The output waveform is shaped by However, in such a configuration, the above-mentioned display based on the intensity of the external light component, sensitivity switching of the detection circuit (34), and amplifier (32)
It is not possible to switch the amplification level.

FIG. 8 is a circuit diagram showing still another modification of the amplification/detection circuit of FIG. 4. In this modification, the comparator (
The output of CON, ) is connected to one input terminal of the waveform shaping circuit (
36) is connected to the other input terminal of the connected OR circuit (IC,).

With this configuration, when the intensity of the external light component is low, the output of the comparator (CON, ) remains L'', so the waveform shaping circuit (36
) is output as is, and the data reading circuit (
16). On the other hand, when the intensity of the external light component is large, the output of the comparator (CON, ) becomes H'', and the output of the OR circuit (Ice) is output from the waveform shaping circuit (36).
It remains "H" regardless of the output. That is, when the external light component is large, the signal from the waveform shaping circuit (36) is not input to the data reading circuit (16) and is fixed at "H". With this configuration, the noise due to the external light component will not be transmitted to the data reading circuit (16), and the malfunction of transmitting an erroneous signal as the data signal (b) to the data reading circuit (16) will not occur.

FIG. 9 is a circuit diagram showing another modification example in which only the DC component corresponding to the peripheral light component is selected from the photocurrent of the light receiving element (PD2) (PD2). In this modification, a resistor (Ra) and a capacitor (
A smoothing circuit consisting of Ca) is used. and,
The time constant of this smoothing circuit is set so that an alternating current component of about 60 Hz from a fluorescent lamp or the like is taken out from the connection point between the resistor (Ra) and the capacitor (Ca).

If the intensity of the external light is determined according to the output of this connection point, only the external light component can be extracted with a simple configuration.

Next, the operation of the battery check system shown in FIG. 3 will be explained using the time chart shown in FIG. 10. In FIG. 10, (1) shows the operation when the voltage of the power source battery (E) is sufficient. First, at time t. When the power switch (SW, ) is closed, the timer circuit (18) emits a timer signal (e) for a certain period of time T1 until time L1. Furthermore, a signal (f) is generated from the oscillator (20) by closing the power switch (S W + ).

In this case, the warning signal (c) of the amplification detection circuit (14)
and the verify signal (cl) of the data reading circuit (16).
) are not emitted, and both outputs remain at "L".

Then, the output signal of the OR circuit (OR, ) becomes H'' by the output signal 0) of the oscillator (20), and therefore the OR circuit (O
A predetermined time r after the output of R,) becomes "H". The output signal (1) of the delay circuit (28) becomes "H" after a delay of 10 minutes. Furthermore, the display drive circuit (30) is driven by the output signal (m) of this delay circuit (28), and its output signal (n
) becomes “H” and the light emitting diode (
VLED) is turned on. Here, the timer signal (
e) becomes "H", the output signal (g) of the NOR circuit (NOR,) becomes "L", and therefore the output signal (f) of the oscillator (20) becomes the output ( h)
It does not appear in

At time, when the timer signal (e) of the timer circuit (18) becomes "L", the output signal (g) of the NOR circuit (NOR+) is inverted to "H", and the one-shot circuit (2
2) generates a short pulse signal (i). This pulse signal (i) is converted into a signal (k) via an OR circuit (OR2).
The signal is input to the battery check circuit (26) as follows.

Then, the battery check circuit (26) checks the voltage V of the power supply battery (E) at a timing corresponding to this input pulse (k).
cc is checked, and the power supply voltage Vcc is Vre in Figure 1o.
It is determined whether the value is greater than or equal to a predetermined value indicated by fs. During this battery check, the delay circuit (2
8) The output signal (1) takes a time τ from the output of the OR circuit (OR+). The verification display light emitting diode (VLED) continues to be lit because the signal is delayed by 40 seconds and is at "H".

And time t. When a certain period of time T1 determined by the timer circuit (18) has elapsed, the timer signal (
e) becomes "L". Then, the output signal (g) of the NOR circuit (NOR) is inverted to "H", so the AND circuit (
An oscillation signal (r
) is output from the AND circuit (A N D , ), and the one-shot circuit (24) is output as the signal (11).
) is entered. Therefore, the one-shot circuit (24) outputs a short pulse signal (
i) is output. The period of this pulse signal (j) is synchronized with the oscillation signal of the oscillator (20).

This pulse signal (j) is input to the battery check circuit (26) as a signal (k) through an OR circuit (OR2), and the power supply voltage Vcc is checked at a timing according to this pulse signal (k). .

During the time T2 from time t2 to L3 in FIG. The state of each signal is shown when it is amplified and detected by the data reading circuit (14) and read by the data reading circuit (16). In this case, the timer circuit (18)
The timer signal (e) remains at "L", and since there are few external light components, the warning signal (e) from the amplification and detection circuit (14) is
e) also remains at "L".

When the data reading circuit (16) accurately reads the transmitted data, a verify signal (d) of "H" is generated for a certain period of time T2. ,) is output only for a certain period of time T2.”
Therefore, the delay circuit (28) outputs the time τ.

After a delay, a signal (1D) of "g" is output for a time T2. This “H” signal (1) causes the display drive circuit (3
0) is driven, and the “H” signal (n
), and therefore the light emitting diode (
VLED) is lit for a time T2. Furthermore, “■]”
The 7-eye signal (d) inverts the output signal (8) of the 77 circuit (NOR, ) to "L", so the AND circuit (A
Since one input of the AND circuit (AND, ) becomes "L", the output signal (11) of the AND circuit (AND, ) remains "L". Therefore, the output signal (f) of the 1W oscillation (20) no longer appears in the output signal (h) of the AND circuit (AND, ). Therefore, while data is being read, both inputs (i) and (j) of the OR circuit (OR2) remain at "L", so no battery check operation is performed during this time.

Then, at time 3 or t, when the 7-eye signal (d) of the data reading circuit (16) inverts to "L", the output signal (1) of the one-shot circuit (22) changes to "L" as at time t1. A short pulse signal appears, and the power supply voltage Vcc is checked by the battery check circuit (26) in accordance with the timing of this pulse.

At this time, the delay circuit (28) inverts the edge 7 eye signal (d) for a time τ. The display drive circuit (30
), the verify display light emitting diode (V L ED ) is lit.

Next, the operation from time t7 in FIG. 10 will be explained. This is an operation when the intensity of the external light is high. First, when the amplification/detection circuit (14) determines that the intensity of the external light is greater than or equal to a predetermined value, it outputs "H" as a warning signal (c). As a result, the output of the off-circuit (OR, ) becomes II'', and the rising time τ of the warning signal (c)
. Verification display light emitting diode (VLE)
D) is lit to warn the user that the intensity of the ambient light is high.

In this case, the timer signal (
e) is "L", and the data reading circuit (16) is 7
The T eye signal (d) is also low, therefore, the NOR circuit (NO
The output signal (ET) of R,) becomes “H” and the OR circuit (
As the output signal (k) of OR2), a short pulse is emitted according to the oscillation signal (f) of the oscillator (20).

As a result, the battery check circuit (26) periodically checks the power supply voltage Vcc.

Here, the timing pulse (signal (k)) for activating the battery check circuit (26) is at time t. mustard, between, t2 mustard, open, and t, mustard.

The reason why it is not emitted during this period and is emitted only at other times is due to the following reasons. First, time t. to 1+ is immediately after the 'ifi source switch (SW, ) is closed, and there is a certain period of time T from the closing of the power switch (SW + ).
, is a light emitting diode (VLED) for verification display.
This is because the voltage drop warning light emitting diode (BCLED) is not lit during that time in order to eliminate clutter in the display. Then, from time L2 to time L5, if a battery check is performed during this time and the power is rA? ? ! The pressure Vcc is a predetermined value Vreft
When f11 is determined to be below, "H" is input from the output signal (, ) of the /battery check circuit (26) to the data reading circuit (16), thereby causing the edge 7 eye signal (d) to become "H". '', the verify display light emitting diode (V L E D ) is turned off, and
This is because, since the operation is configured to be stopped, the lighting time of the light emitting diode (LED') for indicating the 7 eyes becomes shorter and the lighting time is no longer T2. Therefore, in this embodiment, the battery check operation is not performed during the above three times.

Furthermore, in the receiving device of such an optical communication device, it is necessary that the light emitting display can be confirmed from a far away position, and therefore the display light emitting diode is driven with a very large current. Therefore, it is not preferable to turn on the voltage drop warning light emitting diode (B CL ED) while the verify display light emitting diode (VLED) is on. From 1 to 1, from t2 to 3, and from t4 to t, /<. is configured so that the notice check is not performed.

However, since time L0+τ0, 10τ. , L2+τ. h
・t3+τ. , and t, +τ. When the light emitting diode (V L E D ) is on, this light emitting diode (V L E D
It is thought that the power supply voltage Vcc is lowest just before the light-emitting diode (V L E D
) lights out r. 1, t3, L
The battery is checked by smell to check whether the power supply voltage can be stably supplied from now on.

(2) in the time chart of FIG. 10 is the power supply voltage Vcc.
is the predetermined value Vrc4. This shows the behavior when the value drops below. The battery check circuit (26) is an OR circuit (O
Power supply voltage Vcc according to the output pulse (k) from R2)
is checked, and if it is determined that the electric aML pressure Vcc has become less than the predetermined value Vref3 at time 1++, the output (1) (0
) outputs "H" from each of them. This causes the voltage drop warning light emitting light 1' (BCLED) to light up. ! ! A drop in voltage is displayed and the operation of the data reading circuit (16) is stopped. Then, the battery check circuit (26) is 711! When the voltage Vcc becomes equal to or less than the predetermined value Vreh, the output (1) (o) remains "H" even if it subsequently becomes equal to or greater than the predetermined value Vrer3.
Keep it as it is and release this? ! This is done by opening the lrA switch (SW, ).

Furthermore, (3) of the time chart in the fjfJ10 diagram shows that the power supply switch (SWI) is closed and the timer circuit (18
) is operating, the power supply voltage Vcc is at a predetermined value\7re.
It shows the operation when the value decreases to r3 or less. here,
As mentioned above, the timer signal (e
) is "I" from time t9 to Ll. The time T between
battery check is not performed and the timer signal (e
) becomes "L", the battery check circuit (26) is activated for the first time at time t1°, and the power supply voltage V
It is determined that cc is equal to or less than a predetermined value Vre':+, and a voltage drop warning light emitting diode (BCLED) is turned on.

Furthermore, at (4) in the time chart, the power battery (E) is exhausted and the power switch (SW, ) is closed at time t1.
1, the battery voltage E is the limit voltage V for circuit operation and light emitting diode drive. This shows the behavior when the value is lower than . In this case, the power switch (swi
) even if the surface-emitting diode (VLED) (BCL
Since both ED) do not light up, a voltage drop in the power supply battery (E) is immediately indicated. Here, (1
) and (4), it is clear that in the normal state of (1), after the power switch (SWI) is closed, the verification display light emitting diode (V L
Unless ED ) is turned on, it is not possible to display a display that is distinct from the case of battery voltage drop in (4). Therefore, in this embodiment, the verification display light emitting diode (V LE D ) is turned on for a certain period of time T1 in the normal state. It's lighting up.

(5) in the time chart indicates that the data reading circuit (16) accurately reads the transmitted data and thereby
The following shows the operation when the power supply voltage Vcc becomes less than the predetermined value Vre [, while the verify signal (d) is output and the verify display light emitting diode (V L E D ) is lit. In this case, as mentioned above, when the light emitting diode (LED) for displaying the indicator 7T is turned off, the battery check circuit (
26) is activated, the power supply voltage Vcc is checked, its drop is determined as tq, and a voltage drop warning light emitting diode (BCLED) is lit to warn of a drop in the power supply voltage.

Next, the internal structure of the receiver (6) shown in FIG. 1 will be explained. First, fjSl1(it)(+1) is the B section in FIG. In FIGS. 11(a) and (b),
A pair of light receiving lenses (104) are provided inside the light receiving window (101).
), a pair of band pass filters (112), and light receiving elements (P D 1) (P D 2) are arranged in order from the outside world. Further, a pair of upper and lower light shielding doors (105) are provided on the outside side of the light receiving lens (104), respectively. FIG. 11(a) shows the case where the opening angle of the light-shielding hood (105) is increased, and FIG. 11(b) shows the case where the light-shielding hood (105) is widened.
) when the opening angle of the light-shielding hood (
105) and the incident light directed toward the element chip (PDa) in the photodetector (PDI) (PD, ).

FIG. 12 is a perspective view showing the arrangement of the pair of light-shielding hoods (105) and their rotating shafts (113).

The light-shielding hood (105) has a rotating shaft (113) fixed to its rotating base (105b) and the receiver body (6).
) is frictionally held on the rotating shaft (113) by the frictional force of a friction washer (114) sandwiched between the head (113a) of The light-shielding hood (105) can be rotated around two rotation axes (113) by manually rotating its operation end (105a), and can be rotated in the state shown in (a) or (b) shown in fiS11. The opening angle can be set continuously and steplessly depending on the state.

FIG. 13 is a graph showing the specific sensitivity incidence characteristics of the light receiving elements (P D 1) (P D 2) with respect to the incident light flux.

In the Pt513 diagram, the curve (A) is shown in Figure 11 (a).
The curve in (B) shows the characteristics when the opening angle of the shading hood (105) is made small as shown in Fig. 11 (11). It shows the characteristics of the case.

The light-shielding hood (ios) is normally used with the opening angle at its maximum as shown in FIG. 11(a). In this case, the light beam incident within the range of incidence angle α from the optical axis is
It is possible to capture the entire surface of the PDa. In this case, the specific sensitivity characteristic of the light receiving section becomes wide as shown by the curve (A) in FIG. On the other hand, when there is an extremely large amount of external light, that is, when the brightness of the background of the transmitter is extremely high, the receiver cannot receive signals normally. In this case, it is effective to reduce the opening angle of the light shielding hood (105) as shown in FIG. 11 ([]). In this state, only the light beam incident almost parallel to the optical axis can be received by the entire surface of the element chip (PDa), and the light beam with an incident angle of β or more does not reach the element chip (PDa) at all. In this case, the specific sensitivity characteristic of the light receiving section becomes narrow as shown by curve (B) in the PtSi2 diagram. Comparing curve (A) and curve KQ (B), on the optical axis (
At θ=0), both curves have almost the same specific sensitivity, and the area surrounded by the curve and the horizontal axis is larger for curve (B) than for curve #
It can be seen that it is a fraction of 1(A). therefore,
When the ambient light is strong, a light-shielding hood (
105), and place the transmitter (105) on the optical axis of the receiver (6).
If you install 2) and communicate, will it be possible to send or borrow? The sensitivity to fi(12) remains approximately the same as in the state shown in FIG. 11(a), and the influence of external light can be reduced to a fraction of that. As a result, it is possible to achieve normal reception, which was not possible in the state shown in FIG. 11(a).

Furthermore, since the two light-shielding hoods (105) can be adjusted to open and close separately, it is also possible to set the center of the opening formed by the two hoods at a position offset from the optical axis. Therefore, it is also possible to set the specific sensitivity characteristic as shown by curve CB in the f:tS13 diagram with the center shifted from the optical axis.

f514 Figures (a) and (b) each show the A section in Figure 1. In FIGS. 14(a) and 14(b), a verification display light emitting diode (VLED) is housed inside the reception display window (106). Nru. [Figures 1 and 4 (a
) shows a reverse trace of the light rays reflected on the external side surface of the reception display window (106) when viewed from a distance on its optical axis. Moreover, FIG. 14(b) shows a reverse trace of the light ray when the reception display window (106) is viewed from a distance shifted by a certain angle from the optical axis. Furthermore, FIG. 15 shows the spectral transmittance characteristics (C) of the reception display window (106) with respect to the wavelength and the verification display light emitting diode (V
This shows the relative intensity characteristics (D) superimposed on the wavelength of light emitted by LED.

Regarding the reflected light at the outer surface (106a) of the reception display window (10G), as shown in Fig. 14 (a) (1)), all the light that reaches the eye is reflected from the pit wall (106a) of the reception rock body (6). 6
c). Therefore, the reception display window (
If you look at 10(3), you will see the pit wall (6c) of the receiver main body on its surface (106a). This pit wall portion (6c) is painted with a 7m coating or the like to have a low reflectance. Therefore, with this configuration, the reception display window (10
6) Keep the brightness of the surface of the reception display window (106) low because direct reflected light from the outside world will not be reflected on the external interface (10G+1) and a surface with low reflectance will be visible. Is possible. Also, the reception display window (106
) has exactly the same effect as the outer surface (106b). With this configuration, it is possible to reduce the brightness of external light reflected by the reception display window (106) when viewed from the outside, so that when viewed from the outside when the internal verify display light emitting diode (VLED) is turned on, The S/N ratio of the brightness can be increased, and the blinking can be easily confirmed by the observer.

In addition, the reception display window (106) has a curve (C) shown in PtfJ15 diagram.
), in the visible range, most of the light emitted by the Veri7 eye display light emitting diode (VLED) is transmitted;
It is made of a material that absorbs light in other bands. Therefore, the chip surface (c
The majority of the external light that illuminates h) and the reflective umbrella surface (p) is blocked by the reception display window (106).On the other hand, most of the light emitted from the verification display light emitting diode (VLED) is blocked by the reception display window. (106) and exit to the outside world.Therefore, this reception display window (106)
Due to the spectral transmittance characteristics, it is possible to increase the S/N ratio of the brightness seen from the outside when the internal verify display light emitting diode (VLED) blinks, making it easier for occupants in Dormitory A to confirm the blinking.

As described in detail above, according to this embodiment, when there is a possibility that accurate data communication using the signal light is not possible due to the strong intensity of the external light, the verification display light emitting diode (
As a warning is issued by lighting up the V L E D ), the messenger can take measures such as changing the direction of the receiver n (6) to ensure accurate data communication.
Malfunctions due to inaccurate information transmission can be prevented. Furthermore, if the intensity of the external light is strong, the amplification detection circuit (1
By lowering the sensitivity of 4), it is possible to reduce the possibility of malfunction due to external light. Furthermore, according to this embodiment,
If the power supply voltage is sufficient, turn on the power switch (SWl)
The verify display light emitting diode (VLED) is turned on for a certain period of time after the rA is turned on, and if the voltage has slightly decreased, the verify display light emitting diode (VLED) and the voltage drop warning light are turned on. When the diode (BCLED) is turned on and the rA voltage is extremely low, the surface emitting light (BCLED) is turned on.
Since neither the VLED nor the BCLED is turned on, it is possible to distinguish and display the states of 3 m using the two display elements. Furthermore, according to this embodiment,
The amplification and detection circuit (14) makes it possible to separate the charging current according to the external light component and the charging current according to the signal component, and it is possible to perform the above-mentioned display and sensitivity switching according to the external light component. Therefore, accurate optical communication can be performed even in places where the external light component is strong, such as outdoors.

In this embodiment, the light receiving element (PD
, ) (P D 2), but the configuration is not limited to this, and a light receiving element may be provided separately for detecting the external light. However, in this embodiment By combining the signal receiving element with the light receiving element as shown in the figure, the f+1 configuration can be simplified.

FIG. rjS16 is a circuit diagram showing the main part of another embodiment of the present invention in which one of the light receiving elements (p D , ) (P D 2) consisting of a photodiode is selected and used according to the temperature. In FIG. 16, the voltage (Vec) from the power supply battery (E) is
) connected in series to the cathode of the analog switch (S
W 2) (S W 3), respectively.

The inverting input terminal of the comparator (CON 3) is connected to a temperature detection circuit (T D ) that detects the temperature and outputs the voltage proportional to the detected temperature. On the other hand, the non-reactive input terminal of the comparator (CON3) is connected to the reference power supply (Vr
ef=). And a comparator (C
The output of ON z) is connected to the date of the analog switch (SW2), and the inverter circuit (IC)
) is also connected to the date of the analog switch (SW, ). Further, the anode of the light receiving element (PD, ) (PD2) is connected to the amplification/detection circuit (14) shown in FIG. 3 as the output signal (a). Here, Figure 117 shows the spectral sensitivity characteristics of the photodetector (PD, ) (PD2) with a curve (K
) (F).

Next, the operation of this embodiment will be explained. First, in devices that perform remote communication using optical signals, it is best to match the spectral sensitivity of the light-receiving element on the receiver side with the spectral sensitivity of the light-emitting diode on the transmitter side. As shown in FIG. 18, the emission peak wavelength shifts toward longer wavelengths from (G) to (H) (1) as the temperature rises.

Therefore, at low temperature, the photodetector (P D ,) (P D 2)
Even if the spectral sensitivities of the light-emitting diode and the light-emitting diode are the same, the spectral sensitivity of the light-emitting diode changes as the temperature rises, so the photodetector (PDl) (P
Among the photocurrents generated by D2), those due to signals become small, and only a large photocurrent due to external light is generated, resulting in a poor S/N ratio. Therefore, in this embodiment, two photodetectors (PD, ) (PD2) having different spectral sensitivities are provided as shown in FIG. By reducing Ev1 to use the output of the photodetector (PDz), it is possible to operate with a high S/N ratio at both low and high temperatures.

Here, the temperature detection circuit (TD) used in this example
is configured to detect temperature and output a voltage proportional to the temperature. That is, when the temperature is low, the voltage output by the temperature detection circuit (TD) is small, and when the temperature is high, the voltage output is large. Therefore, when the output voltage from the temperature detection circuit (TD) is lower than the voltage from the reference power supply (VreL), that is, when the temperature is low, the output of the comparator (CON, ) is l
-1". Then, this "H" signal enters the date of the analog switch (SW2), and the analog switch (SW2) becomes conductive, as shown by the curve (K) in Figure P!S17. Photodetector (PD) with spectral sensitivity characteristics
, ) is adopted. Also, at this time, the output of the inverter m (IC,) becomes "L", so the analog switch (SW:l) is in a non-conducting state.

And as the temperature rises, the temperature detection circuit (TD)
The voltage output by
When the voltage becomes higher than the voltage from L) (when the temperature rises)
, the output of the comparator (CON, ) becomes "L". Then, this signal causes the analog switch (SW2) to
becomes non-conductive, and on the other hand, since the output of the inverter circuit (IC) becomes "H", a "H" signal enters the date of the analog switch (SW3), and the analog switch (S
W, ) becomes conductive, and the output of the light receiving element (P D 2) is adopted instead of the output of the light receiving element (PD, ).

In this way, two light receiving elements (P
D, ) (P D 2), at low temperatures, the output of the photodetector (PD, ), which has a spectral sensitivity similar to the light emission characteristics of a light emitting diode at low temperatures, is adopted, and at high temperatures, the output of the light receiving element (PD, ) is adopted, which has a spectral sensitivity similar to the light emission characteristics of a light emitting diode at high temperatures. By adopting the output of the photodetector (PD2) that has spectral sensitivities similar to the characteristics, the spectral characteristics of the photodetector and the light emitting diode can be matched to each other at both low and high temperatures, further improving the S/N ratio. I can do it.

Note that the spectral sensitivity characteristics of the light receiving element (P D , ) (P D , ) only need to be similar to the spectral characteristics of the light emitting diode, and do not have to be as shown in the fjS17 diagram.

Furthermore, FIG. 19 is a circuit diagram showing a modification of the embodiment shown in FIG. 16. The modification shown in FIG. 19 shows a configuration in which three light receiving elements (with three spectral sensitivities) are provided and one of them is adopted depending on the temperature. FIG. 20 is a graph showing the spectral sensitivity characteristics of an f53 photodetector (PD3) used in addition to the previous two photodetectors (PD, ) (PD2). Note that it is also possible to use four or more light receiving elements and selectively adopt the output of one of them depending on the temperature, but the +;η component can be easily considered from FIG. 19. Therefore, we will omit the explanation here.

In FIG. 19, the temperature detection circuit (70 months) is as shown in FIG. 16, and its output is input to the comparison and selection circuit (CS).
The output (OUT,) of is connected to the date of an analog switch (SW2) connected in series to the photodetector (PDl), and the output (OUT2) is connected to the date of the photodetector (PDl).
) connected in series with the analog switch (SW 1 )
The output (OUT 3) is connected to the analog switch (S) connected in series to the photodetector (PD2).
W,) is connected to the date. Here, the comparison selection circuit (CS) takes in a voltage proportional to the temperature from the temperature detection circuit (TD), and when the voltage is small, that is, when the temperature is low, only the output signal (OUT, ) is set to "H". ”. At this time, the output (OUT 2) and (OUT
, ) are both ``L''. Then, when the temperature rises a little and the input voltage of the comparison and selection circuit (CS) increases, only the output (OUT z) signal becomes ``H''. The output (OUT,) and inbound (○UT,) Ibo numbers are both L.
”.Furthermore, the temperature rises and the comparison and selection circuit (CS
) further increases, the comparison and selection circuit (CS
) sets only the output (OUT, ) signal to H''.

Next, the operation of this modified example will be explained. Here, the details of the operation will be understood from the explanation of the embodiment shown in FIG. 16, and will be briefly explained here. Temperature detection circuit (
When the temperature detected by TD) is low, only the signal of the output (OUT, ) of the comparison and selection circuit (CS) is "H".
As a result, only the analog switch (SW2) becomes conductive, and the output of the photodetector (PD) is adopted.

Then, when the temperature rises to a point where the S/N ratio is better when using the output of the photodetector (PD, ) than when using the output of the photodetector (PD, ), the comparison and selection circuit (
CS) sets only the output (OUT2) to "H" and uses the output of the light receiving element (PD, ). Furthermore, as the temperature rises, the photodetector (PD2) becomes more sensitive than the photodetector (PD).
When the temperature reaches such a point that the S/N ratio is better if the output of the light receiving element (PD2) is adopted, the comparison and selection circuit (CS) sets only the output (OUT3) to "I" and adopts the output of the light receiving element (PD2).

By using a plurality of light receiving elements having different spectral sensitivities in this way, the S/N ratio can be further improved than in the embodiment shown in Fig. fjS16.

Incidentally, here, the light receiving element (P D =) (P D 2) (P
The spectral sensitivity characteristics of D:l) are shown in Figure f517 and Figure 20.
The spectral characteristics do not have to be as shown in the figure, and may be similar to the spectral characteristics of a light emitting diode.

Mata J! As detailed above, the battery check device according to the present invention includes a voltage detection circuit that detects the voltage of the battery, a display element f51 that is turned on when the detected voltage is below a predetermined value, It has a signal generation circuit that generates a signal when the power is turned on, and a second display element that is turned on by this signal, and the battery status is displayed by the lighting state of the f51 second display element. With this structure, when the battery voltage is sufficiently high, the Pt52 display element is turned on, and conversely,
If the battery voltage is extremely low, the screen display element is also turned off, so it is possible to distinguish between when the battery is sufficient and when the battery is extremely low or the battery has been forgotten. , can display the battery status more reliably than conventional devices6. Therefore, if the battery voltage is extremely low or if you have forgotten to insert the battery, you can mistakenly think that the pantry voltage is normal. Eliminates the risk of checking, reducing the possibility of erroneous operation 4
be able to.

[Brief explanation of the drawing]

Fig. 1 is a perspective view showing a camera system using the Amatsu borrowed receiving device according to an embodiment of the present invention, Fig. 2 is a front view of the receiving device, Fig. fjS3 is a block diagram showing the electric circuit of the system, and Fig. 4 is a circuit diagram showing the specific configuration of the amplification/detection circuit, FIGS. 5 to 9 are circuit diagrams showing modified examples of the amplification/detection circuit, and FIG. 10 is a time diagram showing the operation of the system in FIG. 3. Chart, Figure 11 is B of Figure f51
12 is a perspective view showing the configuration of the light-shielding hood, FIG. 13 is a graph showing changes in the specific sensitivity of the light-receiving element due to opening and closing of the light-shielding 7-1-, and FIG. 14 is A of FIG. 1. The cross-sectional view, F515, is a graph showing the spectral transmittance characteristics of the reception display window and the light emitting characteristics of the light emitting diode, Figure 16 is a circuit diagram showing the main part of another embodiment, and Figure 17 is the spectral sensitivity of the light receiving element. Fig. 18 is a graph showing changes in the light emitting characteristics of the light emitting diode due to temperature, fjS19 is a circuit diagram showing a modification of Fig. 16, and Fig. 20 is a graph showing the spectral sensitivity characteristics of the light receiving element. It is. (E);Battery; (18);Signal generation circuit; (2G);Voltage detection circuit; (BCLED):m1 display element; (VL
ED); second display element. Applicant: Minolta Camera Co., Ltd.

Claims (1)

[Claims] 1. A voltage detection circuit that detects battery voltage; a first display element that lights up when the detected voltage is below a predetermined value; and generates a signal when the power is turned on. It has a signal generating circuit and a second display element that is turned on by the signal, and is configured so that the state of the battery is displayed based on the lighting state of the first and second display elements. Battery check device. 2. Claim 1, characterized in that the voltage detection circuit includes a load detection circuit that generates a battery check signal when the device is at maximum load, and a circuit that performs a battery check in response to this battery check signal. Battery check device as described. 3. The voltage detection circuit includes a battery check signal generation circuit that generates a battery check signal at every predetermined cycle, and a circuit that performs a battery check in accordance with the battery check signal. The battery check device described in item 1. 4. The voltage detection circuit consists of a load detection circuit that generates a battery check signal when the device is at maximum load, a battery check signal generation circuit that generates a battery check signal at predetermined intervals, and a battery check from either of these circuits. The battery check device according to claim 2 or 3, further comprising a circuit that performs a battery check according to a signal. 5. The battery check device according to claim 1, wherein the signal generating circuit is configured to generate the signal only for a certain period of time after power is turned on.