JPS6233483A - Superconductive integrated circuit - Google Patents

Abstract

PURPOSE:To contrive the enhancement of the density of integration of a superconductive integrated circuit by enabling the high speed of a logic circuit or a memory circuit by using a material of Nb group for electrodes and employing a physical etching such as plasma etching for minute processing of an electrode pattern. CONSTITUTION:A superconductive grand plane 112 is formed on a substrate 1. The grand planes 102 and 112 are provided with openings and these openings are formed by isotropic etching such as plasma etching so that their edges are bevelled. As the plasma etching using a mixed gas of CF4 and O2 is used to bevel the edges, an interlaminar insulating film 103 on the grand planes 102 and 112 can be formed thinly and even if a base electrode 104 is formed on that, the characteristic impedance of a transmission line composed of the base electrode 104 can be reduced, which is suitable for miniaturization of the wiring. Also, an inductance of the base electrode 104 decreases when the base electrode 104 is formed and the improvement in operating speed due to reduction of a parasitic inductance of a circuit can be expected.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a superconducting integrated circuit, and particularly to a superconducting integrated circuit having an impedance wiring structure suitable for a highly integrated LSI using a 'pl thin pattern.

[Background of the invention]

Conventional superconducting 4JAvL circuits are mainly formed by the lift-off method. Therefore, as shown in FIG. 1, on the substrate 1, ground planes 2 and 12, a ground plane insulating film 3, a base electrode 4, an interlayer insulating film for bonding 5 and 15, a counter electrode 7, an interlayer insulating film 8, Control electrodes 9,1
In order to prevent the insulating film from breaking at the step portion when stacking the insulating film 9, the upper layer film is made thicker. For this reason, the insulating film under the transmission line had to be thick enough to prevent short circuits between the electrodes. On the other hand, there is a trend toward miniaturization of circuits with the aim of improving operating speed.

If the wiring of superconducting integrated circuits continues to be miniaturized under current conditions, inductance and characteristic impedance will increase, resulting in a decrease in operating speed and mismatching of characteristic impedance.

A method for reducing this inductance and characteristic impedance is to reduce the thickness of the interlayer dielectric film, as described in JP-A-58-145173, and to reduce the exposed portions of the electrodes at the edges. As shown in Figure 2, insulators 61, 71, 81°91 are formed by plasma oxidation.
．． There was a way to cover it with 101. However, this method has the problem that it can only be applied to some electrodes, and that the insulating film cannot be made very thick by plasma oxidation, making it easy to cause dielectric breakdown. Furthermore, when viewed as a transmission line, there is a problem that locally large stray capacitance exists and signal dispersion increases, but this has not been taken into consideration.

[Purpose of the invention]

The present invention was made to solve the above problems, and its purpose is to provide a superconducting integrated circuit having a fine pattern structure with low impedance and low inductance, which enables high-speed logic circuits and memory circuits. It is about providing.

[Summary of the invention]

If the insulating film is thinned using the conventional process, as shown in FIG. 3, the insulators [3, 13] will break at the step at the edge of the electrode 2, creating an exposed electrode portion 61. If another electrode is attached on top of this, the electrodes will short-circuit. Therefore, in the present invention, an Nb-based material is used as a superconducting electrode and processed by physical etching such as plasma etching to achieve the above object. When a Nb-based material is used as an electrode and physical etching such as plasma etching is used for microfabrication of the electrode pattern, the edge of the electrode becomes tapered.

That is, as shown in Figure 4, because of this taper, even if a thin insulating film is formed on the electrode, the coverage is good.
Does not cause disconnection. Therefore, since the living room insulating film can be made thinner, inductance and characteristic impedance can be reduced.

As the physical etching, plasma etching using CF4, sputter etching using Ar, etc. are used.

[Embodiments of the invention]

An embodiment of the present invention will be described below with reference to FIG. A superconducting ground plane 112 is formed on the substrate 1. The ground planes 102 and 112 also have openings, which are formed by isotropic etching such as plasma etching, so that the edges are tapered. In this example, plasma etching was performed using a mixed gas of CF4 and 02 (gas pressure crab 200 mTorr,
The test was conducted under the condition of RF output power of 100W. ) so that the etch has a taper. Therefore, the interlayer insulating film 103 on the ground planes 102 and 112 can be made thinner.
Even if the base electrode 104 is formed thereon, the base electrode 104
The characteristic impedance of the transmission line purchased in step 4 can be lowered, making it suitable for miniaturization of wiring. In addition, the base electrode 10
4, the inductance of the base conductor 1104 is also reduced, and an improvement in operating speed can be expected due to a reduction in the parasitic inductance of the circuit. Furthermore, a similar inductance reduction effect can be expected for the Nb-based counter electrode 107 and control electrode 109.

In the embodiment shown in FIG. 6, the base electrode 104 is placed on the ground plane 112, and the junction barrier WJ6. Counter electrode 10
After forming 7, the base electrode is processed at once by a microfabrication method such as plasma etching that creates a tapered edge. After that, interlayer insulating films 105, 115, 125
are formed, and a circuit is completed by control electrodes 109 and 119. In this embodiment as well, since the edges of the electrodes are tapered, the insulation film 105°115
．． The film thickness of 125 can be made thinner, and the inductance and characteristic impedance can be made smaller. This makes it possible to realize faster circuit operation.

Furthermore, since there is no locally large capacitance at the edge of the wiring, signal dispersion is small and ultra-high speed signals can be transmitted. In both of the above embodiments, the superconducting electrode can be realized by forming the superconducting electrode from Nb or a Nb-based material, or a hard material that can be physically etched.

〔Effect of the invention〕

According to the present invention, finer wiring can be used to achieve the same characteristic impedance.

Superconducting circuits can be integrated more densely, and have the effect of increasing speed by reducing parasitic inductance and shortening element spacing. It is also effective in increasing the margin of the circuit by reducing the load inductance, and is also effective in reducing noise by reducing the magnetic field of the transmission line. As described above, the present invention is extremely effective in increasing the degree of integration of superconducting integrated circuits.

[Brief explanation of the drawing]

FIG. 1 is a cross-sectional view showing an example of the structure of a conventional superconducting integrated circuit, FIG. 2 is a cross-sectional view showing the structure of a conventional superconducting integrated circuit in which the interlayer insulation film is deep, and FIGS.
The diagram is super i! ! FIGS. 5 and 6 are cross-sectional views of a superconducting integrated circuit according to an embodiment of the present invention. l...Substrate, 2,12,102.112...Ground plane, 3,13,23,33,103...Ground plane insulating film, 4,104...Base electrode. 5.15,105... Interlayer insulating film for bonding, 6... Junction barrier layer, 7. ]07... Counter electrode, 8.18
, 28, 38, 48, 58, 108... interlayer insulating film,
9, 19, 109, 119... control electrode, 6
1, 71, 81, 91, 101... Insulating film covering exposed electrode parts.

Claims (1)

[Claims] 1. Forming the edges of a plurality of superconducting electrodes made of Nb-based material into a tapered shape by physical etching,
A superconducting integrated circuit characterized in that the thickness of an interlayer insulating film formed between superconducting electrodes is thinner than the thickness of the superconducting electrodes.