JPS6232637U

JPS6232637U -

Info

Publication number: JPS6232637U
Application number: JP12390485U
Authority: JP
Priority date: 1985-08-12
Filing date: 1985-08-12
Publication date: 1987-02-26

Description

[Brief explanation of the drawing]

第１図はこの考案の実施例を示す回路図、第２
図は第１図の回路の各部の動作波形図、第３図は
第１図の回路のスイツチ制御回路を示す回路図、
第４図は第３図のスイツチ制御回路の各部の動作
波形図、第５図はこの考案の他の実施例を示す回
路図、第６図は第５図の回路の各部の動作波形図
、第７図はこの考案の更に他の実施例の一部を示
す回路図、第８図はエミツタ接地トランジスタの
動作を説明するための回路図、第９図は第８図の
トランジスタのベース電流に対する各端子間電圧
、コレクタ電流の静特性を示す図、第１０図は８
図のトランジスタのパルス応答特性を示す図、第
１１図はトランジスタの応答時間を示す図、第１
２図は従来のトランジスタ駆動回路の回路図、第
１３図は第１２図の回路の各部の動作波形図であ
る。１……トランジスタ駆動回路、２……信号発振
器、３……バツフア回路、４，７，８，９，３１
，３４，３５，３８，４２，４４……抵抗器、５
……第１トランジスタ、６……第２トランジスタ
、１１……被駆動トランジスタ、１２……（コレ
クタキヤツチ）ダイオード、１３……負荷抵抗、
２０……スイツチ、２１……スイツチ制御回路、
２２……遅延回路、２３……アンドゲート、３０
……ホトトランジスタ、３２，３９……ダイオー
ド、３３……コンデンサ、３６……ツエナーダイ
オード、３７，４１，４３……トラスジスタ、Ｅ
_ａ，Ｅ_ｂ，Ｅ_ｃ，Ｅ_ｄ……電源（電圧）。 Figure 1 is a circuit diagram showing an embodiment of this invention, Figure 2 is a circuit diagram showing an embodiment of this invention.
The figure is an operating waveform diagram of each part of the circuit in Figure 1, and Figure 3 is a circuit diagram showing the switch control circuit of the circuit in Figure 1.
4 is an operating waveform diagram of each part of the switch control circuit of FIG. 3, FIG. 5 is a circuit diagram showing another embodiment of this invention, and FIG. 6 is an operating waveform diagram of each part of the circuit of FIG. 5. FIG. 7 is a circuit diagram showing a part of still another embodiment of this invention, FIG. 8 is a circuit diagram for explaining the operation of a common emitter transistor, and FIG. 9 is a diagram showing the base current of the transistor shown in FIG. 8. A diagram showing the static characteristics of each terminal voltage and collector current, Figure 10 is 8
Figure 11 is a diagram showing the response time of the transistor.
FIG. 2 is a circuit diagram of a conventional transistor drive circuit, and FIG. 13 is an operation waveform diagram of each part of the circuit of FIG. 12. 1...Transistor drive circuit, 2...Signal oscillator, 3...Buffer circuit, 4, 7, 8, 9, 31
, 34, 35, 38, 42, 44...Resistor, 5
...first transistor, 6 ... second transistor, 11 ... driven transistor, 12 ... (collector catch) diode, 13 ... load resistance,
20...Switch, 21...Switch control circuit,
22...delay circuit, 23...and gate, 30
... Phototransistor, 32, 39 ... Diode, 33 ... Capacitor, 36 ... Zener diode, 37, 41, 43 ... Truss transistor, E
_a , _Eb , _Ec , _Ed ...Power supply (voltage).

Claims

[Claims for Utility Model Registration] The collector of the driven transistor is connected to the first power supply terminal through a load, the emitter is connected to the second power supply terminal, and the base is connected to the first drive transistor and a second drive transistor of the opposite conductivity type. A diode is connected to each emitter of the transistor through a common resistor, and a diode is connected between the emitter and the collector of the driven transistor with a forward polarity to the base current of the driven transistor, and the collector of the first driving transistor is connected to the collector of the first driving transistor. The collector of the second drive transistor is connected to a fourth power supply terminal whose potential is lower than the voltage of the second power supply terminal. The bases of the transistors are connected to each other, and a transistor control signal generated based on the clock of a signal oscillator is supplied to the bases to control the first and second drive transistors to be turned on and off in reverse. In a transistor drive circuit that controls conducting and non-conducting of the driven transistor, the switch is turned on immediately before the driven transistor is made non-conductive based on the switch inserted in series with the diode and the clock. A truss transistor drive circuit comprising: a switch control circuit including a delay circuit for generating a switch control signal;