JPS6232540A - Information processor - Google Patents

Abstract

PURPOSE:To make it unnecessary to describe an operation for writing an operand, by containing an operation for writing an operation result stored in a specified place, in the operand of an instruction which becomes the cause for generating an exception, in an operation for executing an exception processing end instruction. CONSTITUTION:When an instruction executing simulation is ended, as an instruction executed after a result obtained by the instruction executing simulation is stored in a specified place in an information processor, an exception processing and instruction for storing the result of this instruction execution in the operand of a machine language instruction which becomes a simulation object, and executing an operation for shifting a control to an instruction to be executed after this machine language instruction is provided. In this way, the operand can be stored at higher speed than the case for storing the operand by a software, and also it becomes unnecessary to program a processing for storing the operand, therefore, the trouble for generating a program can be reduced.

Description

Detailed Description of the Invention (Industrial Application Field) The present invention relates to an information processing device, and in particular can store operands that need to be stored in a machine language instruction to be simulated at high speed compared to a software method. The present invention relates to an information processing device H having an exception handling termination instruction.

(Prior art and its problems) In the central processing unit of an information processing device such as a computer system, in order to perform certain processing such as floating point calculations at high speed, the central processing unit is equipped with dedicated hardware (such as a numerical calculation , a system) is installed, and this processing is handled by dedicated hardware.
Microprocessor and Periph
This method is widely used and is described in the Intel Corporation's Intel Handbook. In this case, the central processing unit has
Instructions are provided for this specialized hardware.

Furthermore, even when no dedicated hardware is installed on the central processing unit, a program containing instructions for the dedicated hardware is executed. When an attempt is made to execute an instruction, an exception event is generated, information necessary for simulating instruction execution is stored in a specific location within the information processing device, and then control is forcibly transferred to the simulation program. , which simulates the operations that the dedicated hardware should perform.

This method makes it possible to run programs without making any changes, although the speed is slower than when dedicated hardware is installed. A similar method is also used to make functions that the central processing unit does not have as instructions appear as if they were implemented as part of the central processing unit's instruction set.

This instruction execution simulation is performed in the following manner.

1) Using information necessary for simulating instruction execution stored in a specific location within the central processing unit, the calculation determined by the machine language is milled by software to obtain the calculation result.

2) Analyze the operand descriptor in the instruction word to obtain information regarding the location where the results obtained by simulating instruction execution should be stored.

3) In the location where the calculation result found in 2) should be stored, 1)
Stores the calculation results obtained in .

Here, the processes 1) and 2) are considered to affect the processing speed of the shimmy range. Among these, 1
) is an indispensable process for simulation of instruction execution by software because the simulation depends on a single instruction and there is no function to perform this process within the central processing unit. On the other hand, the process 2) is a process common to all instructions, and during normal instruction execution, this process is performed at high speed by hardware within the central processing unit. However, in the simulation of instruction execution by software, this processing is also performed by a program, which is a factor in lowering the processing speed compared to the case where instruction execution is performed by hardware or armware.

Furthermore, since the operand analysis process must be written one by one, programming efficiency is poor, and it is necessary to write the operand analysis process separately for each central processing unit that has a different method of specifying operands. However, the downside of this program is that it is difficult to accumulate software endorsements.

(Object of the Invention) An object of the present invention is to eliminate the drawbacks of conventional information processing devices, and to store operands, which is an essential operation when executing machine language instructions by software, by using machine language instructions in a central processing unit. It is an object of the present invention to provide an information processing device that has a function of performing this processing using an execution means at a higher speed than when performing this processing using software.

Another object of the present invention is to eliminate the need for a program for storing operands written in software for simulating instruction execution, so that the program for simulating the execution of machine language instructions can be improved. An object of the present invention is to provide an information processing device that reduces the number of steps involved in creating information.

(Structure of the Invention) According to the present invention, a machine language instruction execution means that decodes a machine language instruction and executes this instruction, and an operand position tt g that recognizes the position of an operand handled by this machine language instruction.
m means, and operand manipulation means for manipulating operands, and further includes exception handling activation means for simulating, by software, machine language instructions that cannot be executed by the machine language instruction execution means, and means for simulating the execution of the instructions. and tW information holding means for holding information necessary for the processing, and when the out-of-line processing activation means is activated, the operand of the machine language instruction is retrieved by the operand operation means and this operand is stored in the information holding means. 7. An information processing device that transfers control to software (instruction execution simulation program) using an instruction execution simulation program. At the end of J/, the obtained result is stored in a specific location or temporarily executed, and the result of the execution of the instruction stored in the specific location is used by the operand operation means to execute the relevant machine language. There is obtained an information processing device characterized in that it is provided with an exception handling path r instruction which stores information in an operand of an instruction and transfers control to an instruction to be executed next to the machine 6d instruction.

Further, according to the present invention, an information processing device is obtained that uses an information holding means as a specific location for storing results obtained by instruction execution simulation.

Furthermore, according to the present invention, in the exception processing path r instruction,
By specifying the result obtained by the instruction execution simulation as an operand, an information processing device can be obtained in which a specific location for storing the result obtained by the instruction execution simulation can be arbitrarily set.

(Detailed explanation of the configuration) The present invention stores the results obtained by the instruction execution simulation in a specific location in the information processing device at the end of the instruction execution simulation, and then stores the results obtained by the instruction execution simulation as an instruction to be executed. By providing an exception handling end instruction that stores the result in the operand of the machine language instruction being simulated and transfers control to the instruction to be executed next after this machine language instruction, the operand can be stored using the no-build air. The information processing apparatus is capable of storing operands at a higher speed than when storing operands, and furthermore, since there is no need to program processing for storing operands, the number of steps required to create a program can be reduced.

(Example) Examples of the present invention will be described in detail below with reference to the drawings.

FIG. 1 is a block diagram showing the basic configuration of a computer system related to an information processing device that is an embodiment of the present invention, and FIG.
) and (b) are diagrams showing an instruction format of a computer system in an embodiment of the present invention.

In FIG. 1, one embodiment of the present invention is a computer system having a central processing unit 2 and a storage device 9. machine language instruction control unit 12
It has In order to execute the machine language instruction, this machine language instruction control unit 12 includes a machine language instruction execution means 3 that decodes the machine language instruction and executes this instruction, and recognizes the position of the operand handled by this machine language instruction. The operand position recognition means 4 and the machine language instruction that should originally be executed by the machine language instruction execution means are realized due to hardware configuration reasons or functions that the original central processing unit does not have as an instruction. Therefore, it has a means for simulating instruction execution by software, that is, an exception handling activation means 6, and a storage device 9 stores information that holds information necessary for simulating instruction execution by software. It has a holding means 7.

A stack is used as the information holding means 7 in this embodiment, and this stack is also used as a place to store the results of instruction execution obtained by simulation.

In FIG. 2, the instruction of the computer system in this embodiment is an instruction having, in addition to an instruction code 21, a two-operand description section 22 and 23 having two operands as an instruction in the format shown in FIG. 2(a). , is an instruction having no operand as an instruction of the format shown in FIG. 2(b). Whether each instruction is in the format shown in FIG. 2(a) or in the format shown in FIG. 2(b) is uniquely determined by the value of the instruction code 2'1. The instruction code 21 specifies the operation to be performed by this instruction, and the first and second operand description sections 2
1.22 specifies the location of the operand operated by this instruction.

Referring again to FIG. 1, in the computer system of this embodiment, the machine language instruction execution means 3 includes machine language instruction recognition means IO for recognizing the operation to be performed by one machine language instruction;
It has an instruction position holding means 11 that calculates and holds the address of the next instruction to be executed, and further includes a memory device 9 which simulates the execution of instructions for machine language instructions that need to be simulated by software. Exception vector holding means 1 that holds the address of the program to be executed
Has 3.

In the computer system in this embodiment, instructions are executed as follows. Figure 3 shows this procedure.
0 - Show chart. First, a machine language instruction indicated by an address held by the instruction position holding means 11 holding the address of the next instruction to be executed by the machine language instruction execution means 3 is transferred from the storage device 9 by the storage control section 8. Take out (process 30). Next, the machine language instruction recognition means 10 recognizes the operation to be performed by this machine language instruction (process 31). If this machine language instruction is recognized as executable by the machine language instruction execution means 3 (judgment 32),
The machine language instruction execution means 3 executes instructions as shown below. First, this instruction has an operand (second
The machine language instruction recognition means 10 recognizes whether the instruction has the command (FIG. 2(a)) or not (FIG. 2(b)) (determination 33). As a result, if the instruction to be executed is an instruction without operands (FIG. 2(b)), the instruction is executed by the machine language instruction execution means 3 (process 34). In addition, if the instruction to be executed is an instruction with two operands (FIG. 2(a)), the data to be manipulated, that is, the position of the operand, is recognized and processed by the operand position recognition means 4 (35). After the instruction is retrieved by the operation means 5 (process 36) and executed by the machine language instruction execution means 3 (process 37), the obtained result is transferred to the operand storage position recognized by the operand position recognition means 4, and the operand operation is performed. It is stored by means 5 (processing 38). Finally, the instruction position holding means 1 stores the address of the instruction to be executed next after this instruction.
1 and held here (process 39).

Further, when it is recognized that the machine language instruction retrieved from the storage device 9 by the storage control unit 8 cannot be executed by the machine language instruction execution means 3, the exception handling activation means 6 is operated (process 40) a This exception handling The operation of the starting means 6 will be described below. FIG. 4 shows a flowchart illustrating this procedure.

First, if the machine language instruction recognition means 10 recognizes that the machine language instruction is an instruction with operands (determination 4
In step 1), the operand position recognition means 4 recognizes the positions of the first and second operands operated by the machine language instruction, and the operand operation means 5 extracts these operands 42). an operand, a star which is information holding means 7 in order of the first operand,
(processing 43). Next, the information regarding the position of the machine language instruction, that is, the address held in the instruction position holding means 11, is passed to the storage control unit 8, and is stored in the star register (process 44). Finally, the execution of the machine language instructions existing in the storage device 9 is simulated.

From the exception vector holding means 13 that holds the position of the program to be read, all execution simulation/execution information of the machine language instruction is
The address of the program to be executed is retrieved by the storage control unit 8 (process 45), and this is stored in the instruction position holding means 11 (process 46). As a result, control is transferred to a program that simulates the execution of the machine language instruction. FIG. 5 shows the stack when the exception handling activation means 6 is activated in an instruction having an operand in the format shown in FIG. 2(a) and control is transferred to a program that simulates the execution of the machine language instruction. It is a figure showing a state.

Next, the exception handling termination instruction (R
(referred to as the ETIWA command) will be explained.

The RETIWA instruction is an instruction having no operands in the format shown in FIG. ) is an instruction that is executed after being stored in FIG. 6 is a diagram showing the state of the register storing the instruction execution results obtained by a program that simulates the execution of machine language instructions immediately before executing the RETIWA instruction. R placed at the end of a program that simulates the execution of machine language instructions
The ETIWA instruction is executed as follows. FIG. 7 shows a flowchart illustrating this procedure. According to the instruction execution procedure shown above, the RETIWA instruction is stored in the storage device 9.
(processing 70), and the machine language instruction recognition means 10
When recognized, this instruction is found to be a RETIWA instruction (decision 71). Since this instruction is executable by the machine language instruction execution means 3, it is executed here.

First, the shimmy range stored in the starboard 50,
A process 72) in which the memory control unit 8 retrieves the machine language instruction indicated by the address 51 where the instruction to be read exists;
The machine language instruction recognition means 10 checks whether this instruction is an instruction having operands (determination 73). As a result of this judgment, if it is determined that the machine language instruction has an operand, the following judgments 73 to 8 (1) are performed. In other words, for the first operand of this instruction, determine whether it is an operand that needs to be written. The machine language command recognition means recognizes it (determination 73). If this first operand is an operand that needs to be written, the operand position recognition means 4 determines the position where this operand should be written.
The process 74) takes out the first opera/drone 1 obtained by the simulation program and is stored in the star 50, and moves it to the position recognized by the operand position recognition means 4. It is stored by the operand operation means 5 (processing 76).

Next, similar processing is performed for the second operand.

That is, regarding the second operand, the machine language instruction recognition means 10 recognizes whether it is an operand that needs to be written (determination 77).

If this second operand is an operand that needs to be written, the operand position recognition means 4 recognizes the position where this operand should be written (78);
A process 79) for extracting the second operand 62 obtained by the simulation program stored in the register 50, and storing it in a position recognized by the operand position recognition means 4 by the operand operation means 5 (process 79) 80). Finally, the instruction position holding means 11 calculates and holds the address of the instruction to be executed next to the instruction placed at the address 51 of the instruction to be simulated stored in the star register 50 (processing 8
1), the execution of the instruction ends.

An embodiment of the present invention has been described above, and as is clear from this, the gist of the present invention is to execute instructions that cannot be executed by the machine language instruction execution means of an information processing device as if they were executed by the machine language instruction execution means. As a measure to make it look like this is the case, in an information processing device that transfers control to software upon the occurrence of an exception event, the execution results of instructions stored in a specific location by a shimmy program are simulated. The goal is to simplify the operation of writing operands in a simulation program by preparing an exception handling termination instruction that includes an operation of writing to the operand of an instruction. It is clear that there are two ways to achieve this. In this embodiment, the number of operands is fixed to O or 2, and the exception handling termination instruction has no operands. However, the number of operands can be any number (determined by the instruction code). It is obvious that the present invention can be applied to a certain computer system, and it is also obvious that an exception handling termination instruction having an operand can be easily deduced from this embodiment.

Furthermore, in this embodiment, a computer system is taken as an example in which only the address of the instruction that caused the exception and the values of the first and second operands are stored as information stored in the information holding means when an exception occurs. It is obvious that the present invention can also be applied to an information processing device that stores information other than the information shown here (for example, the address of the instruction to be executed next to the instruction that caused the exception).

Further, in this embodiment, a star is used as an information holding means.

However, it is also possible to use a register in the central processing unit instead. In this case, it is necessary to save the register used to store the operand.

(Effects of the Invention) As explained above, the present invention includes an operation of writing the operation result stored in a specific location to the operand of the instruction that caused the exception in the operation of executing the exception handling termination instruction. Therefore, in a program that simulates the execution of an instruction, there is no need to write an operation to write an operand, compared to when writing an operand, and it is possible to eliminate the need for writing this operation. This has the effect of

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the basic configuration of a computer system which is an embodiment of the information processing apparatus according to the present invention, and FIG.
), (b) is a diagram showing the instruction format of the computer system according to an embodiment of the present invention, FIG. FIG. 5 is a flowchart showing the operation of the exception processing activation means in an embodiment of the present invention.
Figure 6 is a diagram showing the state of the stack when control is transferred to a program that executes a simulation. FIG. 7 is a flowchart showing the operation of an exception handling termination instruction in an embodiment of the present invention. 1... Computer system that is an information processing device, 2
...Central processing unit, 3.Machine language instruction execution means, 4.Oheland position recognition means, 5.Operand operation means, 6.Exception Processing activation means, 7. Old information holding means, 8. Storage control unit, 9. Storage device, 10. Machine language instruction recognition means, 11. Old ...Command position holding means, 12
... Machine language instruction control unit, 13 ... Exception vector holding means, 21 ... Instruction code, 22
......first operand description section, second for 23...
Operand description section, 50...star, ri, 51.
...Stain. address where the instruction to be loaded exists, 52...
...Value of the first operand, 53. Old... Value of the second operand, 61... First operand obtained by the simulation program, 62... The resulting second operand. 2nd illustration 5 times

Claims (1)

[Scope of Claims] 1. Machine language instruction execution means for decoding a machine language instruction and executing this instruction, operand position recognition means for recognizing the position of an operand handled by this machine language instruction, and operating the operand. further includes an exception handling activation means for simulating in software a machine language instruction that is not executed by the machine language instruction execution means, and an information holding means for holding information necessary for simulating the execution of the instruction. and when the exception processing activation means is activated, the operand of the machine language instruction is retrieved by the operand operation means, the operand is stored in the information storage means, and the operand is controlled by software (instruction execution simulation program). An information processing device that transfers an instruction, and at the end of an instruction execution simulation, stores the obtained result in a specific location and then executes the instruction.
storing the result of instruction execution stored in a specific location in the operand of the machine language instruction using an operand manipulation means;
An information processing device comprising an exception handling end instruction that transfers control to an instruction to be executed next to the machine language instruction. 2. The information processing device according to claim 1, characterized in that information holding means is used as a specific location for storing results obtained by instruction execution simulation. 3. A patent characterized in that by specifying the results obtained from instruction execution simulation as an operand in the exception handling termination instruction, a specific location for storing the results obtained from instruction execution simulation can be arbitrarily set. An information processing device according to claim 1.