JPS6231144A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS6231144A
JPS6231144A JP17133485A JP17133485A JPS6231144A JP S6231144 A JPS6231144 A JP S6231144A JP 17133485 A JP17133485 A JP 17133485A JP 17133485 A JP17133485 A JP 17133485A JP S6231144 A JPS6231144 A JP S6231144A
Authority
JP
Japan
Prior art keywords
seal ring
metal
package
metal layer
lid plate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP17133485A
Other languages
Japanese (ja)
Other versions
JPH0746705B2 (en
Inventor
Toshio Hamano
浜野 寿夫
Eiji Aoki
英二 青木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP60171334A priority Critical patent/JPH0746705B2/en
Publication of JPS6231144A publication Critical patent/JPS6231144A/en
Publication of JPH0746705B2 publication Critical patent/JPH0746705B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/02Containers; Seals
    • H01L23/10Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1515Shape
    • H01L2924/15153Shape the die mounting substrate comprising a recess for hosting the device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/15165Monolayer substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16195Flat cap [not enclosing an internal cavity]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/163Connection portion, e.g. seal

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Die Bonding (AREA)
  • Piezo-Electric Or Mechanical Vibrators, Or Delay Or Filter Circuits (AREA)

Abstract

PURPOSE:To avoid the generation of cracks or peeling in packages by alleviating thermal stress in a connecting part between a seal ring and the package when welding a lid plate to the seal ring which has been connected to the package. CONSTITUTION:A metallic seal ring 2A has a multilayer structure, which is interposed between a ceramic package 1 and a metallic lid plate 3 in a semiconductor package. The second metallic layer 2b of said ring 2A located on the package 1 side is formed of the metal which is softer and has higher heat conductivity in comparison with that of the first metallic layer 2a which is to be connected with the lid plate 3. Accordingly, the action for generating a thermal stress in the connecting part between the ring 2A and the package 1 is alleviated, so that the generation of cracks or peeling in the package 1 can be avoided.

Description

【発明の詳細な説明】 〔概要〕 セラミックのパッケージ容器と金属の蓋板と両者の間に
介在する金属のシールリングとにより気密封止されてな
る半導体装置において、シールリングを多層構成となし
、その蓋板と接合する金属層よりパッケージ容器側に来
る金属層を先の金属層より熱伝導率が高く且つ軟らかい
金属にすることにより、 パフケージ容器に接合されているシールリングに蓋板を
溶接する際のシールリングとパッケージ容器との接合部
の熱応力を緩和して、パッケージ容器に亀裂や剥離が発
生難くしたものである。
[Detailed Description of the Invention] [Summary] In a semiconductor device that is hermetically sealed by a ceramic package container, a metal lid plate, and a metal seal ring interposed between the two, the seal ring has a multilayer structure, By making the metal layer that is closer to the package container than the metal layer that joins the lid plate to a metal that has higher thermal conductivity and is softer than the previous metal layer, the lid plate is welded to the seal ring that is joined to the puff cage container. This reduces the thermal stress at the joint between the seal ring and the package container, making it difficult for the package container to crack or peel.

〔産業上の利用分野〕[Industrial application field]

本発明は、セラミックのパンケージ容器と金属の蓋板と
両者の間に介在する金属のシールリングとにより気密封
止されてなる半導体装置に係り、特に、そのシールリン
グの構成に関す。
The present invention relates to a semiconductor device that is hermetically sealed by a ceramic pancage container, a metal lid plate, and a metal seal ring interposed between the two, and particularly relates to the structure of the seal ring.

半導体装置の中で特に高信頼を要するものには、セラミ
ックのパッケージ容器と金属の蓋板と両者の間に介在す
る金属のシールリングとによって気密封止するパッケー
ジが重用されている。
For semiconductor devices that require particularly high reliability, packages that are hermetically sealed by a ceramic package container, a metal lid plate, and a metal seal ring interposed between the two are used.

その特徴は長期に渡り湿気などの侵入を防ぐ気密性にあ
り、その製造に際して、気密性をtiなう亀裂などが発
生しないようにすることが重要である。
Its characteristic feature is its airtightness that prevents the intrusion of moisture for a long period of time, and when manufacturing it, it is important to prevent the occurrence of cracks that would impair the airtightness.

〔従来の技術〕[Conventional technology]

第4図は従来例を示す半導体装置の側断面図(alとシ
ールリングの部分拡大側断面図(b)である。
FIG. 4 is a side sectional view (partially enlarged side sectional view (b) of Al and a seal ring) of a conventional semiconductor device.

同図において、1はセラミックのパッケージ容器、2は
環状をなす金属のシールリング、3は金属の蓋板、4は
パッケージ容器に植設されたリード端子、5はパンケー
ジ容器に搭載された半導体チップ、である。
In the figure, 1 is a ceramic package container, 2 is an annular metal seal ring, 3 is a metal lid plate, 4 is a lead terminal implanted in the package container, and 5 is a semiconductor chip mounted on the pan cage container. , is.

気密封止は、シールリング2を予めパッケージ容器1に
気密に接合しておき、シールリング2上に蓋板3を載せ
、第5図に示す如く、蓋板3の周縁部をシールリング2
に押圧するローラ電極11a、11bを転がしながら両
者間に電源12から電流を流す所謂シーム溶接によって
、蓋板3の周縁部がシールリング2に溶接されてなされ
る。
For airtight sealing, the seal ring 2 is airtightly joined to the package container 1 in advance, the cover plate 3 is placed on the seal ring 2, and the peripheral edge of the cover plate 3 is attached to the seal ring 2 as shown in FIG.
The peripheral edge of the cover plate 3 is welded to the seal ring 2 by so-called seam welding, in which a current is passed from a power source 12 between the roller electrodes 11a and 11b, which are pressed against each other, while rolling them.

第6図は溶接部におけるシールリング2近傍の詳細側断
面図である。
FIG. 6 is a detailed side sectional view of the vicinity of the seal ring 2 at the welded portion.

シールリング2は、厚さ約Q 、 5 *m、断面幅約
1.5顛でコバール(29%ニッケル、17%コバルト
The seal ring 2 has a thickness of about Q, 5*m, a cross-sectional width of about 1.5 meters, and is made of Kovar (29% nickel, 17% cobalt).

残り鉄の合金)からなり、同図に示される如く、パンケ
ージ容器1上に積層被着されたタングステンのメタライ
ズ1I5ii6、ニッケルのめっき膜7aの上に銀蝋(
銀と銅の合金)8で接合されており、その表面にニッケ
ルのめっき1Q7b、金のめっき膜7Cが被着されてい
る。また蓋板3は、厚さ約0.15龍のコバール板から
なる蓋板本体3aにニッケルのめっき1IR7dが被着
されてなっている。
As shown in the figure, tungsten metallization 1I5ii6 and nickel plating film 7a are coated with silver wax (remaining iron alloy).
It is bonded with an alloy of silver and copper) 8, and a nickel plating film 1Q7b and a gold plating film 7C are deposited on its surface. The cover plate 3 is made of a cover plate main body 3a made of a Kovar plate with a thickness of about 0.15 mm and coated with nickel plating 1IR7d.

蓋板3をシールリング2に接合する上記溶接は、蓋板3
周縁部のシールリング2との接触部に発生するジュール
熱によりその部分が局部的に溶融し、互いに溶接性に優
れた蓋板本体3aのコバールとシールリング2のコバー
ルとが溶着してなされる。
The above welding for joining the cover plate 3 to the seal ring 2
The Joule heat generated at the peripheral edge contact area with the seal ring 2 causes that area to melt locally, and the Kovar of the cover plate main body 3a and the Kovar of the seal ring 2, which have excellent weldability, are welded to each other. .

そしてその溶着領域の幅は例えば約0.2鶴程度になり
、確実な気密性を形成する。
The width of the welded area is, for example, approximately 0.2 mm, thereby providing reliable airtightness.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

しかしながら上記溶接の際に発生するジュール熱は、シ
ールリング2を通ってパッケージ容器1に放散する過程
でシールリング2とパフケージ容器1をも加熱し、シー
ルリング2を形成するコバールの熱伝導率の低さに起因
する温度勾配により、シールリング2とパッケージ容器
1との接合部に熱応力が生ずる。
However, the Joule heat generated during the above welding also heats the seal ring 2 and the puff cage container 1 in the process of dissipating through the seal ring 2 into the package container 1, and the thermal conductivity of Kovar forming the seal ring 2 decreases. Due to the temperature gradient caused by the low temperature, thermal stress occurs at the joint between the seal ring 2 and the package container 1.

この熱応力は、上記接合部に介在する銀蝋8によって緩
和されるものの銀fi8の厚さは高々50μmであるた
めその緩和は不充分で、甚だしくは第7図に示すように
、パンケージ容器1に亀裂8を発生させたりメタライズ
膜6のパッケージ容器1からの剥%li9を発生させた
りする場合があり、この亀裂8や剥離9は、気密性を劣
化させる要因となる。
Although this thermal stress is alleviated by the silver wax 8 interposed in the joint, since the thickness of the silver fi 8 is at most 50 μm, the relaxation is insufficient, and as shown in FIG. This may cause cracks 8 or peeling of the metallized film 6 from the package container 1, and these cracks 8 and peeling 9 may cause deterioration of airtightness.

〔問題点を解決するための手段〕[Means for solving problems]

第1図は本発明の実施例を示す半導体装置の側断面図(
a)とシールリングの部分拡大側断面図(b)である。
FIG. 1 is a side sectional view (
FIG. 3(b) is a partially enlarged side sectional view of the seal ring.

上記問題点は、第1図に示される如く、半導体パッケー
ジにおけるセラミックのパッケージ容器1と金属の蓋板
3との間に介在する金属のシールリング2Aが多層構成
をなし、シールリング静の蓋板3と接合する第一の金属
層2aよりパッケージ容器1側に位置する第二の金属層
2bが第一の金属層2aの金属より熱伝導率が高(且つ
軟らかい金属でなる本発明の半導体装置によって解決さ
れる。
The above problem arises because, as shown in FIG. 1, the metal seal ring 2A interposed between the ceramic package container 1 and the metal lid plate 3 in a semiconductor package has a multilayer structure, The second metal layer 2b, which is located closer to the package container 1 than the first metal layer 2a bonded to the first metal layer 2a, has a higher thermal conductivity (and is made of a softer metal) than the first metal layer 2a. solved by.

本発明によれば、上記シールリング2Aはクラッド材を
用いて多層構成をなすのが望ましい。
According to the present invention, it is desirable that the seal ring 2A has a multilayer structure using a clad material.

〔作用〕[Effect]

上記第一の金属層2aには、溶接性の点から従来のよう
にコバールなどを用いる必要があるが、これより熱伝導
率が高く且つ軟らかい金属でなる上記第二の金属層2b
の存在が、先に説明した温度勾配を小さくして接合部に
発生させる熱応力を低減させ然もその熱応力を更に緩和
させる。従って、第7図に示した亀裂8や剥離9の発生
は大幅に減少する。
For the first metal layer 2a, it is necessary to use Kovar or the like as in the past from the viewpoint of weldability, but the second metal layer 2b is made of a metal with higher thermal conductivity and softer.
The presence of the above-described temperature gradient reduces the thermal stress generated in the joint, and further alleviates the thermal stress. Therefore, the occurrence of cracks 8 and peeling 9 shown in FIG. 7 is greatly reduced.

代わりに第一の金属層2aと第二の金属層2bとの接合
部に熱応力が生ずるが、この接合部はクラッド接合であ
るため剥離の恐れはない。
Instead, thermal stress occurs at the joint between the first metal layer 2a and the second metal layer 2b, but since this joint is a clad joint, there is no risk of peeling.

なお、第二の金[52bとしては、例えば銅などを使用
することが出来る。
Note that as the second gold [52b], for example, copper or the like can be used.

〔実施例〕〔Example〕

以下、第1図と第1図に示す実施例の溶接前におけるシ
ールリング近傍の詳細を示す第2図の側断面図、および
第二の実施例におけるシールリングを示す第3図の部分
拡大側断面図、を用いて説明する。
Below, a side sectional view of FIG. 1 and FIG. 2 showing details of the vicinity of the seal ring in the embodiment shown in FIG. 1 before welding, and a partially enlarged side view of FIG. 3 showing the seal ring in the second embodiment. This will be explained using a cross-sectional view.

第1図(a)に示す半導体装置は、第4図に示す従来例
のシールリング2を外形寸法が同じで多層構成にしたシ
ールリング2Aに置換したもので、その、他は従来例と
同様である。
The semiconductor device shown in FIG. 1(a) is the same as the conventional example except that the seal ring 2 of the conventional example shown in FIG. 4 is replaced with a seal ring 2A having the same external dimensions and a multilayer structure. It is.

即ち、シールリング2Aは、厚さ約0.5龍、断面幅約
1.5鰭であり、第1図(b)にも示される如くj¥さ
方向に約0.25m1宛二分して蓋板3側の金属層(前
記第一の金JaS5) 2aがコバールでなりパンケー
ジ容器1側の金属層(前記第二の金属層) 2bが無酸
素銅でなっている。そして、両金属をクラッド接合した
クラッド材から切り出して形成されている。
That is, the seal ring 2A has a thickness of about 0.5 mm and a cross-sectional width of about 1.5 mm, and as shown in FIG. The metal layer (the first gold JaS5) 2a on the plate 3 side is made of Kovar, and the metal layer (the second metal layer) 2b on the pan cage container 1 side is made of oxygen-free copper. It is formed by cutting out a clad material in which both metals are clad-bonded.

この半導体装置の溶接前におけるシールリング2A近傍
の詳細断面は、第6図に相当させた第2図に示す如くで
、パンケージ容器1、メタライズ膜6、めっき膜7a、
7b、 7c、銀蝋8、および蓋板3は従来例と変わら
ない。
A detailed cross section of the vicinity of the seal ring 2A of this semiconductor device before welding is as shown in FIG. 2, which corresponds to FIG.
7b, 7c, silver wax 8, and cover plate 3 are the same as in the conventional example.

この構成でもって従来例と同様な溶接を行うと、蓋板本
体3 aのコバールと金属層2aのコバールは、従来例
と同様に溶着して確実な気密性を形成する。
When welding is performed in the same manner as in the conventional example with this configuration, the Kovar of the cover plate main body 3a and the Kovar of the metal layer 2a are welded together as in the conventional example to form reliable airtightness.

一方、金属層2bがコバールより熱伝導率が高く且つ軟
らかい銅からなるため、上記溶接で発生するジュール熱
がパンケージ容器1に放散する過程における金属層2b
内の温度勾配は、上記高い熱伝導率により従来例の場合
より小さくなり、シールリング2Aとパッケージ容器1
との接合部に熱応力を発生させる作用が低減すると共に
、発生する熱応力は上記軟らかさにより緩和されて、従
来例で問題になった第7図図示の亀裂8や剥離9の発生
が大幅に減少する。
On the other hand, since the metal layer 2b is made of copper, which has higher thermal conductivity than Kovar and is softer, the metal layer 2b is in the process of dissipating the Joule heat generated in the welding into the pan cage container 1.
Due to the above-mentioned high thermal conductivity, the temperature gradient inside the seal ring 2A and the package container 1 is smaller than that of the conventional example.
At the same time, the effect of generating thermal stress at the joint with the metal is reduced, and the generated thermal stress is alleviated by the above-mentioned softness, and the occurrence of cracks 8 and peeling 9 shown in Fig. 7, which were problems in the conventional example, is significantly reduced. decreases to

なお、金属層2aと2bの接合部に熱応力が生ずるが、
この接合部はクラッド接合であるため剥離の恐れはない
Note that thermal stress occurs at the joint between metal layers 2a and 2b;
Since this joint is a clad joint, there is no risk of peeling.

ちなみに、従来例においては亀裂8や剥離9の発生を避
けるため許容範囲の狭い溶接条件を厳しく管理している
が、この範囲から外れ従来例では問題になる条件で従来
例と本実施例とについて亀裂8および剥離9の発生を比
較したところ、本実施例における発生率は従来例の11
5以下であった。
Incidentally, in the conventional example, welding conditions with a narrow allowable range are strictly controlled in order to avoid the occurrence of cracks 8 and peeling 9, but the conventional example and this example are Comparing the occurrence of cracks 8 and peeling 9, the occurrence rate in this example was 11 compared to the conventional example.
It was 5 or less.

第二の実施例は、先の実施例と同様に第4図に示す従来
例のシールリング2を第3図に示すシールリング2Aに
置換したものである。
In the second embodiment, like the previous embodiment, the conventional seal ring 2 shown in FIG. 4 is replaced with a seal ring 2A shown in FIG. 3.

このシールリング2Aは、コバールの金属層(前記第一
の金属層) 2a、無酸素銅の金属層(前記第二の金E
E層) 2b、およびモリブデンの金属層2Cの三層構
成でなり、それぞれの厚さは、約0.17mm、約0.
17mm、約0.17nで、全体の厚さが約Q 、 5
 **となっている。そして、各金属をクラッド接合し
たクラッド材から切り出して形成されている。
This seal ring 2A includes a Kovar metal layer (the first metal layer) 2a, an oxygen-free copper metal layer (the second gold E
Layer E) 2b and molybdenum metal layer 2C, each having a thickness of about 0.17 mm and a thickness of about 0.1 mm.
17mm, about 0.17n, and the total thickness is about Q, 5
**. It is formed by cutting out a clad material in which each metal is clad-bonded.

モリブデンの金属層2cを設けたのは、パッケージ容器
1のセラミックに対して熱膨張率の整合を金属層2bの
銅より高めるようにしたためで、亀裂8および剥離9の
発生について前述と同様な比較におけるこの実施例の発
生率は、従来例の凡そ1/10であった。
The reason why the molybdenum metal layer 2c was provided was to match the thermal expansion coefficient with the ceramic of the package container 1 better than that of the copper of the metal layer 2b. The incidence rate of this example was about 1/10 of that of the conventional example.

なお上記二つの実施例では、金属層2aの材料をコバー
ルにしたが、金属層2bの存在により、金属層2aの材
料を蓋板本体3aに対して溶接性の確保が出来る他の金
属例えば4270イ (42%ニッケル。
In the above two embodiments, the material of the metal layer 2a is Kovar, but due to the presence of the metal layer 2b, the material of the metal layer 2a can be other metal such as 4270, which can ensure weldability to the cover plate main body 3a. (42% nickel.

残り鉄の合金)などにすることも可能である。It is also possible to use a residual iron alloy.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明の構成によれば、セラミック
のパッケージ容器と金属の蓋板と両者の間に介在する金
属のシールリングとにより気密封止されてなる半導体装
置において、パッケージ容器に接合されているシールリ
ングに蓋板を溶接する際のシールリングとパッケージ容
器との接合部の熱応力を緩和することが出来て、パンケ
ージ容器における亀裂や剥離の発生回避を容易ににさせ
る効果がある。
As explained above, according to the configuration of the present invention, in a semiconductor device that is hermetically sealed by a ceramic package container, a metal lid plate, and a metal seal ring interposed between the two, the semiconductor device is bonded to the package container. It is possible to alleviate the thermal stress at the joint between the seal ring and the package container when the lid plate is welded to the seal ring, which is attached to the package container.This has the effect of making it easier to avoid cracking and peeling in the pan cage container.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の実施例を示す半導体装置の側断面図(
alとシールリングの部分拡大側断面図(bl、 第2図は本発明実施例の溶接前におけるそのシールリン
グ近傍の詳VU+側断面図、 第3図は本発明の第二の実施例におけるシールリングの
部分拡大側断面図、 第・1図は従来例を示す半導体装置の側断面図fatと
シールリングの部分拡大側断面図(bl、第5図は蓋板
をシールリングに接合する溶接を示す図、 第6図は従来例の溶接前におけるそのシールリング近傍
の詳細側断面図、 第7図は問題点を示すパッケージ容器の平面図、である
。 図において、 1はパッケージ容器、 2.2Aはシールリング、 2aは金属層(第一の金属層)、 2bハ金属層(第二)金JWJi)、 2cは金泥層、 3は蓋板、 3aは蓋板本体、 4はリート端子、 5は半導体チップ、 6はメタライズ欣、 7a、7b、7c、7dはめっき欣、 8は亀裂、 9は剥離、 11a 、 llbはローラ電極、 12は電源、 9−2  圀 83図 (i級Xンール“ルフ′1;接イト1引容接X〒、11
廻第5図 第6)困
FIG. 1 is a side sectional view (
al and a partially enlarged side sectional view of the seal ring (BL, Figure 2 is a detailed VU+ side sectional view of the vicinity of the seal ring before welding in the embodiment of the present invention, and Figure 3 is the seal in the second embodiment of the present invention. Figure 1 is a partially enlarged side sectional view of the ring. Figure 1 is a side sectional view fat of a semiconductor device showing a conventional example. Figure 5 is a partially enlarged side sectional view of the seal ring. 6 is a detailed side sectional view of the vicinity of the seal ring of the conventional example before welding, and FIG. 7 is a plan view of the package container showing the problem. In the figures, 1 is a package container; 2. 2A is a seal ring, 2a is a metal layer (first metal layer), 2b is a metal layer (second), 2c is a gold mud layer, 3 is a cover plate, 3a is a cover plate body, 4 is a lead terminal, 5 is a semiconductor chip, 6 is a metallized layer, 7a, 7b, 7c, 7d is a plated layer, 8 is a crack, 9 is a peeling, 11a, llb are roller electrodes, 12 is a power supply, 9-2 Diagram 83 (I class X nuru "rufu'1; contact 1 pull contact X〒, 11
Mawari Figure 5 Figure 6) Trouble

Claims (1)

【特許請求の範囲】 1)半導体パッケージにおけるセラミックのパッケージ
容器(1)と金属の蓋板(3)との間に介在する金属の
シールリング(2A)が多層構成をなし、該シールリン
グ(2A)の該蓋板(3)と接合する第一の金属層(2
a)より該パッケージ容器(1)側に位置する第二の金
属層(2b)が該第一の金属層(2a)の金属より熱伝
導率が高く且つ軟らかい金属でなることを特徴とする半
導体装置。 2)上記シールリング(2A)はクラッド材を用いて上
記多層構成をなすことを特徴とする特許請求の範囲第1
項記載の半導体装置。
[Claims] 1) A metal seal ring (2A) interposed between a ceramic package container (1) and a metal lid plate (3) in a semiconductor package has a multilayer structure, and the seal ring (2A ) of the first metal layer (2) bonded to the lid plate (3) of
A semiconductor characterized in that the second metal layer (2b) located closer to the package container (1) than a) is made of a metal that has higher thermal conductivity and is softer than the metal of the first metal layer (2a). Device. 2) Claim 1, wherein the seal ring (2A) has the multilayer structure using a cladding material.
1. Semiconductor device described in Section 1.
JP60171334A 1985-08-02 1985-08-02 Semiconductor device Expired - Lifetime JPH0746705B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60171334A JPH0746705B2 (en) 1985-08-02 1985-08-02 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60171334A JPH0746705B2 (en) 1985-08-02 1985-08-02 Semiconductor device

Publications (2)

Publication Number Publication Date
JPS6231144A true JPS6231144A (en) 1987-02-10
JPH0746705B2 JPH0746705B2 (en) 1995-05-17

Family

ID=15921300

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60171334A Expired - Lifetime JPH0746705B2 (en) 1985-08-02 1985-08-02 Semiconductor device

Country Status (1)

Country Link
JP (1) JPH0746705B2 (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05335433A (en) * 1992-05-27 1993-12-17 Kyocera Corp Package for accommodating semiconductor element
WO2003044857A1 (en) * 2001-11-19 2003-05-30 Daishinku Corporation Package for electronic component, and piezoelectric vibrating device using the package for electronic component
US8976508B2 (en) 2011-05-12 2015-03-10 Seiko Instruments Inc. Electrochemical cell
CN109256373A (en) * 2018-09-29 2019-01-22 中国电子科技集团公司第四十三研究所 I/F converting system 3 D stereo encapsulating structure and packaging method
CN111312661A (en) * 2020-03-31 2020-06-19 中国电子科技集团公司第四十三研究所 Use stress-reducing sandwich structure that ceramic substrate is last to enclose frame

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61239648A (en) * 1985-04-16 1986-10-24 Mitsubishi Metal Corp Sealing board with window-framework-shaped solder for packaging semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61239648A (en) * 1985-04-16 1986-10-24 Mitsubishi Metal Corp Sealing board with window-framework-shaped solder for packaging semiconductor device

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05335433A (en) * 1992-05-27 1993-12-17 Kyocera Corp Package for accommodating semiconductor element
WO2003044857A1 (en) * 2001-11-19 2003-05-30 Daishinku Corporation Package for electronic component, and piezoelectric vibrating device using the package for electronic component
US8976508B2 (en) 2011-05-12 2015-03-10 Seiko Instruments Inc. Electrochemical cell
JP5709187B2 (en) * 2011-05-12 2015-04-30 セイコーインスツル株式会社 Electrochemical cell
CN109256373A (en) * 2018-09-29 2019-01-22 中国电子科技集团公司第四十三研究所 I/F converting system 3 D stereo encapsulating structure and packaging method
CN111312661A (en) * 2020-03-31 2020-06-19 中国电子科技集团公司第四十三研究所 Use stress-reducing sandwich structure that ceramic substrate is last to enclose frame

Also Published As

Publication number Publication date
JPH0746705B2 (en) 1995-05-17

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