JPS6231136A - Device for evaluating photosemiconductor element - Google Patents
Device for evaluating photosemiconductor elementInfo
- Publication number
- JPS6231136A JPS6231136A JP60171512A JP17151285A JPS6231136A JP S6231136 A JPS6231136 A JP S6231136A JP 60171512 A JP60171512 A JP 60171512A JP 17151285 A JP17151285 A JP 17151285A JP S6231136 A JPS6231136 A JP S6231136A
- Authority
- JP
- Japan
- Prior art keywords
- optical
- optical fiber
- probe
- semiconductor element
- attached
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Led Devices (AREA)
- Light Receiving Elements (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は半導体素子のうちで、発光機能又は受光機能を
有する光半導体素子の評価装置に関する。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to an evaluation apparatus for an optical semiconductor element having a light emitting function or a light receiving function among semiconductor elements.
従来の技術
ウェハと呼ばれる半導体基板上に形成された半導体素子
をウェハ状態で効率的に測定評価する装置としてプロー
ブカードがある。通常プローブカードは第4図に示すよ
うに絶縁体で形成された基板41上に、半導体素子に接
触するように取付けられた複数本の探針42が取り付け
られている。2. Description of the Related Art A probe card is an apparatus for efficiently measuring and evaluating semiconductor elements formed on a semiconductor substrate called a wafer in a wafer state. As shown in FIG. 4, a probe card normally has a plurality of probes 42 mounted on a substrate 41 made of an insulator so as to be in contact with semiconductor elements.
各探針42の先は被測定半導体素子の所望のパッドに接
触するようにそれぞれの間隔が決められている。各探針
42の他端は、基板41上に形成された銅はく43と接
続されていて、銅はく43を通して基板41上に形成さ
れたコネクタ部44の各ピン46にそれぞれ電気的に接
続されている。The distance between each probe 42 is determined so that the tip of each probe 42 comes into contact with a desired pad of the semiconductor device to be measured. The other end of each probe 42 is connected to a copper foil 43 formed on the substrate 41, and is electrically connected to each pin 46 of a connector portion 44 formed on the substrate 41 through the copper foil 43. It is connected.
探針42を半導体素子に接触させることによりコネクタ
部44を通して外部の接続された測定装置により半導体
素子を評価することができる。一方たとえばGaAs
、InP等の半導体基板上て形成した発光素子もしくは
受光素子の光学的特性を評価するためには、個々の半導
体素子をチップ状に切り出し組立てた後、それぞれを別
々に測定評価を行っていた。By bringing the probe 42 into contact with the semiconductor element, the semiconductor element can be evaluated by an externally connected measuring device through the connector section 44. On the other hand, for example, GaAs
In order to evaluate the optical characteristics of a light-emitting element or a light-receiving element formed on a semiconductor substrate such as , InP, etc., each semiconductor element is cut out into chips and assembled, and then each is measured and evaluated separately.
発明が解決しようとする問題点
しかしながら従来の技術を用いて半導体素子を評価する
場合、従来のプローブカードを用いてウェハ上に形成さ
れた光半導体素子の電気特性について調べ、良品を個々
のチップに切り出し組立てた後、光特性を評価する方法
を採っていた。このため評価に多くの手間と組立用マウ
ントが必要であった。またこのようにして得られたデー
タからウェハ面内における光半導体素子の光学的特性の
分布を得るためには模大な作業が必要であり、短期間の
うちに、製造工程に適切な指示を行うことが困難であっ
た。Problems to be Solved by the Invention However, when evaluating semiconductor devices using conventional technology, conventional probe cards are used to investigate the electrical characteristics of optical semiconductor devices formed on a wafer, and good products are separated into individual chips. After cutting out and assembling, the method used was to evaluate the optical characteristics. For this reason, a lot of effort and assembly mounts were required for evaluation. Furthermore, obtaining the distribution of optical characteristics of optical semiconductor elements within the wafer plane from the data obtained in this way requires a huge amount of work, and it is necessary to provide appropriate instructions for the manufacturing process in a short period of time. It was difficult to do.
問題点を解決するための手段
上記問題点を解決する本発明の技術的手段は、上記従来
のプローブカードに少々くとも1つ以上の光ファイバを
用いることにより光半導体素子の光学的特性の評価をウ
ェハ状態のままで行えるようにすることである。Means for Solving the Problems The technical means of the present invention for solving the above problems is to evaluate the optical characteristics of an optical semiconductor element by using at least one or more optical fibers in the above conventional probe card. The objective is to enable the process to be carried out in the wafer state.
作用
この技術的手段による作用は次のようなものである。す
なわち、プローブカードに取り付けられた複数本の探針
が光半導体素子の所望のパッドに接触するように、間隔
を決めて取り付けられているのと同様に、光半導体素子
の発光位置もしくは受光位置でファイバと光結合出来る
ように少なくとも1つ以上の光ファイバが上記プローブ
カードに取り付けられている。ウェハ上に形成された光
半導体素子のパッドに接続するようにプローブカードの
位置合わせを行うと、取りつけられたファイバの先端を
発光位置もしくは受光位置に位置合わせが出来、プロー
ブカードの探針により電気特性が、探針によシ所定の電
気信号を光半導体素子に印加することによりファイバを
通じて同時に光特性が、ウェハ形態のままで評価するこ
とが可能になる。Effects The effects of this technical means are as follows. In other words, in the same way that multiple probes attached to a probe card are attached at determined intervals so as to contact desired pads of an optical semiconductor element, the probes are attached at fixed intervals so as to make contact with desired pads of an optical semiconductor element. At least one optical fiber is attached to the probe card so as to be optically coupled to the fiber. By aligning the probe card so that it connects to the pad of the optical semiconductor element formed on the wafer, the tip of the attached fiber can be aligned to the light emitting position or the light receiving position, and the tip of the probe card can generate electricity. By applying a predetermined electric signal to the optical semiconductor element using a probe, it is possible to simultaneously evaluate the optical characteristics in the wafer form through the fiber.
実施例 以下本発明の実施例を添付図面にもとづいて説明する。Example Embodiments of the present invention will be described below based on the accompanying drawings.
第1図は本発明の一実施例の斜視図であり、第2図はそ
の探針部分の拡大断面図であり、第3図は本発明の他の
実施例を示す断面図である。FIG. 1 is a perspective view of one embodiment of the present invention, FIG. 2 is an enlarged sectional view of the probe portion thereof, and FIG. 3 is a sectional view showing another embodiment of the present invention.
第1図においてガラスエポキシ等の絶縁体で形成された
基板1の中央部に開孔された穴2に従来のプローブカー
ドと同様に、複数本の探針3は取り付けられている。探
針3は基板上に形成された銅箔4により基板1のコネク
タ部5の所定のピンeにそれぞれ電気的に接続されてい
る。In FIG. 1, a plurality of probes 3 are attached to a hole 2 formed in the center of a substrate 1 made of an insulator such as glass epoxy, similar to a conventional probe card. The probes 3 are electrically connected to predetermined pins e of the connector portion 5 of the substrate 1 by copper foils 4 formed on the substrate.
その他に本実施例によるプローブカードにおいては、光
ファイバ7が取り付けられている。光ファイバ7の片端
は光ファイバの支持具8により保持されている。他端は
、例えば光電素子9に接続されているかもしくは基板1
のコネクタ部6に取り付けられた光コネクタ10に接続
されている。In addition, an optical fiber 7 is attached to the probe card according to this embodiment. One end of the optical fiber 7 is held by an optical fiber support 8. The other end is connected to the photoelectric element 9 or the substrate 1, for example.
It is connected to an optical connector 10 attached to the connector section 6 of.
光コネクタを通して外部の評価装置に接続することがで
きる。また光電素子9は、被測定物である光半導体素子
の受光機能の測定を行う場合、半導体レーザのような発
光素子であり、光半導体素子の発光機能の測定を行う場
合、フォトダイオードのような受光素子であればよい。It can be connected to external evaluation equipment through an optical connector. The photoelectric element 9 is a light-emitting element such as a semiconductor laser when measuring the light-receiving function of an optical semiconductor element as an object to be measured, and a light-emitting element such as a photodiode when measuring the light-emitting function of an optical semiconductor element. Any light receiving element may be used.
光ファイバ7に接続された光電素子9により電気信号と
なりコネクタ部6を通して外部の評価装置へ接続できる
。The photoelectric element 9 connected to the optical fiber 7 generates an electrical signal, which can be connected to an external evaluation device through the connector section 6.
これ以後、光半導体素子の発光機能を評価する場合も、
受光機能を評価する場合も本発明の構成は同じであるの
で、光半導体素子が受光機能を有する場合について説明
を行う。From now on, when evaluating the light emitting function of optical semiconductor devices,
Since the configuration of the present invention is the same when evaluating the light receiving function, the case where the optical semiconductor element has the light receiving function will be explained.
第2図においてステージ21上にウェハ22が置かれて
いる。ウェハ22内には光半導体素子23が同一ビッテ
で形成されている。探針3により電気特性が評価できる
のは従来のプローブカードと同じである。光半導体素子
23内の受光部24の光特性を評価するには、半導体レ
ーザにより構成された発光素子25から出た光が光ファ
イバ7を通って半導体素子23の受光部24に入射され
、その光により探針3に表われる電気信号を観察するこ
とにより行える。光ファイバ7の光半導体素子23に接
近させる端は支持具8により、探針3が光半導体素子2
3のパ・フドに位置合わせを行うと、光半導体素子23
の受光部24に位置が合うように探針3との間で相対位
置があらかじめ決めて固定されている。ステージ21を
光半導体素子23のウェハ22上でのピッチごとに移動
させることにより容易に、電気特性だけでなく光特性を
も評価することが出来る。In FIG. 2, a wafer 22 is placed on a stage 21. Optical semiconductor elements 23 are formed in the same bit in the wafer 22. The ability to evaluate electrical characteristics using the probe 3 is the same as in the conventional probe card. In order to evaluate the optical characteristics of the light receiving section 24 in the optical semiconductor element 23, light emitted from the light emitting element 25 constituted by a semiconductor laser is incident on the light receiving section 24 of the semiconductor element 23 through the optical fiber 7, and its This can be done by observing the electrical signal that appears on the probe 3 due to light. The end of the optical fiber 7 that is brought close to the optical semiconductor element 23 is supported by a support 8 so that the probe 3 can be connected to the optical semiconductor element 2.
When the alignment is performed on the pad of No. 3, the optical semiconductor element 23
The relative position between the probe 3 and the probe 3 is predetermined and fixed so that the probe 3 is aligned with the light receiving section 24 of the probe 3. By moving the stage 21 at every pitch of the optical semiconductor elements 23 on the wafer 22, it is possible to easily evaluate not only the electrical characteristics but also the optical characteristics.
第3図は本発明の他の実施例であるが、発光素子26か
ら出射された光は光ファイバ7を通じて導びかれた後、
レンズ31と支持の筒32により結像系が構成され、光
半導体素子23内の受光部24に効率よく光が入射する
ように焦点位置が他の探針3との相対位置で決められて
いる。さらに光半導体素子は、高速の光通信、信号処理
に用いられることが多くそのためには、ウェハ状態で高
速動作をさせ光半導体素子の評価を行う必要がある。そ
のため第3図に示すように電気信号の接続線としτ高周
波信号を通すことができるセミリジットケーブル等のコ
アキシャルケーブル33を用いて、その先端に可能なか
ぎり短かい探針3を取り付けて光半導体素子23のパッ
ドと接続を行う。FIG. 3 shows another embodiment of the present invention, in which the light emitted from the light emitting element 26 is guided through the optical fiber 7, and then
The lens 31 and the supporting tube 32 constitute an imaging system, and the focal position is determined by the relative position with respect to other probes 3 so that light can efficiently enter the light receiving section 24 in the optical semiconductor element 23. . Furthermore, optical semiconductor devices are often used for high-speed optical communications and signal processing, and for this purpose, it is necessary to evaluate the optical semiconductor devices by operating them at high speed in a wafer state. Therefore, as shown in FIG. 3, a coaxial cable 33 such as a semi-rigid cable that can pass high-frequency signals is used as a connection line for electrical signals, and a probe 3 as short as possible is attached to the tip of the coaxial cable 33 to connect the optical semiconductor device. Connect with pad 23.
このような構成にすることにより、電気特性及び光特性
の高速動作時の評価が可能となる。With such a configuration, it becomes possible to evaluate electrical characteristics and optical characteristics during high-speed operation.
発明の効果
以上述べてきたように本発明によれば、ウェハ状態のま
まで光半導体素子の電気特性及び光特性、両方の評価を
効率的に行うことが出来、さらに得られた特性のウェハ
上での分布状態を短期間に把握して製造工程へ適切な指
示を行うことが出来る。Effects of the Invention As described above, according to the present invention, it is possible to efficiently evaluate both the electrical and optical characteristics of optical semiconductor elements in the wafer state, and furthermore, the obtained characteristics can be evaluated on the wafer. It is possible to grasp the distribution state in a short period of time and give appropriate instructions to the manufacturing process.
第1図は本発明の一実施例におけるプローブカードの斜
視図、第2図は同プローブカードの探針部の拡大断面図
、第3図は本発明の他の実施例におけるプローブカード
の探針部の拡大断面図、第4図は従来のプローブカード
の斜視図である。
1・・・・・・基板、3・・・・・・探針、7・・・・
・・光ファイバ、9・・・・・・光電素子、22・・・
・・・ウェハ、23・・・・・・光半導体素子、26・
・・・・・発光素子、31・・・・・・レンズ、33・
・・・・・コアキシャルケーブル。FIG. 1 is a perspective view of a probe card according to an embodiment of the present invention, FIG. 2 is an enlarged sectional view of the probe portion of the same probe card, and FIG. 3 is a probe of a probe card according to another embodiment of the present invention. FIG. 4 is a perspective view of a conventional probe card. 1...Substrate, 3...Tip, 7...
...Optical fiber, 9...Photoelectric element, 22...
... Wafer, 23... Optical semiconductor element, 26.
... Light emitting element, 31 ... Lens, 33.
...Coaxial cable.
Claims (4)
探針を半導体素子と接触させて前記半導体素子の評価を
行うとともに、前記基板に、少なくとも1つの光ファイ
バを、前記半導体素子近傍位置に固定してなる光半導体
素子の評価装置。(1) A probe attached to a substrate made of an insulating material is brought into contact with the semiconductor element to evaluate the semiconductor element, and at least one optical fiber is attached to the substrate at a position near the semiconductor element. Evaluation device for fixed optical semiconductor devices.
いる特許請求の範囲第1項記載の光半導体素子の評価装
置。(2) The optical semiconductor device evaluation device according to claim 1, wherein one end of the optical fiber is connected to a photoelectric device.
少なくとも1つのレンズが取り付けられており、このレ
ンズにより半導体素子表面と光ファイバ端で焦点を結ぶ
ように前記レンズが配置されてなる特許請求の範囲第1
項記載の光半導体素子の評価装置。(3) A patent in which at least one lens is attached to the end of an optical fiber fixed near a semiconductor element, and the lens is arranged so that the lens focuses the surface of the semiconductor element and the end of the optical fiber. Claim 1
An evaluation device for an optical semiconductor device as described in 2.
ブルを有する特許請求の範囲第1項記載の光半導体素子
の評価装置。(4) The evaluation device for an optical semiconductor device according to claim 1, wherein the probe has a coaxial cable extending to the vicinity of the surface of the semiconductor device.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60171512A JPS6231136A (en) | 1985-08-02 | 1985-08-02 | Device for evaluating photosemiconductor element |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60171512A JPS6231136A (en) | 1985-08-02 | 1985-08-02 | Device for evaluating photosemiconductor element |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6231136A true JPS6231136A (en) | 1987-02-10 |
Family
ID=15924491
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP60171512A Pending JPS6231136A (en) | 1985-08-02 | 1985-08-02 | Device for evaluating photosemiconductor element |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6231136A (en) |
Cited By (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01158489A (en) * | 1987-09-02 | 1989-06-21 | Tokyo Electron Ltd | Electric characteristics testing method by prober |
JPH02302082A (en) * | 1989-05-16 | 1990-12-14 | Nec Corp | Manufacture of light emitting diode |
JP2003273178A (en) * | 2002-01-29 | 2003-09-26 | Hewlett Packard Co <Hp> | Interconnect structure |
US6657446B1 (en) * | 1999-09-30 | 2003-12-02 | Advanced Micro Devices, Inc. | Picosecond imaging circuit analysis probe and system |
US6731122B2 (en) | 2001-08-14 | 2004-05-04 | International Business Machines Corporation | Wafer test apparatus including optical elements and method of using the test apparatus |
FR2894339A1 (en) * | 2005-12-05 | 2007-06-08 | St Microelectronics Sa | PROBE CARD FOR PHOTOSENSITIVE CHIP TESTS AND CORRESPONDING ILLUMINATION DEVICE. |
JP2008283089A (en) * | 2007-05-14 | 2008-11-20 | Denso Corp | Inspecting apparatus |
KR20220089618A (en) | 2020-12-21 | 2022-06-28 | 가부시키가이샤 니혼 마이크로닉스 | Measurement system |
KR20220127827A (en) | 2020-01-14 | 2022-09-20 | 가부시키가이샤 니혼 마이크로닉스 | Optical probes, probe cards, measuring systems and measuring methods |
US11624679B2 (en) | 2019-10-04 | 2023-04-11 | Kabushiki Kaisha Nihon Micronics | Optical probe, optical probe array, test system and test method |
US11971431B2 (en) | 2020-05-20 | 2024-04-30 | Kabushiki Kaisha Nihon Micronics | Optical probe, optical probe array, optical probe card, and method of manufacturing optical probe |
US12031921B2 (en) | 2019-11-18 | 2024-07-09 | Kabushiki Kaisha Nihon Micronics | Measurement system |
-
1985
- 1985-08-02 JP JP60171512A patent/JPS6231136A/en active Pending
Cited By (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01158489A (en) * | 1987-09-02 | 1989-06-21 | Tokyo Electron Ltd | Electric characteristics testing method by prober |
JPH02302082A (en) * | 1989-05-16 | 1990-12-14 | Nec Corp | Manufacture of light emitting diode |
US6657446B1 (en) * | 1999-09-30 | 2003-12-02 | Advanced Micro Devices, Inc. | Picosecond imaging circuit analysis probe and system |
US6731122B2 (en) | 2001-08-14 | 2004-05-04 | International Business Machines Corporation | Wafer test apparatus including optical elements and method of using the test apparatus |
US7012440B2 (en) | 2001-08-14 | 2006-03-14 | International Business Machines Corporation | Wafer test apparatus including optical elements and method of using the test apparatus |
US7250778B2 (en) | 2001-08-14 | 2007-07-31 | International Business Machines Corporation | Wafer test apparatus including optical elements and method of using the test apparatus |
JP2003273178A (en) * | 2002-01-29 | 2003-09-26 | Hewlett Packard Co <Hp> | Interconnect structure |
US7642792B2 (en) | 2005-12-05 | 2010-01-05 | Stmicroelectronics S.A. | Probe card for tests on photosensitive chips and corresponding illumination device |
FR2894339A1 (en) * | 2005-12-05 | 2007-06-08 | St Microelectronics Sa | PROBE CARD FOR PHOTOSENSITIVE CHIP TESTS AND CORRESPONDING ILLUMINATION DEVICE. |
JP2008283089A (en) * | 2007-05-14 | 2008-11-20 | Denso Corp | Inspecting apparatus |
US11624679B2 (en) | 2019-10-04 | 2023-04-11 | Kabushiki Kaisha Nihon Micronics | Optical probe, optical probe array, test system and test method |
US12031921B2 (en) | 2019-11-18 | 2024-07-09 | Kabushiki Kaisha Nihon Micronics | Measurement system |
KR20220127827A (en) | 2020-01-14 | 2022-09-20 | 가부시키가이샤 니혼 마이크로닉스 | Optical probes, probe cards, measuring systems and measuring methods |
DE112020006529T5 (en) | 2020-01-14 | 2022-11-03 | Kabushiki Kaisha Nihon Micronics | OPTICAL PROBE, TEST CARD, MEASUREMENT SYSTEM AND MEASUREMENT METHOD |
US11971431B2 (en) | 2020-05-20 | 2024-04-30 | Kabushiki Kaisha Nihon Micronics | Optical probe, optical probe array, optical probe card, and method of manufacturing optical probe |
KR20220089618A (en) | 2020-12-21 | 2022-06-28 | 가부시키가이샤 니혼 마이크로닉스 | Measurement system |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US6843608B2 (en) | Transparent substrate and hinged optical assembly | |
JP2752056B2 (en) | Apparatus for matching an array of optoelectronic devices with an array of optical fibers | |
US7366380B1 (en) | PLC for connecting optical fibers to optical or optoelectronic devices | |
CN110998341B (en) | Contact module for contacting an optoelectronic chip, which is insensitive to positional tolerances | |
US9040896B2 (en) | Optoelectronic-device wafer probe and method therefor | |
JPH0315807A (en) | Manufacture of optical assembly | |
JPH05313049A (en) | Optical interconnection gauge | |
JPS6231136A (en) | Device for evaluating photosemiconductor element | |
KR102517249B1 (en) | Compact opto-electric probe | |
US20220252806A1 (en) | Assembly of 2-Dimensional Matrix of Optical Transmitter or Receiver Based On Wet Etched Silicon Interposer | |
CN112612082B (en) | Optical probe, optical probe array, inspection system, and inspection method | |
CN111566532A (en) | Surface mount package for single mode electro-optic modules | |
US11435392B2 (en) | Inspection method and inspection system | |
JP2566364B2 (en) | Method for manufacturing optoelectronic device | |
US6555841B1 (en) | Testable substrate and a testing method | |
US6493077B1 (en) | Optical test probe for silicon optical bench | |
US6057918A (en) | Laser testing probe | |
Bardalen et al. | Bipolar photodiode module operated at 4 K | |
US6646887B2 (en) | Removable mechanical attachment system for electronic assemblies | |
EP1365268B1 (en) | Butt joined opto-electronic assembly having a dielectric stand-off substrate with a coplanar electrical transmission structure formed thereon | |
US6726377B2 (en) | Butt joined electrical apparatus and module | |
WO2023243019A1 (en) | Optical semiconductor integrated circuit | |
WO2024023969A1 (en) | Pattern for inspection and integrated semiconductor circuit equipped therewith | |
US6722795B2 (en) | Butt joined opto-electrical apparatus and module | |
MIKES | Bipolar photodiode module operated at 4 K |