JPS6230487U - - Google Patents
Info
- Publication number
- JPS6230487U JPS6230487U JP12083585U JP12083585U JPS6230487U JP S6230487 U JPS6230487 U JP S6230487U JP 12083585 U JP12083585 U JP 12083585U JP 12083585 U JP12083585 U JP 12083585U JP S6230487 U JPS6230487 U JP S6230487U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- signal
- chroma
- multiplication
- multiplication circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000000926 separation method Methods 0.000 claims description 4
- 239000002131 composite material Substances 0.000 claims 1
- 239000000758 substrate Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Processing Of Color Television Signals (AREA)
Description
第１図はこの考案のデジタルビデオ信号のレベ
ル調整回路のブロツク図、第２図はアナログ回路
で形成されているビデオ信号のレベル調整回路ブ
ロツク図である。
図中、１は第１の掛算回路、２はＹ／Ｃ分離回
路、３は第２の掛算回路、４は加算回路を示す。
FIG. 1 is a block diagram of a digital video signal level adjustment circuit of this invention, and FIG. 2 is a block diagram of a video signal level adjustment circuit formed of analog circuits. In the figure, 1 is a first multiplication circuit, 2 is a Y/C separation circuit, 3 is a second multiplication circuit, and 4 is an addition circuit.
Claims (1)
信号と、ビデオゲインコントロール信号が入力さ
れている第１の掛算回路と、前記第１の掛算回路
の出力側に接続されているＹ／Ｃ分離回路と、前
記Ｙ／Ｃ分離回路により分離されたクロマ信号と
クロマゲインコントロール信号が入力されている
第２の掛算回路と、前記Ｙ／Ｃ分離回路により分
離されたクロマ信号と、前記第２の掛算回路の出
力を加算する加算回路からなり、前記各回路がゲ
ートアレーＩＣ基板で形成されていることを特徴
とするデイジタルビデオ信号のレベル調整回路。 a first multiplication circuit into which a composite video signal converted into a digital signal and a video gain control signal are input; a Y/C separation circuit connected to the output side of the first multiplication circuit; a second multiplication circuit into which the chroma signal separated by the Y/C separation circuit and the chroma gain control signal are input; the chroma signal separated by the Y/C separation circuit; and the output of the second multiplication circuit. 1. A level adjustment circuit for a digital video signal, comprising an adder circuit for adding , each of said circuits being formed of a gate array IC substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12083585U JPH0346629Y2 (en) | 1985-08-08 | 1985-08-08 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12083585U JPH0346629Y2 (en) | 1985-08-08 | 1985-08-08 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6230487U true JPS6230487U (en) | 1987-02-24 |
| JPH0346629Y2 JPH0346629Y2 (en) | 1991-10-02 |
Family
ID=31009527
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12083585U Expired JPH0346629Y2 (en) | 1985-08-08 | 1985-08-08 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0346629Y2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6452922U (en) * | 1987-09-30 | 1989-03-31 |
-
1985
- 1985-08-08 JP JP12083585U patent/JPH0346629Y2/ja not_active Expired
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6452922U (en) * | 1987-09-30 | 1989-03-31 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0346629Y2 (en) | 1991-10-02 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS6230487U (en) | ||
| JPS6326122U (en) | ||
| JPS61168715U (en) | ||
| JPS61103969U (en) | ||
| JPS61121100U (en) | ||
| JPS60192582U (en) | Luminance signal extraction circuit | |
| JPS62132457U (en) | ||
| JPS61134125U (en) | ||
| JPS6387918U (en) | ||
| JPS6323885U (en) | ||
| JPS61124095U (en) | ||
| JPH0397239U (en) | ||
| JPS6271966U (en) | ||
| JPS63133782U (en) | ||
| JPH01107226U (en) | ||
| JPS6195129U (en) | ||
| JPS5890780U (en) | PAL color television receiver circuit | |
| JPS6380602U (en) | ||
| JPS6344600U (en) | ||
| JPS6395382U (en) | ||
| JPS6271982U (en) | ||
| JPH021927U (en) | ||
| JPH01142224U (en) | ||
| JPS6415179U (en) | ||
| JPS61197778U (en) |