JPS62299109A - Oscillation circuit - Google Patents

Oscillation circuit

Info

Publication number
JPS62299109A
JPS62299109A JP61142090A JP14209086A JPS62299109A JP S62299109 A JPS62299109 A JP S62299109A JP 61142090 A JP61142090 A JP 61142090A JP 14209086 A JP14209086 A JP 14209086A JP S62299109 A JPS62299109 A JP S62299109A
Authority
JP
Japan
Prior art keywords
temperature
resistors
reference voltage
resistor
room temperature
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP61142090A
Other languages
Japanese (ja)
Other versions
JPH0810816B2 (en
Inventor
Hiroyuki Ban
博行 伴
Takuya Harada
卓哉 原田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Denso Corp
Original Assignee
NipponDenso Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NipponDenso Co Ltd filed Critical NipponDenso Co Ltd
Priority to JP61142090A priority Critical patent/JPH0810816B2/en
Publication of JPS62299109A publication Critical patent/JPS62299109A/en
Publication of JPH0810816B2 publication Critical patent/JPH0810816B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Abstract

PURPOSE:To attain the temperature correction by a component itself of the oscillation circuit by making each resistance-temperature characteristic of the 2nd resistor whose one terminal is connected to an output stage of a CMOS inverter and of the 1st resistor dividing a reference voltage different from each other in a relation to cancel the temperature-frequency characteristic of the oscillator circuit itself. CONSTITUTION:Since resistors 11, 12 are P<+> resistors and a resistor 13 is a P<-> resistor, the rate of fluctuation of the resistor 13 with respect to temperature is larger than that of the resistors 11, 12. Thus, an H level reference voltage at a high temperature is lower than that at room temperature, an L level reference voltage is higher than that at room temperature, conversely an H level reference voltage at a low temperature is higher than that at room temperature and the L level reference voltage is lower than that at room temperature. The difference between the H and L level reference voltages at a high temperature is smaller than that at room temperature and the difference at low temperature is larger than that at room temperature. Thus, the charge/discharge time at each period is shorter at high temperature than that at room temperature and longer at low temperature and the oscillated frequency fos is faster at high temperature and slower at low temperature.

Description

【発明の詳細な説明】 3、発明の詳細な説明 〔産業上の利用分野〕 本発明の温度補正機能を備えた発振回路で、特にCR型
の発振回路に適用され、この発振回路をIC化した際、
温度補正用の外付は素子やそのための専用端子を不要に
できるものである。
[Detailed Description of the Invention] 3. Detailed Description of the Invention [Field of Industrial Application] The oscillation circuit with a temperature correction function of the present invention is particularly applied to a CR type oscillation circuit, and this oscillation circuit can be integrated into an IC. When I did,
External attachment for temperature correction eliminates the need for an element or a dedicated terminal for it.

〔従来の技術〕[Conventional technology]

発振回路を使用するシステムにおいては、発振周波数を
基準として各種制御を行う。そのため、発振周波数の高
精度化が要求される。このような場合、発振用素子とし
て水晶発振子やセラミック発振子が使用される。しかし
、これらの素子はコストが高いという欠点がある。しか
も、自動車用システムにおいては−40〜+100”C
の温度範囲において安定動作が要求されるが、信頼性に
おいて不安な面がある。従って、安価なシステムが要求
される場合には、抵抗、コンデンサを用いたC−R発振
回路が使われる。
In a system using an oscillation circuit, various controls are performed based on the oscillation frequency. Therefore, higher precision of the oscillation frequency is required. In such cases, a crystal oscillator or a ceramic oscillator is used as the oscillation element. However, these devices have the disadvantage of high cost. Moreover, in automotive systems -40 to +10"C
Although stable operation is required in the temperature range of Therefore, when an inexpensive system is required, a C-R oscillation circuit using resistors and capacitors is used.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

この回路の欠点は、室温時の発振周波数精度が少々悪い
という点と温度特性を持つという点である。室温時の発
振周波数は外付素子の調整で対応可能である。温度によ
る発振周波数の変動は通常温度の上昇と共に低下するよ
うな特性をもち、これは、内部回路の温度特性によるも
のが大きく、対策には外付素子・回路の追加変更が要求
されコスト・アンプとなる。
The disadvantages of this circuit are that the oscillation frequency accuracy at room temperature is somewhat poor and that it has temperature characteristics. The oscillation frequency at room temperature can be adjusted by adjusting external elements. Fluctuations in oscillation frequency due to temperature usually decrease as the temperature rises, and this is largely due to the temperature characteristics of the internal circuit, and countermeasures require additional changes to external elements and circuits, increasing costs and amplifiers. becomes.

本発明は、上記点に鑑み、温度補正用の外付は素子やそ
のための専用端子を不要にでき、しかも発振周波数の温
度特性を十分低減できるCR型の発振回路を堤供するこ
とを目的とする。
In view of the above points, it is an object of the present invention to provide a CR-type oscillation circuit that can eliminate the need for an external element for temperature correction or a dedicated terminal for it, and can sufficiently reduce the temperature characteristics of the oscillation frequency. .

〔問題点を解決するための手段〕[Means for solving problems]

そこで、本発明は、充放電用CR回路、第1、第2の基
準電圧を形成する基準電圧回路、このCR回路の充放電
電圧を第1、第2の基準電圧の一方と比較動作するコン
パレータ、及びこのコンパレータの出力に応じて前記第
1、第2の基準電圧の他方に切換えるCMOS型のイン
バータとを含む発振回路であって、 前記基準電圧回路は、定電圧源に直列接続された複数の
第1の抵抗及びこの第1の抵抗の中間部位と前記CMO
S型インバータの出力段とに接続された第2の抵抗とを
含み、前記第1、第2の抵抗は各々抵抗一温度特性が異
なるように選定されていることを特徴とする。
Therefore, the present invention provides a charging and discharging CR circuit, a reference voltage circuit that forms first and second reference voltages, and a comparator that operates by comparing the charging and discharging voltage of this CR circuit with one of the first and second reference voltages. , and a CMOS type inverter that switches to the other of the first and second reference voltages according to the output of the comparator, the reference voltage circuit comprising a plurality of reference voltage circuits connected in series to a constant voltage source. a first resistor and an intermediate portion of the first resistor and the CMO
and a second resistor connected to the output stage of the S-type inverter, and the first and second resistors are selected to have different resistance-temperature characteristics.

〔実施例〕〔Example〕

次に本発明の実施例について説明する。第1図において
AはIC化された素子側を示し、外部接続用の端子S1
、S2を有している。IC化素子側において発振用コン
パレータlの基準電圧を決める抵抗11.12.13の
うち、11.12をP°拡散抵抗で、13をP−拡散抵
抗で構成する。
Next, examples of the present invention will be described. In FIG. 1, A indicates the IC device side, and terminal S1 for external connection.
, S2. Of the resistors 11, 12, and 13 that determine the reference voltage of the oscillation comparator l on the IC element side, 11 and 12 are P° diffused resistors, and 13 is a P- diffused resistor.

各々の抵抗の抵抗値は所望の値となるようにする。The resistance value of each resistor is set to a desired value.

(例えばR1=R,=50にΩ、Rz=25にΩ)。(For example, R1 = R, = 50 = Ω, Rz = 25 = Ω).

CMOS型のインバータ3のPチャンネルMOSトラン
ジスタ3AのON l[抗をR4、そのnチャンネルM
O3)ランジスタ3BのON抵抗をR3とする。Ra、
Rsの値は、基準電圧形成用の抵抗11〜13の抵抗値
R8〜R3の値より十分小さくしておく (例えば0.
25 kΩ以下)。充放電用のCR回路をなす抵抗10
.コンデンサ2oは外付けとする。なおり0゜は定電圧
源を示ず。
The ON l of the P-channel MOS transistor 3A of the CMOS type inverter 3 is R4, and its n-channel M
O3) Let R3 be the ON resistance of transistor 3B. Ra,
The value of Rs should be made sufficiently smaller than the resistance values R8 to R3 of the reference voltage forming resistors 11 to 13 (for example, 0.
(25 kΩ or less). Resistor 10 forming a CR circuit for charging and discharging
.. Capacitor 2o is externally attached. Note that 0° does not indicate a constant voltage source.

P°拡散抵抗11.12とP−拡散抵抗13とは拡散抵
抗濃度が異なる。一般に、P−抵抗の方がP゛抵抗り拡
散濃度が低く (シート抵抗値は高い)、抵抗値の温度
変化率はP−抵抗の方が大きい(第6図参照)。
The P° diffused resistor 11, 12 and the P- diffused resistor 13 have different diffused resistance concentrations. In general, the P-resistance has a lower P-resistance diffusion concentration (the sheet resistance value is higher), and the rate of change in resistance value with temperature is greater in the P-resistance (see Figure 6).

インバータ3の両トランジスタ3A、3Bはどちらも温
度上昇に対してON抵抗が高くなるが、室温時からの変
化率は一40〜150℃の温度範囲において、数10%
程度であるため、初期値が十分小さければ誤差の範囲と
なる。
The ON resistance of both transistors 3A and 3B of the inverter 3 increases as the temperature rises, but the rate of change from room temperature is several tens of percent in the temperature range of -40 to 150 degrees Celsius.
Therefore, if the initial value is small enough, it will be within the error range.

外付けとした抵抗10、および、コンデンサ20の素子
値の温度特性は、素子を選択することにより十分小さく
でき、この場合便宜上無視できるものとする。
The temperature characteristics of the element values of the external resistor 10 and capacitor 20 can be made sufficiently small by selecting the elements, and in this case can be ignored for convenience.

そこで発振用コンパレータ1の(+)大ノコ(非反転入
力)側の基準電圧は次のようになる。
Therefore, the reference voltage on the (+) large saw (non-inverting input) side of the oscillation comparator 1 is as follows.

(i)コンパレータlの出力Hレベル(つまり高電圧出
力)時・・・・・・Hレベル基準電圧発生時インバータ
3の出力はHレベルであり、その時、インバータ3のト
ランジスタ3AがONL、トランジスタ3BがOFFす
る。従って、コンパレータ1の(+)入力に入るa点の
電位Valは、第2図に示した等価回路で示される。即
ち、Va。
(i) When the output of comparator l is at H level (that is, high voltage output)...When the H level reference voltage is generated, the output of inverter 3 is at H level, and at that time, transistor 3A of inverter 3 is ONL, transistor 3B turns off. Therefore, the potential Val at point a, which enters the (+) input of comparator 1, is represented by the equivalent circuit shown in FIG. That is, Va.

=R,・VDn/ (Rz +R1(R3+Ra )/
(R1+R3+R4) )となる。
=R,・VDn/ (Rz +R1(R3+Ra)/
(R1+R3+R4)).

(11)コンパレータ1の出力Lレベル(つまり低電位
出力)時・・・・・・Lレベル基準電圧発生時インバー
タ3出力はLレベルであり、その時、トランジスタ3A
はOFF、3BはONする。従って、コンパレータ1の
(+)入力に入るa点の電位■a2は、第3図に示した
等価回路で示される。即ち、Va2 = (Rz  (
R3+Rs )  ・Vo。
(11) When the output of comparator 1 is at L level (that is, low potential output)... When the L level reference voltage is generated, the output of inverter 3 is at L level, and at that time, transistor 3A
is OFF, and 3B is ON. Therefore, the potential ■a2 at point a, which enters the (+) input of the comparator 1, is represented by the equivalent circuit shown in FIG. That is, Va2 = (Rz (
R3+Rs) ・Vo.

/ (Rz ”R3+Rs ) l / (R+ +R
2(R3十R5)/ (R2+R3+R5)lとなる。
/ (Rz ”R3+Rs) l / (R+ +R
2(R30R5)/(R2+R3+R5)l.

ここで、R3−R3はインバータ3の各トランジスタ3
A、3BのON抵抗値R=、Rsに比べて十分大きいた
め、R4、Rsによる影響は小さくできる。例えばR,
=R3=50にΩ、R,=25にΩ、R4、Rs ≦0
.25にΩとすると、R4、R3の寄与率は1%以下と
なる。
Here, R3-R3 is each transistor 3 of the inverter 3.
Since the ON resistance values R= and Rs of A and 3B are sufficiently large compared to each other, the influence of R4 and Rs can be reduced. For example, R,
=R3=50Ω, R,=25Ω, R4, Rs ≦0
.. If Ω is set to 25, the contribution rate of R4 and R3 will be 1% or less.

発振周波数f。Sの、温度による変動が発生する要因と
しては、以下のものがあげられる。
Oscillation frequency f. Factors that cause temperature-related fluctuations in S include the following.

(1)コンパレータlの動作スピード(出力反転時)一
般的に、温度上昇と共に動作スピードは遅くなる。回路
内の定電流が負の温度係数をもつものが一般的で、これ
が動作スピードが変動する大きな原因となる。また、回
路内のトランジスタスイッチングスピードは、温度上昇
とともに低下する。
(1) Operating speed of comparator I (when output is inverted) Generally, the operating speed decreases as the temperature rises. The constant current in the circuit generally has a negative temperature coefficient, and this is a major cause of fluctuations in operating speed. Also, the transistor switching speed within the circuit decreases with increasing temperature.

これは、周知の如く、MoSトランジスタのスレッショ
ルド電圧■7、易動度μの温度特性によってきまる。
As is well known, this is determined by the temperature characteristics of the threshold voltage (7) and the mobility μ of the MoS transistor.

(2)インバータ2.3の動作スピード(出力反転時) 上記で説明した如く、トランジスタのスイッチングスピ
ードが温度上昇とともに低下する。そのため、コンパレ
ータ1と同じく、出力反転時(L−II及びH−L)の
動作スピードが温度上昇とともに低下する。反対に、温
度低下時に速くなる。
(2) Operating speed of inverter 2.3 (when output is inverted) As explained above, the switching speed of the transistor decreases as the temperature rises. Therefore, like the comparator 1, the operating speed during output inversion (L-II and HL) decreases as the temperature rises. On the contrary, it becomes faster when the temperature decreases.

(3)抵抗値R1〜R3の絶対値変動による浮遊容量(
配線容量、接合容量等による)に対する動作スピード 拡散抵抗11〜13の抵抗値は正の温度係数を持ってい
るため、温度上昇とともに抵抗値が高くなる。従って、
浮遊容量があるため、抵抗13への電圧印加時の基準電
圧レベルの切替スピードが温度上昇とともに低下する。
(3) Stray capacitance due to absolute value fluctuations of resistance values R1 to R3 (
Since the resistance value of the operating speed diffused resistors 11 to 13 has a positive temperature coefficient with respect to the wiring capacitance, junction capacitance, etc., the resistance value increases as the temperature rises. Therefore,
Due to the stray capacitance, the switching speed of the reference voltage level when voltage is applied to the resistor 13 decreases as the temperature rises.

抵抗11〜13が同じ種類の抵抗で構成されている場合
、抵抗の温度変化率はほぼ同じであるため、コンパレー
タ1に入力されるHレベル、Lレベル基準電圧はほとん
ど変動しない。コンパレータ1の入力オフ・セット電圧
は発振の一周期間で安定していれば相殺されるため、影
響は非常に小さい。
When the resistors 11 to 13 are composed of the same type of resistors, the temperature change rate of the resistors is almost the same, so the H level and L level reference voltages input to the comparator 1 hardly change. If the input offset voltage of comparator 1 is stable during one cycle of oscillation, it will be canceled out, so the influence is very small.

以上より、抵抗11〜13が同じ種類の抵抗で構成され
ていれば、前記(11〜(3)より、発振周波数f a
sは温度変動に対して大きく変動し、その室温からの発
振周波数の変動Δ「。5は、第5図のように示される。
From the above, if the resistors 11 to 13 are composed of the same type of resistors, from the above (11 to (3)), the oscillation frequency fa
s fluctuates greatly with respect to temperature fluctuations, and the fluctuation of the oscillation frequency from room temperature Δ".5 is shown in FIG.

つまり、高温側で減少方向へ、低温側で増加方向となる
In other words, it decreases on the high temperature side and increases on the low temperature side.

一方、本実施例では抵抗11.12がP°低抵抗13が
P−抵抗であるため、抵抗13の温度に対する変動率が
、抵抗11.12のそれより大きい。
On the other hand, in this embodiment, since the resistors 11.12 and 13 are P-resistances, the rate of variation with respect to temperature of the resistors 13 is larger than that of the resistors 11.12.

従って、高温側では、Hレベル基準電圧は室温時のそれ
より低く、Lレベル基準電圧は室温時のそれより高くな
る。逆に、低温側では、Hレベル基準電圧は室温時のそ
れより高く、Lレベル基準電圧は室温時のそれより低(
なる。
Therefore, on the high temperature side, the H level reference voltage is lower than that at room temperature, and the L level reference voltage is higher than that at room temperature. Conversely, on the low temperature side, the H level reference voltage is higher than that at room temperature, and the L level reference voltage is lower than that at room temperature (
Become.

発振用コンデンサ20の充放電電圧波形(b点の電圧波
形)は、第4図で示した如(、l(レベルとLレベル基
準電圧間を変動する。実際には、コンパレーク1の入力
オフセット電圧が各11、LL/ヘル基準電圧にかさ上
げされるが、これは相殺される。
As shown in FIG. are raised to the LL/Hel reference voltage, each 11, but this cancels out.

本実施例では、高温側でHレベルとLレベル基準電圧と
の差が室温時のそれより小さくなる。低温側ではその逆
となる。
In this embodiment, the difference between the H level and L level reference voltages on the high temperature side is smaller than that at room temperature. On the low temperature side, the opposite is true.

従って、各周期における充放電時間は、室温時に比べて
高温側で短(、低温側で長くなる方向に作用する。即ち
、発振周波数f asは高温側で速く、低温側で遅くな
る方向に作用する。
Therefore, the charging/discharging time in each cycle is shorter on the high temperature side (and longer on the lower temperature side) compared to room temperature. In other words, the oscillation frequency f as is faster on the higher temperature side and slower on the lower temperature side. do.

故に、前記(11〜(3)で示した温度特性に対応させ
て、抵抗11〜13の種類及び抵抗値を決定すれば、所
望の発振周波数の温度特性を得ることができる。
Therefore, if the types and resistance values of the resistors 11 to 13 are determined in accordance with the temperature characteristics shown in (11 to (3)) above, the desired temperature characteristics of the oscillation frequency can be obtained.

次に抵抗11〜13の他の構成例を以下に示す。Next, other configuration examples of the resistors 11 to 13 will be shown below.

+11 11.127N”抵抗、13:P”抵抗(21
11,12:ポリシリコンを氏抗、llr”を氏抗 +3111.12:ポリシリコン抵抗、13:N”抵抗 +4111.12:ポリシリコン抵抗、13:P−抵抗 (fi)11.12:N”抵抗、13:P−抵抗上記の
各抵抗及び、第1の実施例の各抵抗は、拡散抵抗でもイ
オン打込による抵抗でもよい。
+11 11.127N” resistance, 13:P” resistance (21
11, 12: Polysilicon resistance, llr” resistance + 3111.12: Polysilicon resistance, 13: N” resistance + 4111.12: Polysilicon resistance, 13: P-resistance (fi) 11.12: N” Resistance, 13: P-resistance Each of the above-mentioned resistances and each resistance of the first embodiment may be a diffused resistance or a resistance formed by ion implantation.

また、上記の抵抗構成は、発振周波数を高温側で速くさ
せる方向であるが、抵抗の組合わせを逆にすることによ
り、高温側でより遅くさせることもできる。
Further, although the above-described resistor configuration is designed to make the oscillation frequency faster on the high temperature side, it is also possible to make the oscillation frequency slower on the high temperature side by reversing the combination of resistors.

また、発振用抵抗IO、コンデンサ20は各々、または
、両方共tC内蔵としてもよい、また、1O120に温
度特性があってもよい。
Further, each or both of the oscillation resistor IO and the capacitor 20 may have a built-in tC, or 1O120 may have a temperature characteristic.

また、コンパレータ1の(+) 、(−)M重入力は逆
転してもよい。但し、その時には論理(動作)を合わせ
るため、コンパレータ出力にインバータを追加するか削
減するかすればよい。
Further, the (+) and (-) M multiple inputs of the comparator 1 may be reversed. However, in that case, in order to match the logic (operation), an inverter may be added or removed from the comparator output.

また、インバータ2.3についても迫力口、削減等は構
わない(論理があっていればよい)。遅延回路等を設け
てもよい。また、コンパレータ1は、オペアンプ、また
は、シュミット・トリガー回路で置き替えてもよい。
Also, for the inverter 2.3, it is acceptable to use a powerful opening, reduction, etc. (as long as there is logic). A delay circuit or the like may be provided. Further, the comparator 1 may be replaced with an operational amplifier or a Schmitt trigger circuit.

また、インバータ3の電流容量(トランジスタサイズ)
は目的に応じて任意に設定すればよい。
Also, the current capacity (transistor size) of inverter 3
may be set arbitrarily depending on the purpose.

また、これをスイッチ回路(アナログスイッチ等)で置
き替えてもよい。
Further, this may be replaced with a switch circuit (analog switch, etc.).

また、基準電圧源の(+)、(−)はICの電源から発
生させた別電位のものであってもよい。
Further, (+) and (-) of the reference voltage source may be of different potentials generated from the power supply of the IC.

また、別電源からもってきてもよい。コンデンサ20の
(−)(この場合接地電位)電源も同様である。
Alternatively, it may be obtained from a separate power source. The same applies to the (-) (ground potential in this case) power supply of the capacitor 20.

また、抵抗11−13は各々各1本でなく、複数本を直
列、または、並列で構成してもよい。その際、温度特性
の異なる抵抗を組みあわせてもよい。
Moreover, each of the resistors 11-13 may be configured with a plurality of resistors in series or in parallel instead of one each. In this case, resistors having different temperature characteristics may be combined.

また、発振周波数は、必要に応じて回路の任意の部分(
発振動作をしている部分)から取り出す事が出来る。
Also, the oscillation frequency can be changed to any part of the circuit (
It can be extracted from the part that is oscillating.

以上、2端子発振回路で説明してきたが、第7図に示し
た如く、l端子発振回路にも適用できる。
Although the above explanation has been made using a two-terminal oscillation circuit, the present invention can also be applied to an l-terminal oscillation circuit as shown in FIG.

その際、前述の種々の例も全てあてはめることが出来る
。なお、5はコンデンサ20の放電用NチャンネルMO
Sトランジスタである。
In this case, all the various examples mentioned above can also be applied. In addition, 5 is an N-channel MO for discharging the capacitor 20.
It is an S transistor.

〔発明の効果〕〔Effect of the invention〕

以上述べた如く、本発明では基準電圧を分圧形成する第
1の抵抗及びCMOS型インバータの出力段に一端が接
続された第2の抵抗の各々の抵抗一温度特性を異ならせ
、発振回路自体の温度−周波数特性を相殺する関係に設
定してお(ことによって、発振回路の構成素子自体にて
温度補正が可能となり、温度補正用の外付は素子やその
ための専用端子を不要にできる。
As described above, in the present invention, the resistance-temperature characteristics of the first resistor that divides the reference voltage and the second resistor whose one end is connected to the output stage of the CMOS inverter are made different, and the oscillation circuit itself The temperature-frequency characteristics of the oscillation circuit are set in a relationship that cancels each other out (thereby, the temperature can be corrected in the constituent elements of the oscillation circuit itself, and an external element for temperature correction or a dedicated terminal for it can be eliminated.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例を示す回路図、第2図乃至第
6図は本発明の作動説明に用いるための図、第7図は本
発明の他の実施例を示す回路図である。 l・・・コンパレータ、2.3・・・0MO8型インバ
ータ、11.12・・・P゛抵抗13・・・P゛抵抗I
O・・・発振用外付抵抗、20・・・発眼用外付コンデ
ンサ。 代理人弁理士 岡 部    隆 20  噴裔i用外付コ)デ)す Vo e・ アラス(÷)電瑞、電五 ↑os、梵キV睨tL数 第2図 (+)
FIG. 1 is a circuit diagram showing one embodiment of the present invention, FIGS. 2 to 6 are diagrams used to explain the operation of the present invention, and FIG. 7 is a circuit diagram showing another embodiment of the present invention. be. l...Comparator, 2.3...0MO8 type inverter, 11.12...P'resistance 13...P'resistor I
O: External resistor for oscillation, 20: External capacitor for eye development. Representative Patent Attorney Takashi Okabe 20 Voe i external attachment code) de)suVo e aras (÷) Denzui, Dengo↑os, BonkiVglaretL number Fig. 2 (+)

Claims (1)

【特許請求の範囲】[Claims]  充放電用CR回路、第1、第2の基準電圧を形成する
基準電圧回路、このCR回路の充放電電圧を第1、第2
の基準電圧の一方と比較動作するコンパレータ、及びこ
のコンパレータの出力に応じて前記第1、第2の基準電
圧の他方に切換えるCMOS型のインバータとを含む発
振回路であって、前記基準電圧回路は、定電圧源に直列
接続された複数の第1の抵抗及びこの第1の抵抗の中間
部位と前記CMOS型インバータの出力段とに接続され
た第2の抵抗とを含み、前記第1、第2の抵抗は各々抵
抗一温度特性が異なるように選定されていることを特徴
とする発振回路。
A charging and discharging CR circuit, a reference voltage circuit that forms first and second reference voltages, and a charging and discharging voltage of this CR circuit that forms the first and second reference voltages.
An oscillation circuit comprising: a comparator that performs a comparison operation with one of the reference voltages; and a CMOS inverter that switches to the other of the first and second reference voltages in accordance with the output of the comparator, the reference voltage circuit comprising: , a plurality of first resistors connected in series to a constant voltage source, and a second resistor connected to an intermediate portion of the first resistors and an output stage of the CMOS type inverter; An oscillation circuit characterized in that the two resistors are selected to have different resistance-temperature characteristics.
JP61142090A 1986-06-18 1986-06-18 Oscillator circuit Expired - Lifetime JPH0810816B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61142090A JPH0810816B2 (en) 1986-06-18 1986-06-18 Oscillator circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61142090A JPH0810816B2 (en) 1986-06-18 1986-06-18 Oscillator circuit

Publications (2)

Publication Number Publication Date
JPS62299109A true JPS62299109A (en) 1987-12-26
JPH0810816B2 JPH0810816B2 (en) 1996-01-31

Family

ID=15307195

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61142090A Expired - Lifetime JPH0810816B2 (en) 1986-06-18 1986-06-18 Oscillator circuit

Country Status (1)

Country Link
JP (1) JPH0810816B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2013099121A1 (en) * 2011-12-28 2013-07-04 株式会社デンソー Cr oscillation circuit
DE10348364B4 (en) * 2002-10-21 2014-05-15 Denso Corporation Oscillator circuit with stable frequency
JP2017092812A (en) * 2015-11-13 2017-05-25 富士電機株式会社 Semiconductor integrated circuit

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103255575B (en) * 2013-05-28 2014-12-24 许苏平 Bead yarn machine
KR20190064893A (en) * 2017-12-01 2019-06-11 에스케이하이닉스 주식회사 Digital temperature sensing circuit

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5111352A (en) * 1974-06-14 1976-01-29 Westinghouse Electric Corp

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5111352A (en) * 1974-06-14 1976-01-29 Westinghouse Electric Corp

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10348364B4 (en) * 2002-10-21 2014-05-15 Denso Corporation Oscillator circuit with stable frequency
WO2013099121A1 (en) * 2011-12-28 2013-07-04 株式会社デンソー Cr oscillation circuit
JP2013153407A (en) * 2011-12-28 2013-08-08 Denso Corp Cr oscillation circuit
US9209814B2 (en) 2011-12-28 2015-12-08 Denso Corporation CR oscillation circuit
JP2017092812A (en) * 2015-11-13 2017-05-25 富士電機株式会社 Semiconductor integrated circuit

Also Published As

Publication number Publication date
JPH0810816B2 (en) 1996-01-31

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