JPS62296579A - Cleavage of semiconductor substrate - Google Patents
Cleavage of semiconductor substrateInfo
- Publication number
- JPS62296579A JPS62296579A JP61140682A JP14068286A JPS62296579A JP S62296579 A JPS62296579 A JP S62296579A JP 61140682 A JP61140682 A JP 61140682A JP 14068286 A JP14068286 A JP 14068286A JP S62296579 A JPS62296579 A JP S62296579A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- semiconductor substrate
- cleavage
- sheet
- edge
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 31
- 239000000758 substrate Substances 0.000 title claims abstract description 31
- 238000003776 cleavage reaction Methods 0.000 title claims abstract description 12
- 230000007017 scission Effects 0.000 title claims abstract description 12
- 238000000034 method Methods 0.000 claims description 18
- 239000000853 adhesive Substances 0.000 claims description 3
- 230000001070 adhesive effect Effects 0.000 claims description 3
- 229910003460 diamond Inorganic materials 0.000 abstract description 4
- 239000010432 diamond Substances 0.000 abstract description 4
- BZHJMEDXRYGGRV-UHFFFAOYSA-N Vinyl chloride Chemical group ClC=C BZHJMEDXRYGGRV-UHFFFAOYSA-N 0.000 abstract description 3
- 229920000728 polyester Polymers 0.000 abstract description 2
- 239000004820 Pressure-sensitive adhesive Substances 0.000 abstract 1
- 230000002093 peripheral effect Effects 0.000 abstract 1
- 238000007796 conventional method Methods 0.000 description 5
- 239000013078 crystal Substances 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 4
- 238000005253 cladding Methods 0.000 description 2
- 238000009826 distribution Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 229910000530 Gallium indium arsenide Inorganic materials 0.000 description 1
- -1 Polyethylene Polymers 0.000 description 1
- 239000004698 Polyethylene Substances 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000007791 liquid phase Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229920000573 polyethylene Polymers 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 231100000241 scar Toxicity 0.000 description 1
Landscapes
- Semiconductor Lasers (AREA)
- Dicing (AREA)
Abstract
Description
【発明の詳細な説明】
3、発明の詳細な説明
産業上の利用分野
本発明は、結晶前開面を利用する半導体基体の襞間方法
に関するものである。DETAILED DESCRIPTION OF THE INVENTION 3. Detailed Description of the Invention Field of Industrial Application The present invention relates to a method for interfolding a semiconductor substrate using a pre-crystal open plane.
従来の技術
半導体レーザの特性は、エピタキシャル成長などの結晶
成長技術だけでなく、共振器端面の反射鏡の形成や、そ
の他の組立て技術によっても著しい影響を受ける。反射
鏡面形成時に要求されることは、第1に、半導体レーザ
のストライプ方向での長さく共振器長)が再現性よく制
御できること、第2に、反射鏡形成部への損傷がなく、
品質の良い平坦な鏡面が得られること、さらに、第3と
して、作業性にすぐれ、量産にも対応できる技術である
ことなどがあげられる。これらの条件を実現するために
、現在、最も一般的に用いられる方法は結晶襞間により
反射鏡面とするものであり、エピタキシャル成長した半
導体基板の周辺を結晶の襞間面に沿って鋭利な刃物で押
圧することにより得られる。BACKGROUND OF THE INVENTION Characteristics of semiconductor lasers are significantly influenced not only by crystal growth techniques such as epitaxial growth, but also by the formation of mirrors on the cavity end faces and other assembly techniques. What is required when forming a reflective mirror surface is, firstly, that the length of the semiconductor laser in the stripe direction (cavity length) can be controlled with good reproducibility, and secondly, that there is no damage to the reflective mirror forming part.
The third advantage is that a flat mirror surface of good quality can be obtained, and the third advantage is that the technique has excellent workability and can be used for mass production. To achieve these conditions, the most commonly used method at present is to create a reflective mirror surface between the crystal folds, by cutting the periphery of the epitaxially grown semiconductor substrate along the interfold plane of the crystal with a sharp knife. Obtained by pressing.
発明が解決しようとする問題点
上記の半導体襞間方法では、良質の平坦な鏡面を得るに
は、微妙な作業を必要とし、したがって熟練者の手作業
に頼るところが大きい。このため、共振器長などのばら
つきが大きくなり、レーザ特性の再現性も悪いものとな
る。また、作業性が悪(、歩留り低下の原因ともなり、
量産時では大きな問題となる。Problems to be Solved by the Invention The above-mentioned semiconductor fold-spacing method requires delicate work in order to obtain a good quality flat mirror surface, and therefore relies heavily on the manual work of skilled workers. For this reason, variations in the resonator length, etc. become large, and the reproducibility of laser characteristics becomes poor. In addition, workability is poor (and may cause a decrease in yield).
This becomes a big problem during mass production.
問題点を解決するための手段
本発明は上記問題点を解決するために、半導体基体周辺
部の劈開位置に刃傷をつけ、この半導体基板を伸縮性の
優れたシートに接着した後にシートを引き伸ばすことで
半導体基板に引張り応力を発生させ、この状態で、基体
表面の垂直方向から打撃することにより、襞間作業を行
なうものである。Means for Solving the Problems In order to solve the above-mentioned problems, the present invention provides a method in which a blade is made at the cleavage position on the periphery of a semiconductor substrate, the semiconductor substrate is bonded to a highly stretchable sheet, and then the sheet is stretched. In this method, tensile stress is generated in the semiconductor substrate, and in this state, the interfold work is performed by striking the substrate surface in a direction perpendicular to the substrate surface.
作用
本発明によると、シートの伸長による半導体基板への引
張り応力の発生下では襞間性が非常に良好となる事実が
あり、半導体基板の周辺部にキズを付加することにより
、劈開位置を精密に制御することができる。例えば、半
導体レーザの場合には、所定間隔で周期的にキズを付け
ることで、得られる共振器長を一定にすることができる
。またこれらにより、襞間時に必要となる基板表面に垂
直方向からの力を格段に小さくでき、このため、襞間部
への損傷をほとんどなくすることができる。According to the present invention, there is a fact that the crease property is very good when tensile stress is generated on the semiconductor substrate due to sheet elongation, and by adding scratches to the periphery of the semiconductor substrate, the cleavage position can be precisely adjusted. can be controlled. For example, in the case of a semiconductor laser, by periodically making scratches at predetermined intervals, the resulting resonator length can be made constant. Moreover, these can significantly reduce the force required in the direction perpendicular to the substrate surface during inter-folding, and therefore, damage to the inter-fold portion can be almost eliminated.
実施例
本発明を、InP系の半導体レーザに応用した実施例に
ついて、図面を参照しながら、さらに詳しく説明する。Embodiment An embodiment in which the present invention is applied to an InP semiconductor laser will be described in more detail with reference to the drawings.
第1図は、本発明の詳細な説明する断面図である。使用
した半導体基体1は、InP基板上にInPクラッド層
1nGaAsP活性層、InPクラッド層および、オー
ム性接触を容易にするためのInGa−As2層の4層
を液相エピタキシャル法により成長した半導体レーザ用
のウェハであり、表裏両面に電極用のAu系金属を約1
μm程蒸着しである。このウェハのエピタキシャル面側
の表面に、第2図に示すように、劈開方向<011>と
垂直な一辺にくり返しピッチが0.25mmで長さ約0
、5 mmの刃傷6をダイヤモンドカッタにより形成
した。FIG. 1 is a cross-sectional view illustrating the present invention in detail. The semiconductor substrate 1 used was for a semiconductor laser, in which four layers of an InP cladding layer, an nGaAsP active layer, an InP cladding layer, and two InGa-As layers for facilitating ohmic contact were grown on an InP substrate by a liquid phase epitaxial method. It is a wafer with about 1 layer of Au-based metal for electrodes on both the front and back surfaces.
The thickness is about μm. As shown in FIG. 2, on the surface of this wafer on the epitaxial side, a repeating pitch of 0.25 mm on one side perpendicular to the cleavage direction <011> and a length of approximately 0.
, 5 mm blade scratches 6 were formed using a diamond cutter.
前記の基板1は、ステッピングモータ等により、正確に
可動するステージ上に固定してあり、ダイヤモンドカッ
タによる刃傷6の間隔は、はとんど誤差なく設定した目
標値と一致できるようにしている。The substrate 1 is fixed on a stage that is accurately movable by a stepping motor or the like, and the intervals between the blade scratches 6 made by the diamond cutter are made to coincide with a set target value without any error.
次に、上述の基板1を、塩化ビニール系のシート2に粘
着剤3によってはりつけ、さらにその上をポリエステル
系のシート4で押え、矢印の方向に引張り力を機械的に
加えた。引張る方向は、前記の劈開方向<011>と直
角方向である。この状態で、上下に可動する打撃用ハン
マー5で、前記の刃傷6に合せて、ゆるやかに半導体基
板1を打撃すると、基板1は、前記の刃傷6の位置でき
れいに襞間される。適当な引張り強度下では、ハンマー
5と刃傷6の位置は正確に一致させる必要はなく、初期
位置さえ調整すれば、通常の自動送り機構により容易に
自動化することが可能である。Next, the above-mentioned substrate 1 was attached to a vinyl chloride sheet 2 with an adhesive 3, and the top was further pressed with a polyester sheet 4, and a tensile force was mechanically applied in the direction of the arrow. The pulling direction is perpendicular to the cleavage direction <011>. In this state, when the semiconductor substrate 1 is gently struck with the vertically movable hitting hammer 5 in line with the blade scratches 6, the substrate 1 is neatly folded at the position of the blade scratches 6. Under appropriate tensile strength, the positions of the hammer 5 and the blade scar 6 do not need to match exactly, and as long as the initial position is adjusted, it can be easily automated using a normal automatic feeding mechanism.
第3図は、本発明の効果を調べるために、従来の劈開方
法と本発明の方法とで、襞間工程の歩留りをグラフ化し
たものである。従来法では、17〜43%と低歩留りな
のに対し、本発明では、80%以上にまで改善でき、こ
れまでの作業性に対する問題点を解決できた。′さらに
本発明の方法では、容易に自動化への拡張が可能なため
量産化にも直ちに移行できる特長を有している。FIG. 3 is a graph showing the yield of the inter-fold process using the conventional cleavage method and the method of the present invention, in order to examine the effects of the present invention. While the conventional method has a low yield of 17 to 43%, the present invention can improve the yield to over 80% and solve the previous problems with workability. 'Furthermore, the method of the present invention has the advantage that it can be easily extended to automation, so it can be immediately transferred to mass production.
第4図は、半導体レーザの特性に重要な共振器長eのば
らつきについて、本発明と従来法とで比較したものであ
る。従来法では、手作業のため、かなり広い範囲に分布
するが、本発明の方法では目標値とほぼ等しく、均質な
素子が再現性良く得られることを示している。この点で
も本発明の優位性は明らかとなった。FIG. 4 compares the variation in the cavity length e, which is important for the characteristics of a semiconductor laser, between the present invention and the conventional method. In the conventional method, the distribution is over a fairly wide range due to manual work, but in the method of the present invention, the value is almost equal to the target value, indicating that homogeneous elements can be obtained with good reproducibility. The superiority of the present invention has also become clear in this respect.
なお、本発明の実施例では、InPおよびInGaAs
Pを材料とした半導体レーザの襞間反射面について述べ
たが、他材料の半導体レーザや、その他の素子へも応用
できるのは、もちろんであり、同様の効果が得られるは
ずである。In the embodiments of the present invention, InP and InGaAs
Although the interfold reflection surface of a semiconductor laser made of P is described, it is of course applicable to semiconductor lasers made of other materials and other devices, and similar effects should be obtained.
発明の詳細
な説明してきたように、本発明では、簡単な装置により
、良質な襞間面を再現性良く極めて容易に形成でき、本
方法を半導体レーザやその他の素子に応用すれば、製造
工程を非常に簡単化でき、その工業的価値は大きい。As described in detail, the present invention allows high-quality interfold surfaces to be formed extremely easily with good reproducibility using a simple device, and when this method is applied to semiconductor lasers and other devices, the manufacturing process can be improved. can be greatly simplified, and its industrial value is great.
第1図は本発明の実施例の構成説明する断面図、第2図
はそれに用いる半導体基体の平面図、第3図は、半導体
レーザの襞間工程における歩留りを従来法と本発明の実
施例とで比較した分布特性図、第4図は、半導体レーザ
の共振器長のばらつきについて、従来法と本発明の実施
例とで比較した分布特性図である。
1・・・・・・半導体基板、2・・・・・・塩化ビニル
シート、3・・・・・・粘着剤、4・・・・・・カバー
用ポリエチレンシート、5・・・・・・基板打撃用ハン
マー、6・・・・・・ダイヤモンドカッタで形成した刃
傷。
代理人の氏名 弁理士 中尾敏男 はか1名第1因
第2図
第3図
第4図FIG. 1 is a cross-sectional view illustrating the configuration of an embodiment of the present invention, FIG. 2 is a plan view of a semiconductor substrate used therein, and FIG. 3 is a graph showing the yield in the inter-fold process of a semiconductor laser compared to the conventional method and the embodiment of the present invention. FIG. 4 is a distribution characteristic diagram comparing the conventional method and the embodiment of the present invention with respect to variations in the cavity length of a semiconductor laser. DESCRIPTION OF SYMBOLS 1... Semiconductor substrate, 2... Vinyl chloride sheet, 3... Adhesive, 4... Polyethylene sheet for cover, 5... Hammer for hitting the board, 6...Blade scratches formed with a diamond cutter. Name of agent: Patent attorney Toshio Nakao (1 person) 1st cause Figure 2 Figure 3 Figure 4
Claims (1)
第1の工程と、この半導体基体を、粘着剤を塗布した伸
縮性シート上に接着固定する第2の工程とを含み、前記
半導体基体に表面に平行で、かつ、劈開方向と垂直とな
る方向に前記伸縮性シートを介して引張り応力を発生さ
せた状態で、前記の劈開位置を前記基体表面に垂直方向
から打撃することにより、前記半導体基体を劈開するこ
とを特徴とする半導体基体の劈開方法。(1) A first step of making a knife wound at a predetermined cleavage position on the periphery of the semiconductor substrate, and a second step of adhesively fixing the semiconductor substrate onto a stretchable sheet coated with an adhesive; By striking the cleavage position from a direction perpendicular to the substrate surface while generating a tensile stress through the stretchable sheet in a direction parallel to the surface and perpendicular to the cleavage direction. A method for cleaving a semiconductor substrate, the method comprising cleaving a semiconductor substrate.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14068286A JPH0750810B2 (en) | 1986-06-17 | 1986-06-17 | Method of cleaving semiconductor substrate |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14068286A JPH0750810B2 (en) | 1986-06-17 | 1986-06-17 | Method of cleaving semiconductor substrate |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS62296579A true JPS62296579A (en) | 1987-12-23 |
JPH0750810B2 JPH0750810B2 (en) | 1995-05-31 |
Family
ID=15274301
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14068286A Expired - Lifetime JPH0750810B2 (en) | 1986-06-17 | 1986-06-17 | Method of cleaving semiconductor substrate |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0750810B2 (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2003218471A (en) * | 1993-11-22 | 2003-07-31 | Xerox Corp | Method of generating laser diode |
CN103786271A (en) * | 2012-10-29 | 2014-05-14 | 三星钻石工业股份有限公司 | Breaking apparatus and breaking method for multi-layered fragile material substrate |
JP2019175927A (en) * | 2018-03-27 | 2019-10-10 | 株式会社東京精密 | Wafer dividing apparatus and method |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5177186B2 (en) * | 2003-10-30 | 2013-04-03 | 日亜化学工業株式会社 | Support for semiconductor element, method for manufacturing the same, and semiconductor device |
JP4792726B2 (en) * | 2003-10-30 | 2011-10-12 | 日亜化学工業株式会社 | Manufacturing method of support for semiconductor element |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6047491A (en) * | 1983-08-25 | 1985-03-14 | Sharp Corp | Cleavaging method of semiconductor laser wafer |
JPS60137038A (en) * | 1983-12-26 | 1985-07-20 | Toshiba Corp | Cleaving method of semiconductor wafer |
-
1986
- 1986-06-17 JP JP14068286A patent/JPH0750810B2/en not_active Expired - Lifetime
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6047491A (en) * | 1983-08-25 | 1985-03-14 | Sharp Corp | Cleavaging method of semiconductor laser wafer |
JPS60137038A (en) * | 1983-12-26 | 1985-07-20 | Toshiba Corp | Cleaving method of semiconductor wafer |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2003218471A (en) * | 1993-11-22 | 2003-07-31 | Xerox Corp | Method of generating laser diode |
CN103786271A (en) * | 2012-10-29 | 2014-05-14 | 三星钻石工业股份有限公司 | Breaking apparatus and breaking method for multi-layered fragile material substrate |
JP2019175927A (en) * | 2018-03-27 | 2019-10-10 | 株式会社東京精密 | Wafer dividing apparatus and method |
Also Published As
Publication number | Publication date |
---|---|
JPH0750810B2 (en) | 1995-05-31 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
EXPY | Cancellation because of completion of term |