JPS62291961A - Solid-state image pickup device - Google Patents
Solid-state image pickup deviceInfo
- Publication number
- JPS62291961A JPS62291961A JP61134915A JP13491586A JPS62291961A JP S62291961 A JPS62291961 A JP S62291961A JP 61134915 A JP61134915 A JP 61134915A JP 13491586 A JP13491586 A JP 13491586A JP S62291961 A JPS62291961 A JP S62291961A
- Authority
- JP
- Japan
- Prior art keywords
- conductivity type
- semiconductor layer
- solid
- well
- photodiode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 claims abstract description 44
- 238000003384 imaging method Methods 0.000 claims description 23
- 239000000758 substrate Substances 0.000 claims description 21
- 239000012535 impurity Substances 0.000 claims description 15
- 238000000034 method Methods 0.000 abstract description 8
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 2
- 229910052681 coesite Inorganic materials 0.000 abstract 1
- 229910052906 cristobalite Inorganic materials 0.000 abstract 1
- 230000000452 restraining effect Effects 0.000 abstract 1
- 239000000377 silicon dioxide Substances 0.000 abstract 1
- 235000012239 silicon dioxide Nutrition 0.000 abstract 1
- 229910052682 stishovite Inorganic materials 0.000 abstract 1
- 229910052905 tridymite Inorganic materials 0.000 abstract 1
- 239000012212 insulator Substances 0.000 description 8
- 230000000694 effects Effects 0.000 description 5
- 238000009792 diffusion process Methods 0.000 description 4
- 206010034960 Photophobia Diseases 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 2
- 230000005684 electric field Effects 0.000 description 2
- 238000010884 ion-beam technique Methods 0.000 description 2
- 208000013469 light sensitivity Diseases 0.000 description 2
- 206010034972 Photosensitivity reaction Diseases 0.000 description 1
- 206010047571 Visual impairment Diseases 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- XZWYZXLIPXDOLR-UHFFFAOYSA-N metformin Chemical compound CN(C)C(=N)NC(N)=N XZWYZXLIPXDOLR-UHFFFAOYSA-N 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000036211 photosensitivity Effects 0.000 description 1
- 230000035945 sensitivity Effects 0.000 description 1
- 230000001629 suppression Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/148—Charge coupled imagers
- H01L27/14887—Blooming suppression
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Electromagnetism (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Solid State Image Pick-Up Elements (AREA)
- Transforming Light Signals Into Electric Signals (AREA)
Abstract
Description
【発明の詳細な説明】
３、発明の詳細な説明
〔産業上の利用分野〕
本発明は、低スメアの固体撮像装置に関するものである
。Detailed Description of the Invention 3. Detailed Description of the Invention [Field of Industrial Application] The present invention relates to a low-smear solid-state imaging device.
従来の固体撮像装置につい゛て第８図および第９図を用
いて以下に説明する。第８図は上記固体撮像装置の回路
構成を示したものである。ホトダイオード１−１．１−
２に蓄積された光信号電荷は。A conventional solid-state imaging device will be described below with reference to FIGS. 8 and 9. FIG. 8 shows the circuit configuration of the solid-state imaging device. Photodiode 1-1.1-
The optical signal charge accumulated in 2 is.
ゲート２−１．２−２を介して垂直ＣＣＤ （Ｃｈａｒ
ｇｅ Ｃｏｕｐｌｅｄ Ｄｅｖｉｃｅ）チャネル部３−
１゜３−２に移されたのち、上記垂直ＣＯＤチャネル部
３−１．３−２によって水平ＣＣＤ１１へ運ばれ。Vertical CCD (Char
ge Coupled Device) Channel part 3-
1° 3-2, and then transported to the horizontal CCD 11 by the vertical COD channel section 3-1.3-2.
ついで水平ＣＣＤＩＩによって出力アンプ１２の入力部
へ運ばれて信号出力になる。第９図は、上記第８図のホ
トダイオード１−１．１−２、ゲート２−１．２−２お
よび垂直ＣＯＤチャネル部３−１゜３−２からなる受光
部のＡ−Ａ’断面図を示している。It is then carried by the horizontal CCD II to the input section of the output amplifier 12 and becomes a signal output. FIG. 9 is an AA' cross-sectional view of the light receiving section consisting of the photodiode 1-1.1-2, gate 2-1.2-2 and vertical COD channel section 3-1°3-2 shown in FIG. 8 above. It shows.
ｎ型半導体基板６内に形成したｐ型ウェル１３内には、
ｎ“拡散層としてホトダイオード１−１．１−２、垂直
ＣＣＤチャネル部３−１．３−２が形成しである。上記
ホトダイオード１−１．１−２および垂直ＣＯＤチャネ
ル部３−１．３−２は、２−１．２−２をゲートとする
Ｍ ＯＳ （ＭｅｔａｌＯｘｉｄａ Ｓ ｅｍｉｃｏｎ
ｄｕｃｔｏｒ） ）ランジスタのそれぞれソースおよび
ドレインを形成している。７−１．７−２はホトダイオ
ード１−１．１−２と垂直ＣＣＤチャネル３−１．３−
２とを分離するための８１０２等の絶縁物であり、８−
１．８−２は垂直ＣＯＤのゲートである。９−１．９−
２はアルミニウム等の遮光膜であり、１０はＳｉＯ□等
の絶縁物である。In the p-type well 13 formed in the n-type semiconductor substrate 6,
A photodiode 1-1.1-2 and a vertical CCD channel section 3-1.3-2 are formed as a diffusion layer.The photodiode 1-1.1-2 and a vertical COD channel section 3-1.3 -2 is a MOS (MetalOxida Semiconductor) with 2-1.2-2 as a gate.
) form the source and drain of the transistor, respectively. 7-1.7-2 is photodiode 1-1.1-2 and vertical CCD channel 3-1.3-
It is an insulator such as 8102 to separate 8-
1.8-2 is a vertical COD gate. 9-1.9-
2 is a light-shielding film made of aluminum or the like, and 10 is an insulator such as SiO□.
固体撮像装置に入射する光の中で、斜めに入射した成分
や５ｉｎ２とＳｉとの界面で反射した成分の一部は、垂
直ＣＯＤチャネル部３−１．３−２周辺のＰウェル１３
内に漏れ込むことになる。上記漏れ込み光によって発生
した雑音電荷の一部は、さらに垂直ＣＣＤチャネル部３
−１．３−２へと拡散し、もしくは電界ドリフトによっ
て入り込み、これが画像軸郭をぼんやりと不鮮明にする
スメア現象の原因になる。上記雑音電荷の振舞を第９図
にｅ−として示している。Among the light incident on the solid-state imaging device, some of the components incident obliquely and the components reflected at the interface between 5in2 and Si are absorbed into the P well 13 around the vertical COD channel section 3-1.3-2.
It will leak inside. A part of the noise charge generated by the leaked light is further transferred to the vertical CCD channel section 3.
-1.3-2 or enters due to electric field drift, which causes a smear phenomenon that makes the image axis vague and unclear. The behavior of the noise charge mentioned above is shown as e- in FIG.
本発明の目的は、上記のようなスメア現象の原因になる
信号電荷をなくシ、スメア現象を抑制した固体撮像装置
およびその製造方法を得ることである。SUMMARY OF THE INVENTION An object of the present invention is to provide a solid-state imaging device that suppresses the smear phenomenon by eliminating signal charges that cause the smear phenomenon as described above, and a method for manufacturing the same.
固体撮像装置におけるスメア現象の原因は、上記のよう
に第９図に示す電子の電荷が、拡散あるいは電界ドリフ
トによって垂直ＣＯＤチャネル部３−１．３−２に到達
するためであるから、スメア現象を抑制するには、上記
電荷が垂直ＣＯＤチャネル部３−１．３−２に到達しに
くくすればよい。このため、垂直ＣＣＤチャネル部３−
１．；Ｉｔ−２周辺のｐウェル１３だけを、ホトダイオ
ード１−１．１−２周辺のＰウェルとは別にｎ基板６上
に小さく形成するか、ホトダイオード１−１．１−２の
周辺のｐウェルを垂直ＣＣＤチャネル部３−１．３−２
周辺のｐウェル１３よりも深く形成するか、また上記ホ
トダイオード１−１．１−２周辺のＰウェルの不純物濃
度を、垂直ＣＣＤチャネル部周辺のｐウェルの不純物濃
度よりも低くするか、さらにｎ型ホトダイオードの深さ
を垂直ＣＣＤチャネル部周辺のｐウェルよりも深くする
ことにより達成される。The cause of the smear phenomenon in a solid-state imaging device is that the electron charge shown in FIG. 9 reaches the vertical COD channel portion 3-1, 3-2 by diffusion or electric field drift, as described above. In order to suppress this, it is sufficient to make it difficult for the charges to reach the vertical COD channel portion 3-1, 3-2. For this reason, the vertical CCD channel section 3-
1. ; Either only the p-well 13 around It-2 is formed small on the n-substrate 6 separately from the P-well around the photodiode 1-1.1-2, or the p-well around the photodiode 1-1.1-2 is formed small. Vertical CCD channel section 3-1.3-2
The impurity concentration of the P well around the photodiode 1-1. This is achieved by making the depth of the type photodiode deeper than the p-well around the vertical CCD channel section.
要求される光感度からホトダイオード１−１゜１−２周
辺のＰウェルの深さが決定されるから、上記ホトダイオ
ード１−１．１−２周辺のｐウェル１３の深さとは別に
、垂直ＣＣＤチャネル部３−１．３−２の周辺にはより
浅く小さいｐウェルをｎ基板上に設けることにより、上
記垂直ＣＯＤチャネル部３−１．３−２周辺のｐウェル
内で発生する電荷が著しく少なくなり、したがって垂直
ＣＣＤチャネル部３−１．３−２に入り込む雑音電荷も
殆んどなくなる。また、上記垂直ＣＣＤチャネル部３−
１．３−２の周辺のｐウェルよりもホトダイオード１−
１．１−２の周辺のｐウェルを深く形成し、不純物濃度
を低くするとともに、ｎ型ホトダイオード１−１．１−
２の深さを垂直ＣＣＤチャネル部３−１．３−２の周辺
のＰウェルより深くすることにより、ホトダイオードの
ｐウェルで発生した電荷は垂直ＣＣＤチャネル部３−１
．３−２に拡散しにくくなり、スメア現象が抑制される
ことになる。Since the depth of the P-well around the photodiode 1-1.1-2 is determined based on the required photosensitivity, the depth of the P-well around the photodiode 1-1. By providing a shallower and smaller p-well on the n-substrate around the vertical COD channel section 3-1.3-2, the charge generated in the p-well around the vertical COD channel section 3-1.3-2 is significantly reduced. Therefore, the noise charges entering the vertical CCD channel section 3-1, 3-2 are almost eliminated. In addition, the vertical CCD channel section 3-
1. Photodiode 1- than the surrounding p-well of 3-2
The p-well around 1.1-2 is formed deeply to lower the impurity concentration, and the n-type photodiode 1-1.1-
By making the depth of 2 deeper than the P-well around the vertical CCD channel section 3-1.
．． 3-2, it becomes difficult to spread, and the smear phenomenon is suppressed.
つぎに本発明の実施例を図面とともに説明する。 Next, embodiments of the present invention will be described with reference to the drawings.
第１図は本発明による固体撮像装置における受光部の第
１実施例を示す断面図、第２図は上記受光部の第２実施
例を示す断面図、第３図は上記受光部の第３実施例を示
す断面図、第４図は上記受光部の第４実施例を示す断面
図、第５図は上記受光部の第５実施例を示す断面図、第
６図は上記受光部の第６実施例を示す断面図、第７図は
上記受光部の第７実施例を示す断面図、第１０図は上記
第３実施例にｐ基板を用いた例を示す断面図である６第
１図において、ｎ型半導体基板６上にレジストをマスク
にしてｐ型不純物を打込み、その後熱拡散することによ
り第２導電型の第１半導体層であるｐ型ウェル４−１．
４−２および第２湛電型の第２半導体層であるｐ型ウェ
ル５−１，５−２を個別に形成し、また上記各ウェル内
にはｎ型不純物を用い同様の工程によりｎ型拡散層の第
１導電型受光領域半導体層１−１．１−２．第１導電型
の半導体層３−１．３−２を形成した。ホトダイオード
である１−１，１−２および垂直ＣＯＤチャネル部であ
る３−１，３−２は、２−１．２−２をそれぞれゲート
とするＭＯｓトランジスタのソースおよびドレインにな
る。７−１．７−２はホトダイオード１−１．１−２と
垂直ＣＣＤチャネル部３−１．３−２をそれぞれ分離す
るためのＳ ｉｏ、等の絶縁物であり、上記Ｓｉｎ、は
本領域の基板表面に不純物イオン等を注入し障壁を形成
すればなくてもよく、上記障壁によってホトダイオード
１−１．１−２と垂直ＣＣＤ３−１．３−２間のそれぞ
れの分離を行うことができる。８−１．８−２は垂直Ｃ
ＣＤのゲートであり、該ゲート８−１．８−２は、ここ
では第１層により形成した場合を示したが、ｎ層（ｎ〉
２）で形成してもよい、また、９−１．９−２はアルミ
ニウム等の遮光膜であり、１０はＳｉｎ、等の絶縁物で
ある。上記絶縁物７−１．７−２．ゲート８−１．８−
２、遮光１］１９−１．９−２および絶縁物１０等は、
ごく普通の工程によって形成されている。FIG. 1 is a sectional view showing a first embodiment of the light receiving section in a solid-state imaging device according to the present invention, FIG. 2 is a sectional view showing a second embodiment of the light receiving section, and FIG. 3 is a sectional view showing a third embodiment of the light receiving section. 4 is a sectional view showing a fourth embodiment of the light receiving section, FIG. 5 is a sectional view showing a fifth embodiment of the light receiving section, and FIG. 6 is a sectional view showing a fifth embodiment of the light receiving section. FIG. 7 is a sectional view showing the seventh embodiment of the light receiving section, and FIG. 10 is a sectional view showing an example in which a p-substrate is used in the third embodiment. In the figure, p-type impurities are implanted onto an n-type semiconductor substrate 6 using a resist as a mask, and then thermally diffused to form a p-type well 4-1, which is a first semiconductor layer of a second conductivity type.
4-2 and p-type wells 5-1 and 5-2, which are second semiconductor layers of the second charging type, are individually formed, and in each of the wells, an n-type impurity is added and an n-type impurity is formed by the same process. First conductivity type light-receiving region semiconductor layer of diffusion layer 1-1.1-2. A first conductivity type semiconductor layer 3-1.3-2 was formed. Photodiodes 1-1 and 1-2 and vertical COD channel portions 3-1 and 3-2 become the source and drain of a MOs transistor having gates 2-1 and 2-2, respectively. 7-1.7-2 are insulators such as Sio for separating the photodiode 1-1.1-2 and the vertical CCD channel section 3-1.3-2, and the above Sin is the insulator in this area. It is not necessary to form a barrier by implanting impurity ions or the like into the surface of the substrate, and the barrier can separate the photodiode 1-1.1-2 and the vertical CCD 3-1.3-2. . 8-1.8-2 is vertical C
The gates 8-1 and 8-2 are the gates of CD, and although the case where the gates 8-1 and 8-2 are formed from the first layer is shown here, it is formed from the n layer (n>
2), and 9-1.9-2 is a light-shielding film made of aluminum or the like, and 10 is an insulating material such as Sin. Said insulator 7-1.7-2. Gate 8-1.8-
2. Light shielding 1] 19-1.9-2 and insulator 10, etc.
It is formed using a very common process.
上記遮光膜９−１．９−２の開口部より入射した信号光
は、ホトダイオード１−１．１−２およびホトダイオー
ドルウエル４−１．４−２内で光電変換され、該光電変
換の結果生じた光励起電子はホトダイオード１−１．１
−２に一定期間蓄積される。その後、ゲート２−１．２
−２を介して垂直ＣＣＤ３−１．３−２に移されたのち
に出方されるという動作は、前記した従来例と同様であ
るが、本第１実施例が第９図に示す従来例と相異する点
は、ｎ基板６内に設けたｐウェル４−１．４−２．５−
１．５−２を、ホトダイオード１−１．１−２の周辺の
ｐウェル４−１，４−２と垂直ＣＣＤチャネル３−１．
３−２の周辺のｐウェル５−１．５−２とをそれぞれ独
立して形成したことである。The signal light incident through the opening of the light shielding film 9-1.9-2 is photoelectrically converted within the photodiode 1-1.1-2 and the photodiode well 4-1.4-2, and the result of the photoelectric conversion is The generated photoexcited electrons are transferred to the photodiode 1-1.1
-2 is accumulated for a certain period of time. After that, gate 2-1.2
The operation of being transferred to the vertical CCD 3-1. The difference is that the p-well 4-1.4-2.5- provided in the n-substrate 6
1.5-2 to the p-wells 4-1, 4-2 around the photodiode 1-1.1-2 and the vertical CCD channel 3-1.
The p-wells 5-1 and 5-2 around 3-2 are formed independently.
ホトダイオード１−１．１−２の周辺のｐウェル４−１
．４−２は深さが深い方が、固体撮像装置の感度を向上
し性能を上げることができる。これはＳｉに対する入射
光の透過量Ｓが
ｓ 、、、 ｓ 、 ｅ−＄（ｊＬ）４．．． 、、、
（１）で表わされるためである。ただし、Ｓｏは入射
光量、α（λ）は入射光波長に依存する定数、又は光入
射面からの深さである。したがって、ホトダイオード周
辺のｐウェル４−１．４−２をより深くし、それより下
方に透過してしまう光の量を減らせば、より多くの光励
起電子が信号として得られる。一方、垂直ＣＣＤチャネ
ル３−１．３−２の周辺のｐ＋ウェル５−１．５−２の
深さは、浅くした方がスメア現象を抑制することができ
る。P well 4-1 around photodiode 1-1.1-2
．． 4-2, the deeper the depth, the better the sensitivity and performance of the solid-state imaging device can be. This means that the transmission amount S of incident light to Si is s,..., s, e-$(jL)4. ．． ．． ,,,
This is because it is expressed as (1). Here, So is the amount of incident light, and α(λ) is a constant depending on the wavelength of the incident light, or the depth from the light incidence surface. Therefore, by making the p-well 4-1, 4-2 around the photodiode deeper and reducing the amount of light transmitted below it, more photo-excited electrons can be obtained as a signal. On the other hand, the smear phenomenon can be suppressed by making the depth of the p+ well 5-1.5-2 around the vertical CCD channel 3-1.3-2 shallower.
これは斜めに入射し、あるいはＳｉＯ□とＳＬとの界面
で反射されることによって、垂直ｃｃＤチャネル部３−
１．３−２周辺のｐ＋ウェル５−１．５−２に漏れ込む
光の透過量もまた（１）式を満足させるため、上記ｐ＋
ウェルの深さを浅くしてそれより下方のｎ基板６内に透
過してしまう光の量を増せば、上記ｐ＋ウェル５−１．
５−２内で発生し、垂直ＣＯＤチャネル部３−１，３−
２内に入り込む雑音電荷を減らすことができるからであ
る。このとき、上記ｐ＋ウェルの深さは浅い程よいが、
垂直ＣＯＤチャネル３−１．３−２とｎ基板６とで電荷
のやりとりが生じない大きさにする必要がある。この深
さはｐ＋ウェル５−１．５−２の不純物濃度を大きくす
る程浅くすることができて望ましい、さらに、Ｐ＋ウェ
ル５−１．５−２の不純物濃度を大きくすると、垂直Ｃ
ＯＤチャネル部３−１．３−２の空乏層が小さくなり、
スメア雑音の原因となる雑音電荷が、上記垂直ＣＣＤチ
ャネル３−１．３−２に行きにくくなることによるスメ
ア雑音抑制効果を生じる。しかしながら、この場合１通
常に用いられているイオン打込み、拡散工程で素子を形
成すると、ｐ＋ウェルの濃度を大きくすることは、同時
に垂直ＣＣＤチャネル３−１，３−２の不純物濃度の増
加を招くことになる。さらに、垂直ＣＣＤチャネル部３
−１．３−２の不純物濃度を大きくしすぎると、上記垂
直ＣＯＤの転送容量を減少させてしまう。This is incident obliquely or is reflected at the interface between SiO□ and SL, so that the vertical CCD channel portion 3-
Since the amount of light leaking into the p+ well 5-1.5-2 around 1.3-2 also satisfies equation (1), the above p+
If the depth of the well is made shallow and the amount of light transmitted into the n-substrate 6 below it is increased, the p+ well 5-1.
5-2, and vertical COD channel parts 3-1, 3-
This is because it is possible to reduce the noise charges that enter the inside. At this time, the shallower the depth of the p+ well, the better.
It is necessary that the vertical COD channel 3-1, 3-2 and the n-substrate 6 have a size that does not cause exchange of charges. It is desirable that this depth can be made shallower as the impurity concentration of the p+ well 5-1.5-2 increases.Furthermore, if the impurity concentration of the p+ well 5-1.5-2 is increased,
The depletion layer of the OD channel part 3-1.3-2 becomes smaller,
A smear noise suppressing effect is produced by making it difficult for noise charges that cause smear noise to reach the vertical CCD channels 3-1, 3-2. However, in this case 1, if the device is formed by the commonly used ion implantation and diffusion process, increasing the concentration of the p+ well will simultaneously increase the impurity concentration of the vertical CCD channels 3-1 and 3-2. It turns out. Furthermore, the vertical CCD channel section 3
If the impurity concentration of -1.3-2 is made too large, the transfer capacity of the vertical COD will be reduced.
そこで、垂直ＣＯＤチャネル部３−１．３−２の不純物
濃度を大きくすることなく、Ｐ＋ウェル５−１．５−２
の不純物濃度を大きくするためには。Therefore, without increasing the impurity concentration of the vertical COD channel portion 3-1.3-2, the P+ well 5-1.5-2
In order to increase the impurity concentration of.
例えばフォーカス・イオンビーム法等を用いてｐ型不純
物をｎ基板に打込む方法がある。For example, there is a method of implanting p-type impurities into an n-type substrate using a focused ion beam method or the like.
本発明の第２実施例を第２図に示す。第２図はホトダイ
オード１−１．１−２周囲のトウエル４−１．４−２の
下に、ｐウェル１４−１．１４−２がさらに設けられて
おり、上記トウエル４−１．４−２がホトダイオード１
−１．１−２の中心近傍の下ではより深くなっているこ
とを除けば、第１図に示す第１実施例と同じであり、上
記第１実施例と同様の方法で製作することができる。ｐ
ウェル１４−１ 、１４−２を追加することによって、
本発明の目的のスメア現象抑制効果を減じることなく、
固体撮像装置の光感度を向上させることができる。A second embodiment of the invention is shown in FIG. FIG. 2 shows that a p-well 14-1.14-2 is further provided below the towel 4-1.4-2 around the photodiode 1-1.1-2, and 2 is photodiode 1
-1.1-2 is the same as the first embodiment shown in Fig. 1, except that it is deeper near the center, and can be manufactured by the same method as the first embodiment above. can. p
By adding wells 14-1 and 14-2,
without reducing the smear phenomenon suppression effect aimed at by the present invention,
The light sensitivity of a solid-state imaging device can be improved.
なお、上記ｐウェル１４−１．１４−２の形成には、例
えば、フォーカス・イオンビーム法を用いてｐ型不純物
を直接ｎ基板６に打込むとよい。Note that to form the p-well 14-1, 14-2, p-type impurities may be directly implanted into the n-substrate 6 using, for example, a focused ion beam method.
本発明の第３実施例を第３図に示す。本実施例は複数の
垂直ＣＣＤチャネル部３−１．３−２やその周辺のＰ＋
ウェル５−１．５−２等が１つのホトダイオード１５お
よびそのＰウェル１３の中に入ってしまっていることを
除けば、前記第１実施例と同じであり、最初のマスクが
異るだけで上記第１実施例と同様にして製作できる。第
１実施例では、垂直ＣＣＤチャネル周辺のＰ＋ウェル５
−１．５−２をｎ型基板６内に設けることによってスメ
ア現象を抑制したが、第３図に示す本実施例では、上記
ｐ＋ウェル５−１．５−２をｎ型のホトダイオード１５
内に設けて同様な効果を得ている。ここで上記ホトダイ
オード１５はＰ＋ウェル５−１．５−２の下で空乏化す
るように動作電圧を設定すれば、垂直ＣＯＤチャネル部
３−１．３−２で区切られた横方向の各受光領域間の電
荷の混入現象は発生しない。素子の縦方向の各受光領域
間についても同様である。なお、本実施例では垂直ＣＣ
Ｄ周辺のＰ＋ウェル５−１．５−２とホトダイオードの
ｐウェル１３とは、ホトダイオード１５によって完全に
分離されているため、ホトダイオードのｐウェル１３を
さらに深くして、ホトダイオードルウエル１３内で発生
する電荷の量を増しても、スメア雑音は全く増加しない
、これは、固体撮像装置の光感度を上げてもスメア雑音
の大きさは変化しないということであり、本実施例の大
きな長所である。A third embodiment of the invention is shown in FIG. This embodiment uses a plurality of vertical CCD channel sections 3-1, 3-2 and the surrounding P
This is the same as the first embodiment except that the wells 5-1, 5-2, etc. are placed in one photodiode 15 and its P well 13, and the only difference is the initial mask. It can be manufactured in the same manner as the first embodiment. In the first embodiment, the P+ well 5 around the vertical CCD channel
Although the smear phenomenon was suppressed by providing the p+ well 5-1.5-2 in the n-type substrate 6, in this embodiment shown in FIG.
A similar effect can be obtained by installing it inside. Here, if the operating voltage is set so that the photodiode 15 is depleted under the P+ well 5-1. No charge mixing phenomenon occurs between regions. The same is true between the light receiving regions in the vertical direction of the element. Note that in this embodiment, the vertical CC
Since the P+ well 5-1, 5-2 around D and the photodiode p-well 13 are completely separated by the photodiode 15, the photodiode p-well 13 is made deeper and the Even if the amount of charge is increased, the smear noise does not increase at all. This means that even if the light sensitivity of the solid-state imaging device is increased, the magnitude of the smear noise does not change, which is a great advantage of this embodiment. .
本発明の第４実施例を第４図に示す。本実施例は、ホト
ダイオード１５の深さが一様でないことを除けば、上記
第３実施例と同様で、最初のマスクを変えることによっ
て同様に製作できる。本実施例は、ホトダイオード１５
の深さを、垂直ＣＣＤチャネル部３−１．３−２周辺の
Ｐ＋ウェル５−１．５−２がないところで一部浅くする
ことにより、ゲート２−１．２−２がオン（ＯＮ）のと
きに上記ホトダイオード１５を完全に空乏化させ、残像
をなくすようにしたものである。上記構造は、ホトダイ
オードｎ層１５を垂直ＣＣＤチャネル部３−１．３−２
側から形成することによって容易に得ることができる。A fourth embodiment of the invention is shown in FIG. This embodiment is similar to the third embodiment, except that the depth of the photodiode 15 is not uniform, and can be manufactured in the same way by changing the initial mask. In this embodiment, the photodiode 15
By partially reducing the depth of the P+ well 5-1.5-2 around the vertical CCD channel section 3-1.3-2, the gate 2-1.2-2 is turned ON. At this time, the photodiode 15 is completely depleted to eliminate afterimages. In the above structure, the photodiode n layer 15 is connected to the vertical CCD channel section 3-1.3-2.
It can be easily obtained by forming from the side.
本発明の第５実施例を第５図に示す。本実施例は、ホト
ダイオード１−１．１−２が絶縁物７−１．７−２の下
のｐ＋層１６−１．１６−２で分離していることを除け
ば、第３図に示す第３実施例と同一である。本発明が目
的とするスメア現象抑制効果については、他の実施例と
同様に期待できる。A fifth embodiment of the present invention is shown in FIG. This embodiment is shown in FIG. 3, except that the photodiode 1-1.1-2 is separated by a p+ layer 16-1.16-2 below the insulator 7-1.7-2. This is the same as the third embodiment. The effect of suppressing the smear phenomenon, which is the objective of the present invention, can be expected as in the other embodiments.
なお、本実施例の場合は、絶縁物７−１および７−２は
なくても差支えない。Note that in this embodiment, the insulators 7-1 and 7-2 may be omitted.
上記第３〜第５実施例は、いずれもｎ基板６上にｐウェ
ル１３を設けているが、この代りにｐ基板１９を用いて
もよい、上記第３実施例についてＰ基板１９を用いた場
合を第１０図に示す。In the third to fifth embodiments described above, the p-well 13 is provided on the n-substrate 6, but a p-type substrate 19 may be used instead. The case is shown in FIG.
本発明の第６実施例を第６図に示す、第６実施例におい
て、Ｐ型ウェル４−１．４−２の一部が浅くなっている
ことを除けば、第１図に示す第１実施例と同じである。A sixth embodiment of the present invention is shown in FIG. 6. In the sixth embodiment, the first embodiment shown in FIG. It is the same as the example.
上記構成は縦形のオーバーフロードレインを形成するも
ので、ブルーミング抑制に効果的である。もちろん、第
１実施例において、通常の横形オーバーフロードレイン
を組合わせても構わない、また、上記第６実施例の縦形
オーバーフロードレインの位置については、特に本発明
の原理と関係ない。The above configuration forms a vertical overflow drain and is effective in suppressing blooming. Of course, the first embodiment may be combined with a normal horizontal overflow drain, and the position of the vertical overflow drain in the sixth embodiment is not particularly related to the principle of the present invention.
第７図に示す第７実施例は、ＭＯ８形固体撮像装置の場
合を示す例で、垂直ＣＣＤゲート１８−１．１８−２は
ｎ型半導体層である垂直ＣＯＤチャネル部１３−１ 、
１３−２と接続されており、垂直あるいは水平の信号線
になっているほかは、前記第１実施例と同様である０本
実施例では、ホトダイオード１−１．１−２が垂直ＣＣ
Ｄチャネル部１３−１．１３−２の周辺の垂直ＣＣＤｐ
＋ウェル５−１．５−２の深さよりも深くなっているの
で、スメアの抑制には効果的である。The seventh embodiment shown in FIG. 7 is an example showing the case of an MO8 type solid-state imaging device, in which the vertical CCD gates 18-1, 18-2 are vertical COD channel portions 13-1, which are n-type semiconductor layers,
In this embodiment, the photodiode 1-1.1-2 is connected to the vertical CC
Vertical CCDp around D channel section 13-1.13-2
Since it is deeper than the +well 5-1.5-2, it is effective in suppressing smear.
上記のように本発明による固体撮像装置は、第１導電型
半導体基板の表面の一部に形成された第２導電型の第１
半導体層表面に設けた複数個の第１導電型受光領域半導
体層と、上記半導体基板の表面の一部に形成された第２
導電型の第２半導体層に設けた電荷転送手段の第１導電
型半導体層と、信号出力手段とを有する固体撮像装置に
おいて。As described above, the solid-state imaging device according to the present invention includes a first semiconductor substrate of the second conductivity type formed on a part of the surface of the first conductivity type semiconductor substrate.
A plurality of first conductivity type light-receiving region semiconductor layers provided on the surface of the semiconductor layer, and a second conductivity type light receiving region formed on a part of the surface of the semiconductor substrate.
A solid-state imaging device including a first conductive type semiconductor layer of a charge transfer means provided in a second conductive type semiconductor layer, and a signal output means.
上記第２導電型の第１半導体層と第２導電型の第２半導
体層とを、それぞれ別に形成したことにより、上記第２
導電型の第１半導体層に発生した電荷が上記第２導電型
の第２半導体層に拡散しにくくなり、スメア現象を抑制
できる固体撮像装置を得ることができる。By forming the first semiconductor layer of the second conductivity type and the second semiconductor layer of the second conductivity type separately, the second conductivity type semiconductor layer is formed separately.
Charges generated in the first conductive type semiconductor layer are less likely to diffuse into the second conductive type second semiconductor layer, and a solid-state imaging device that can suppress the smear phenomenon can be obtained.
第１図は本発明による固体撮像装置における受光部の第
１実施例を示す断面図、第２図は上記受光部の第２実施
例を示す断面図、第３図は上記受光部の第３実施例を示
す断面図、第４図は上記受光部の第４実施例を示す断面
図、第５図は上記受光部の第５実施例を示す断面図、第
６図は上記受光部の第６実施例を示す断面図、第７ｔ！
Ｉは上記受光部の第７実施例を示す断面図、第８図は従
来の固体撮像装置の構造を示す図、第９図は従来の固体
撮像装置受光部の断面図、第１０図は第３実施例にｐ基
板を用いた例を示す断面図である。
１−１．１−２・・・第１導電型受光領域半導体層（ホ
トダイオード）
３−１．３−２・・・第１導電型半導体層（垂直ＣＣＤ
チャネル部）
４−１．４−２・・・第２１１電型第１半導体層５−１
．５−２・・・第２導電型第２半導体層６・・・第１導
電型半導体基板
１２・・・出力手段FIG. 1 is a sectional view showing a first embodiment of the light receiving section in a solid-state imaging device according to the present invention, FIG. 2 is a sectional view showing a second embodiment of the light receiving section, and FIG. 3 is a sectional view showing a third embodiment of the light receiving section. 4 is a sectional view showing a fourth embodiment of the light receiving section, FIG. 5 is a sectional view showing a fifth embodiment of the light receiving section, and FIG. 6 is a sectional view showing a fifth embodiment of the light receiving section. Cross-sectional view showing the sixth embodiment, 7th t!
I is a sectional view showing a seventh embodiment of the light receiving section, FIG. 8 is a diagram showing the structure of a conventional solid-state imaging device, FIG. 9 is a sectional view of a conventional solid-state imaging device light receiving section, and FIG. FIG. 3 is a cross-sectional view showing an example in which a p-substrate is used in the third embodiment. 1-1.1-2...First conductivity type light receiving area semiconductor layer (photodiode) 3-1.3-2...First conductivity type semiconductor layer (vertical CCD
channel part) 4-1.4-2...211th electric type first semiconductor layer 5-1
．． 5-2... Second conductive type second semiconductor layer 6... First conductive type semiconductor substrate 12... Output means
Claims (1)
第２導電型の第１半導体層表面に設けた複数個の第１導
電型受光領域半導体層と、上記半導体基板の表面の一部
に形成された第２導電型の第２半導体層に設けた電荷転
送手段の第１導電型半導体層と、信号出力手段とを有す
る固体撮像装置において、上記第２導電型の第１半導体
層と第２導電型の第２半導体層とをそれぞれ別に形成し
たことを特徴とする固体撮像装置。 ２、上記第２導電型の第１半導体層は、上記第２導電型
の第２半導体層よりも深く形成されていることを特徴と
する特許請求の範囲第１項に記載した固体撮像装置。 ３、上記第１導電型受光領域半導体層は、第２導電型第
２半導体層よりも深く形成されていることを特徴とする
特許請求の範囲第１項に記載した固体撮像装置。 ４、上記第２導電型の第１半導体層は、その不純物濃度
が、第２導電型の第２半導体層の不純物濃度よりも低く
したものであることを特徴とする特許請求の範囲第１項
または第２項に記載した固体撮像装置。 ５、上記第２導電型の第２半導体層は、第２導電型の第
１半導体層より後に形成されたものであることを特徴と
する特許請求の範囲第１項に記載した固体撮像装置。[Claims] 1. Formed on a part of the surface of the first conductivity type semiconductor substrate,
a plurality of first conductivity type light-receiving region semiconductor layers provided on the surface of the second conductivity type first semiconductor layer; and a second conductivity type second semiconductor layer provided on a part of the surface of the semiconductor substrate. In a solid-state imaging device having a first conductivity type semiconductor layer as a charge transfer means and a signal output means, the first semiconductor layer of the second conductivity type and the second semiconductor layer of the second conductivity type are formed separately. A solid-state imaging device featuring: 2. The solid-state imaging device according to claim 1, wherein the first semiconductor layer of the second conductivity type is formed deeper than the second semiconductor layer of the second conductivity type. 3. The solid-state imaging device according to claim 1, wherein the first conductivity type light-receiving region semiconductor layer is formed deeper than the second conductivity type second semiconductor layer. 4. Claim 1, wherein the first semiconductor layer of the second conductivity type has an impurity concentration lower than that of the second semiconductor layer of the second conductivity type. Or the solid-state imaging device described in Section 2. 5. The solid-state imaging device according to claim 1, wherein the second semiconductor layer of the second conductivity type is formed after the first semiconductor layer of the second conductivity type.
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61134915A JP2613592B2 (en) | 1986-06-12 | 1986-06-12 | Solid-state imaging device |
| US07/058,825 US4814848A (en) | 1986-06-12 | 1987-06-05 | Solid-state imaging device |
| KR1019870005876A KR900007304B1 (en) | 1986-06-12 | 1987-06-10 | Solid state imaging device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61134915A JP2613592B2 (en) | 1986-06-12 | 1986-06-12 | Solid-state imaging device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS62291961A true JPS62291961A (en) | 1987-12-18 |
| JP2613592B2 JP2613592B2 (en) | 1997-05-28 |
Family
ID=15139508
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61134915A Expired - Lifetime JP2613592B2 (en) | 1986-06-12 | 1986-06-12 | Solid-state imaging device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2613592B2 (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62296551A (en) * | 1986-06-17 | 1987-12-23 | Matsushita Electronics Corp | Solid-state image sensing device |
| JPH02122564A (en) * | 1988-10-31 | 1990-05-10 | Nec Corp | Solid-state image sensing element |
| KR100761824B1 (en) | 2004-06-04 | 2007-09-28 | 삼성전자주식회사 | Image sensor and method for manufacturing the same |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58181370A (en) * | 1982-04-16 | 1983-10-24 | Toshiba Corp | Solid-state image pickup device |
| JPS60180160A (en) * | 1984-02-28 | 1985-09-13 | Sony Corp | Solid-state image pickup element |
-
1986
- 1986-06-12 JP JP61134915A patent/JP2613592B2/en not_active Expired - Lifetime
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58181370A (en) * | 1982-04-16 | 1983-10-24 | Toshiba Corp | Solid-state image pickup device |
| JPS60180160A (en) * | 1984-02-28 | 1985-09-13 | Sony Corp | Solid-state image pickup element |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62296551A (en) * | 1986-06-17 | 1987-12-23 | Matsushita Electronics Corp | Solid-state image sensing device |
| JPH02122564A (en) * | 1988-10-31 | 1990-05-10 | Nec Corp | Solid-state image sensing element |
| KR100761824B1 (en) | 2004-06-04 | 2007-09-28 | 삼성전자주식회사 | Image sensor and method for manufacturing the same |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2613592B2 (en) | 1997-05-28 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US4814848A (en) | Solid-state imaging device | |
| US8580595B2 (en) | Solid-state image sensing device and camera system the same | |
| JP3530159B2 (en) | Solid-state imaging device and method of manufacturing the same | |
| US7329557B2 (en) | Method of manufacturing solid-state imaging device with P-type diffusion layers | |
| JPH04355964A (en) | Solid-state image pickup device and manufacture thereof | |
| JPH1098176A (en) | Solid-state image pickup device | |
| JP3000142B2 (en) | Method for manufacturing solid-state imaging device | |
| JP2866328B2 (en) | Solid-state imaging device | |
| US20070069259A1 (en) | CMOS image sensor and method of manufacturing the same | |
| JPH03201478A (en) | Solid-state image sensing device | |
| JPS62291961A (en) | Solid-state image pickup device | |
| KR100748318B1 (en) | Image sensor and method for fabricating the same | |
| JP3481654B2 (en) | Solid-state imaging device | |
| JP3085387B2 (en) | Charge transfer type solid-state imaging device | |
| JPS6223156A (en) | Semiconductor device and manufacture thereof | |
| KR970005946B1 (en) | Charge coupled device | |
| JP2526512B2 (en) | Method of manufacturing solid-state imaging device | |
| JPH07120773B2 (en) | Interline solid-state image sensor | |
| JPS6262067B2 (en) | ||
| JPH0855976A (en) | Ccd image device | |
| JPS622511B2 (en) | ||
| Furumiya et al. | A flattened-pear shaped photodiode structure for low smear and high sensitivity CCD image sensors | |
| KR20010028859A (en) | Solid state image pickup device and method of fabricating the same | |
| JPH04340275A (en) | Solid-state image sensing device | |
| JPH0645583A (en) | Manufacturing method of semiconductor device and solid image pick-up device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EXPY | Cancellation because of completion of term |