JPS62291918A - Selective deposition of metal - Google Patents

Selective deposition of metal

Info

Publication number
JPS62291918A
JPS62291918A JP13652286A JP13652286A JPS62291918A JP S62291918 A JPS62291918 A JP S62291918A JP 13652286 A JP13652286 A JP 13652286A JP 13652286 A JP13652286 A JP 13652286A JP S62291918 A JPS62291918 A JP S62291918A
Authority
JP
Japan
Prior art keywords
film
etching
deposited
contact hole
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13652286A
Other languages
Japanese (ja)
Inventor
Takao Kakiuchi
垣内 孝夫
Hiroshi Yamamoto
浩 山本
Tsutomu Fujita
勉 藤田
Shoichi Tanimura
谷村 彰一
Kosaku Yano
矢野 航作
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP13652286A priority Critical patent/JPS62291918A/en
Publication of JPS62291918A publication Critical patent/JPS62291918A/en
Pending legal-status Critical Current

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  • Electrodes Of Semiconductors (AREA)

Abstract

PURPOSE:To preferably selectively deposit a W without abnormal Si etching by cleaning the surface of a substrate by optical etching in case of selectively depositing a metal on the substrate by a CVD method. CONSTITUTION:After a thermal oxide film 2 is deposited on an Si substrate 1, the film 2 is etched to form a contact hole 3. At this time, a natural oxide film 4 is formed in the hole 3. Then, an etching gas 6 flows while emitting an Hg lamp light 3 to this sample. The film 4 in the hole 3 is removed by the optical etching. When W is selectively deposited on the sample, a W film 7 is deposited with preferable selectivity. When the W film is desired to be thickly deposited, the optical etching is again executed to remove the nucleus of the W on the film 2, a W film 8 is again selectively deposited. Then, the W film of total thickness of 1mum can be formed.

Description

【発明の詳細な説明】 3、発明の詳細な説明 産業上の利用分野 本発明は半導体基板上への金属の選択堆積法に関するも
のである。
DETAILED DESCRIPTION OF THE INVENTION 3. DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a method for selectively depositing metal onto a semiconductor substrate.

従来の技術 第2図に示すのは、従来の半導体基板上への金属の選択
堆積法の一例である。図中9はSi基板、10は熱酸化
膜、11はコンタクトホール、12はコンタクトホール
内の自然酸化膜、13は減圧CVD法でWを堆積した後
のコンタクトホールである。Si基板9上に形成した厚
さ約1/1mの熱酸化膜1oに直径約1μmのコンタク
トホール11を開孔した後に、減圧CVD法によるWF
6ガスとH2ガスの反応を用いて選択的にコンタクトホ
ール内にW膜を堆積することができる。
BACKGROUND OF THE INVENTION FIG. 2 shows an example of a conventional method for selectively depositing metal on a semiconductor substrate. In the figure, 9 is a Si substrate, 10 is a thermal oxide film, 11 is a contact hole, 12 is a natural oxide film in the contact hole, and 13 is a contact hole after W has been deposited by low pressure CVD method. After opening a contact hole 11 with a diameter of about 1 μm in a thermal oxide film 1o with a thickness of about 1/1 m formed on a Si substrate 9, WF is formed by low pressure CVD.
The W film can be selectively deposited in the contact hole using the reaction between 6 gas and H2 gas.

発明が解決しようとする問題点 しかし、このような従来のWの選択堆積法では、コンタ
クトホール内慕自然酸化膜12を除去せずに堆積を行っ
た場合、第2図すに示すようにコンタクトホール内のS
iが異常にエツチングされ、Wがほとんど堆積しないか
あるいは不規則にWが堆積してしまうという現象が起こ
り、プロセス上大きな問題となっていた。
Problems to be Solved by the Invention However, in such a conventional selective deposition method of W, if the deposition is performed without removing the native oxide film 12 inside the contact hole, the contact hole will be removed as shown in FIG. S in the hall
A phenomenon occurs in which i is abnormally etched, and W is hardly deposited or W is deposited irregularly, which poses a major problem in the process.

また自然酸化膜を金属の堆積と同一チャンバー内でプラ
ズマクリーニングする方法も考えられているが、熱酸化
膜の表面にプラズマダメージが入り熱酸化膜上にもWが
堆積してしまうという欠点があった。
A method of plasma cleaning the natural oxide film in the same chamber as the metal deposition has also been considered, but this method has the disadvantage that plasma damage may occur on the surface of the thermal oxide film and W may also be deposited on the thermal oxide film. Ta.

本発明はかかる点に2みてなされたもので、簡易な構成
でSiの異常エツチングの起こらない、良好なWの選択
堆積法を提供することを目的としている。
The present invention has been made in view of these points, and an object of the present invention is to provide a method for selectively depositing W that has a simple structure and does not cause abnormal etching of Si.

問題点を解決するための手段 本発明は上記問題点を解決するため、CVD法による基
板表面への金属の選択堆積に際し、金属を堆積する反応
室と同一反応室内で前記基板表面を光エッチングを用い
てクリーニングすることによって、Siの異常エツチン
グの起こらない良好なWの選択堆積法を提供するもので
ある。
Means for Solving the Problems The present invention solves the above problems by photo-etching the substrate surface in the same reaction chamber as the one in which the metal is deposited when selectively depositing metal on the substrate surface by the CVD method. The present invention provides an excellent selective deposition method for W that does not cause abnormal etching of Si by cleaning using the wafer.

作用 本発明は上記した構成により、金属の堆積を行う直前に
コンタクトホール内の自然酸化膜が除去されるため、コ
ンタクトホール内のSiが異常にエツチングされる心配
が無い。
Operation According to the present invention, with the above-described structure, the natural oxide film in the contact hole is removed immediately before metal deposition, so there is no fear that the Si in the contact hole will be abnormally etched.

実施例 第1図は本発明の金属の選択堆積法の一実施例である。Example FIG. 1 shows an embodiment of the selective metal deposition method of the present invention.

図中1は半導体Si基板、2は厚さ約1μmの熱酸化膜
、3はコンタクトホール、4はコンタクトホール内の自
然酸化膜、6はHgランプ光、6はIF、等のエツチン
グガス、7及び8は厚さ約5000人のW膜である。
In the figure, 1 is a semiconductor Si substrate, 2 is a thermal oxide film with a thickness of about 1 μm, 3 is a contact hole, 4 is a natural oxide film in the contact hole, 6 is Hg lamp light, 6 is an etching gas such as IF, 7 and 8 is a W film with a thickness of approximately 5000 mm.

第1図&のように作製した試料を光エッチングのできる
チャンバーに入れ、第1図すに示すように、Hg ラン
プ光5を照射しながらエツチングガス6(例えばIF、
等)を流す。この光エッチングによってコンタクトホー
ル内の自然酸化膜4が除去され、第1図Cの様な状態と
なる。この試料をチャンバーから出さずにWF6ガス及
びH2ガスを用いてWの選択堆積を行うと、第1図dの
様に、選択性の良好な約5ooo人のW膜7の堆積を行
うことができる。
The sample prepared as shown in FIG.
etc.). This photo-etching removes the natural oxide film 4 within the contact hole, resulting in a state as shown in FIG. 1C. If W is selectively deposited using WF6 gas and H2 gas without taking this sample out of the chamber, it is possible to deposit approximately 500 W film 7 with good selectivity, as shown in FIG. 1d. can.

更に厚くW膜を堆積したい場合には第1図eに示すよう
に再び光エッチングを行い、熱酸化膜2上のWの核を除
去した後、再びWF6ガス及びH2ガスを用いてWの選
択堆積を行うと、第1図fに示す様に約5ooo人のW
膜8の堆積を行うことができ、トータルのW膜厚は1μ
mとなる。またこのエツチングと堆積の2つの工程を交
互てくり返すことにより、更に厚いW膜の堆積も可能で
ある。
If it is desired to deposit an even thicker W film, photo-etching is performed again as shown in FIG. When the deposition is carried out, about 500 people's W is deposited as shown in Figure 1 f.
Film 8 can be deposited, and the total W film thickness is 1 μm.
m. Further, by repeating the two steps of etching and deposition alternately, it is possible to deposit an even thicker W film.

なお、本実施例においては基板としてSi基板を用い、
直接Si表面へのWの選択堆積を行ったが、Si表面以
外の表面、例えばT1やAJ又はW等の金属が露出した
表面であっても同様な効果が得られる。また絶縁膜とし
て熱酸化膜を用いたが、PSG膜、HTI)膜、 5x
sNa膜等ノ他ノ絶縁膜を用いても同様の効果が得られ
る。また基板材料として例えばGδ1人S等のSi以外
の材料を用いても良いことはもちろんである。
Note that in this example, a Si substrate is used as the substrate,
Although W was selectively deposited directly on the Si surface, similar effects can be obtained on surfaces other than the Si surface, for example, on surfaces where metals such as T1, AJ, or W are exposed. In addition, a thermal oxide film was used as the insulating film, but PSG film, HTI) film, 5x
Similar effects can be obtained by using other insulating films such as sNa film. It goes without saying that materials other than Si, such as Gδ1S, may be used as the substrate material.

更に本実施例においては光源としてHgランプを用いた
が、レーザ光を用いることも可能である。
Furthermore, although an Hg lamp was used as a light source in this embodiment, it is also possible to use a laser beam.

本実施例では光によるエツチングを用いたが、プラズマ
やスパッタを用いる方法では熱酸化膜2上にダメージが
加わり、Wの核の成長を促進してしまうので適当ではな
い。
In this embodiment, optical etching is used, but methods using plasma or sputtering are not suitable because they damage the thermal oxide film 2 and promote the growth of W nuclei.

更に光によってコンタクトホールをクリーニングするこ
とにより、良好なコンタクト抵抗を安定して得ることが
できる。
Furthermore, by cleaning the contact hole with light, good contact resistance can be stably obtained.

発明の効果 以上述べてきたように本発明によれば、きわめて簡易な
構成で非常に良好な金属の選択堆積を行うことができ、
実用上極めて有用である。
Effects of the Invention As described above, according to the present invention, very good selective deposition of metal can be performed with an extremely simple configuration.
It is extremely useful in practice.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例におけるWの選択堆積法を示
す工程断面図、第2図は従来のWの選択堆積法を示す工
程断面図である。 1・・・・・・Si基板、2・・・・・・熱酸化膜、3
・・・・・・コンタクトホール、4・・・・・・自然酸
化膜、6・・・・・・Hgランプ光、6・・・・・・エ
ツチングガス、7.8・・・・・・W膜。 代理人の氏名 弁理士 中 尾 敏 男 ほか1名第1
図 U)) 第1図 (C) (ci’) 第1図 (e) (ヂ) 第2図 (α〕 (b)
FIG. 1 is a process cross-sectional view showing a W selective deposition method according to an embodiment of the present invention, and FIG. 2 is a process cross-sectional view showing a conventional W selective deposition method. 1... Si substrate, 2... Thermal oxide film, 3
...Contact hole, 4...Natural oxide film, 6...Hg lamp light, 6...Etching gas, 7.8... W membrane. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
Figure U)) Figure 1 (C) (ci') Figure 1 (e) (ji) Figure 2 (α) (b)

Claims (2)

【特許請求の範囲】[Claims] (1)CVD法による基板表面への金属の選択堆積に際
し、前記基板表面に絶縁膜を堆積した後、前記絶縁膜を
エッチングして前記半導体基板表面に達するコンタクト
ホールを形成する工程と、前記絶縁膜表面及び前記コン
タクトホール内を光を用いてエッチングする工程と、前
記エッチングの後に、前記コンタクトホール内に金属を
堆積する工程とを有してなる金属の選択堆積法。
(1) When selectively depositing metal on the surface of a substrate by CVD, a step of depositing an insulating film on the surface of the substrate and then etching the insulating film to form a contact hole reaching the surface of the semiconductor substrate; A selective metal deposition method comprising the steps of: etching a film surface and the inside of the contact hole using light; and depositing metal inside the contact hole after the etching.
(2)金属の堆積後に再び絶縁膜表面及びコンタクトホ
ール内を光を用いてエッチングする工程と、前記エッチ
ングの後に前記コンタクトホール内に金属を堆積する工
程とを交互に行う特許請求の範囲第1項記載の金属の選
択堆積法。
(2) The step of etching the insulating film surface and the inside of the contact hole again using light after the metal is deposited, and the step of depositing the metal inside the contact hole after the etching are performed alternately. Selective deposition method of metals as described in Section.
JP13652286A 1986-06-12 1986-06-12 Selective deposition of metal Pending JPS62291918A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13652286A JPS62291918A (en) 1986-06-12 1986-06-12 Selective deposition of metal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13652286A JPS62291918A (en) 1986-06-12 1986-06-12 Selective deposition of metal

Publications (1)

Publication Number Publication Date
JPS62291918A true JPS62291918A (en) 1987-12-18

Family

ID=15177145

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13652286A Pending JPS62291918A (en) 1986-06-12 1986-06-12 Selective deposition of metal

Country Status (1)

Country Link
JP (1) JPS62291918A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02187021A (en) * 1989-01-13 1990-07-23 Sharp Corp Manufacture of semiconductor device
JPH02268425A (en) * 1989-04-10 1990-11-02 Toshiba Corp Manufacture of semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02187021A (en) * 1989-01-13 1990-07-23 Sharp Corp Manufacture of semiconductor device
JPH02268425A (en) * 1989-04-10 1990-11-02 Toshiba Corp Manufacture of semiconductor device

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