JPS62287388A - Ic card - Google Patents

Ic card

Info

Publication number
JPS62287388A
JPS62287388A JP61130331A JP13033186A JPS62287388A JP S62287388 A JPS62287388 A JP S62287388A JP 61130331 A JP61130331 A JP 61130331A JP 13033186 A JP13033186 A JP 13033186A JP S62287388 A JPS62287388 A JP S62287388A
Authority
JP
Japan
Prior art keywords
memory
card
timer
microprocessor
contact
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP61130331A
Other languages
Japanese (ja)
Inventor
Masumi Ozawa
小澤 益己
Keiji Kokubu
国分 啓嗣
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NIPPON DENKI DATA KIKI KK
NEC Corp
Original Assignee
NIPPON DENKI DATA KIKI KK
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NIPPON DENKI DATA KIKI KK, NEC Corp filed Critical NIPPON DENKI DATA KIKI KK
Priority to JP61130331A priority Critical patent/JPS62287388A/en
Publication of JPS62287388A publication Critical patent/JPS62287388A/en
Pending legal-status Critical Current

Links

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  • Credit Cards Or The Like (AREA)
  • Storage Device Security (AREA)

Abstract

PURPOSE:To prevent a lost IC card from being used illegally when a person other than the regular owner obtains the card by erasing specific data stored in a memory when a timer counts up to its initial value. CONSTITUTION:A battery mechanism 13 supplies power to a microprocessor 11 and the memory 12 through a power supply line 17 when the microprocessor 11 is not supplied with power from outside after transmitting data forward and backward between the memory 12 and the outside through a data bus 15 and an address bus 16, so that the IC card 10 operates by itself. A timer mechanism 14 when there is access sets the timer value to the initial value and monitors the timer value, thereby erasing the specific data in the memory when the timer value reaches the certain time.

Description

【発明の詳細な説明】 3、発明の詳細な説明 〔産業上の利用分野〕 本発明はICカードだ関する。[Detailed description of the invention] 3. Detailed description of the invention [Industrial application field] The present invention relates to an IC card.

〔従来の技術〕[Conventional technology]

従来、この種のICカードは、特定のデータが半永久的
に残る構成になっていた。
Conventionally, this type of IC card has a structure in which specific data remains semi-permanently.

〔発明か解決しようとする間層点〕[Interlayer point to be invented or solved]

上述した従来のICカードは、半永久的に特定データが
残る為、正規の所有者以外の者だ悪用されるという欠点
がある。
The above-mentioned conventional IC cards have the disadvantage that specific data remains semi-permanently, so that they can be misused by anyone other than the authorized owner.

プロセッサと、電気的に書き換え可能なメモリと。A processor and electrically rewritable memory.

電源電圧を供給する第1の接点と、り07りを供給する
第2の接点と、データ信号を交換する第3の接点とをプ
ラスチック基板内に封入したICカードにおいて、上記
マイクロプロセッサ及ヒ上記源 メモリの両方あるいはいずれが一方の電〆供給を可能と
するための電池機構と、初期にセットされたタイマ値を
監視してこのタイマ値が一定時間経過後に上記メモリに
格納されて込る特定データを消去するタイマ機構とを含
むことを特徴とする特〔実施例〕 以下9本発明の実施例について図面を参照して説明する
An IC card in which a first contact for supplying a power supply voltage, a second contact for supplying voltage, and a third contact for exchanging data signals are enclosed in a plastic substrate, and the microprocessor and the above-mentioned A battery mechanism that enables both or any of the source memories to supply power to one of them, and a battery mechanism that monitors an initially set timer value and stores this timer value in the memory after a certain period of time has elapsed. [Embodiments] Nine embodiments of the present invention will be described below with reference to the drawings.

第1図を参照すると2本発明によるICカードの一実施
例の構成がブロック図によシ示されている。第1図にお
いて、ICカード10は、マイクロプロセッサ−1を有
し、電気的に書き換え可能なメモリー2とデータバス1
5及びアドレスバス16を介して接続されでいる。又、
マイクロプロセッサ−1は、 I/Qライン用接点接点
18セット用接点19.クロック供給用接点20.及び
電源供給用接点21を通して外部接続される。
Referring to FIG. 1, the configuration of an embodiment of an IC card according to the present invention is shown in a block diagram. In FIG. 1, an IC card 10 has a microprocessor 1, an electrically rewritable memory 2, and a data bus 1.
5 and an address bus 16. or,
The microprocessor-1 has 18 sets of I/Q line contacts and 19 contacts. Clock supply contact 20. and externally connected through the power supply contact 21.

更に1本実施例のICカード10は、電池機構13とタ
イマ機構14を含む。電池機構13は。
Furthermore, the IC card 10 of this embodiment includes a battery mechanism 13 and a timer mechanism 14. The battery mechanism 13 is.

マイクロプロセッサ11がメモリー2との間でデ−タバ
ス15及びアドレスバスxtを通して外部とデータ交換
を行った後、外部から電源供給が行なわれなくなった時
に電源供給ライン17を通してマイクロプロセッサ−1
とメモリー2へ電源を供給して、rcカードlO単体で
能動動作可能にするものである。
After the microprocessor 11 exchanges data with the memory 2 through the data bus 15 and the address bus xt, when power is no longer supplied from the outside, the microprocessor 1
It supplies power to the memory 2 and enables active operation of the rc card IO by itself.

第2図を参照すると、第1図のタイマ機構14の動作を
説明するフローチャートが示されている。
Referring to FIG. 2, a flowchart illustrating the operation of the timer mechanism 14 of FIG. 1 is shown.

タイマ機構14は、アクセスが有る(ステップ100の
ygs )と、タイマ値を初期値にセットしくステップ
101)、タイマ値を監視して(ステップ102)、こ
のタイマ値が一定時間経過後(ステンf103のYES
 )に、メモリ12内に格納されている特定データを消
去する(ステップ104)ものである。
When the timer mechanism 14 is accessed (ygs in step 100), it sets the timer value to the initial value (step 101), monitors the timer value (step 102), and sets the timer value to the initial value after a certain period of time has elapsed (step f103). YES
), the specific data stored in the memory 12 is erased (step 104).

゛ 〔発明の効果〕 以上の説明で明らかなように2本発明によれば。゛ [Effects of the invention] As is clear from the above description, there are two aspects of the present invention.

初期のタイマ値がカウントアツプすることによりメモリ
内だ格納された特定データを消去するようにしているの
で、ICカードを紛失して正規の所有者以外に渡った時
でも悪用される心配がなくなるという効果がある。
As the initial timer value counts up, specific data stored in the memory is erased, so there is no need to worry about it being misused even if the IC card is lost and handed over to someone other than its authorized owner. effective.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明によるICカードの一実施例の構成を示
したブロック図、第2図は第1図のタイマ機構の動作を
説明する為のフローチャートである。 10・・・ICカード、11・・・マイクロプロセッサ
12・・・メモリ、13・・・電池機構、14・・・タ
イマ機構、15・・・デルタパス、16・・・アドレス
バス。 17・・・電源供給ライン、18・・・I10ライン用
接点19・・・リセット用接点、20・・・クロック供
給用接点、21・・・電源供給用接点。
FIG. 1 is a block diagram showing the configuration of an embodiment of an IC card according to the present invention, and FIG. 2 is a flowchart for explaining the operation of the timer mechanism shown in FIG. DESCRIPTION OF SYMBOLS 10... IC card, 11... Microprocessor 12... Memory, 13... Battery mechanism, 14... Timer mechanism, 15... Delta path, 16... Address bus. 17... Power supply line, 18... I10 line contact 19... Reset contact, 20... Clock supply contact, 21... Power supply contact.

Claims (1)

【特許請求の範囲】[Claims] 1. 少なくとも、マイクロプロセッサと、電気的に書
き換え可能なメモリと、電源電圧を供給する第1の接点
と、クロックを供給する第2の接点と、データ信号を交
換する第3の接点とをプラスチック基板内に封入したI
Cカードにおいて、前記マイクロプロセッサ及び前記メ
モリの両方あるいはいずれか一方の電源供給を可能とす
るための電池機構と、初期にセットされたタイマ値を監
視して該タイマ値が一定時間経過後に前記メモリに格納
されている特定データを消去するタイマ機構とを含むこ
とを特徴とするICカード。
1. At least a microprocessor, an electrically rewritable memory, a first contact for supplying a power supply voltage, a second contact for supplying a clock, and a third contact for exchanging data signals are arranged in a plastic substrate. I enclosed in
The C card includes a battery mechanism for supplying power to both or one of the microprocessor and the memory, and a battery mechanism that monitors an initially set timer value and returns the memory to the memory after a predetermined period of time has elapsed. An IC card characterized by comprising a timer mechanism for erasing specific data stored in the IC card.
JP61130331A 1986-06-06 1986-06-06 Ic card Pending JPS62287388A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61130331A JPS62287388A (en) 1986-06-06 1986-06-06 Ic card

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61130331A JPS62287388A (en) 1986-06-06 1986-06-06 Ic card

Publications (1)

Publication Number Publication Date
JPS62287388A true JPS62287388A (en) 1987-12-14

Family

ID=15031803

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61130331A Pending JPS62287388A (en) 1986-06-06 1986-06-06 Ic card

Country Status (1)

Country Link
JP (1) JPS62287388A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01280891A (en) * 1988-05-06 1989-11-13 Toppan Printing Co Ltd Ic card
JPH0545675U (en) * 1991-11-26 1993-06-18 株式会社ニコン Date information recording module and camera to which date information recording module can be attached
US5870477A (en) * 1993-09-29 1999-02-09 Pumpkin House Incorporated Enciphering/deciphering device and method, and encryption/decryption communication system
JP2006268336A (en) * 2005-03-23 2006-10-05 Nec Corp External storage medium management system and management method for external storage medium
JP2006338583A (en) * 2005-06-06 2006-12-14 Advance Design Corp Storage medium for computer terminal
WO2008068908A1 (en) * 2006-12-04 2008-06-12 Eugrid Inc. Information processing device and information management program

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01280891A (en) * 1988-05-06 1989-11-13 Toppan Printing Co Ltd Ic card
JPH0545675U (en) * 1991-11-26 1993-06-18 株式会社ニコン Date information recording module and camera to which date information recording module can be attached
US5870477A (en) * 1993-09-29 1999-02-09 Pumpkin House Incorporated Enciphering/deciphering device and method, and encryption/decryption communication system
JP2006268336A (en) * 2005-03-23 2006-10-05 Nec Corp External storage medium management system and management method for external storage medium
US7844790B2 (en) 2005-03-23 2010-11-30 Nec Corporation System and method for management of external storage medium
JP4734986B2 (en) * 2005-03-23 2011-07-27 日本電気株式会社 EXTERNAL STORAGE MEDIUM MANAGEMENT SYSTEM AND EXTERNAL STORAGE MEDIUM MANAGEMENT METHOD
JP2006338583A (en) * 2005-06-06 2006-12-14 Advance Design Corp Storage medium for computer terminal
JP4680686B2 (en) * 2005-06-06 2011-05-11 アドバンス・デザイン株式会社 Storage medium for computer terminal
US8234717B2 (en) 2006-04-12 2012-07-31 Eugrid, Inc. Accessing and checking the validity of control information stored in external storage
WO2008068908A1 (en) * 2006-12-04 2008-06-12 Eugrid Inc. Information processing device and information management program
US8601282B2 (en) 2006-12-04 2013-12-03 Eugrid Inc. Program and device for using second uncorrupted MBR data stored in an external storage

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