JPS62282335A - Interruption device - Google Patents

Abstract

PURPOSE:To speed up the speed corresponding to the software interruption by starting the interruption processing routine corresponding to a value of a variable stored in a register without intervention of the software. CONSTITUTION:The 1st interruption type number (i) and the base address of the 2nd interruption point table obtained from the 1st interruption pointer table are stored in a base address register 4. A selector 6 inputs a value of the 2nd interruption type number (j) being the content of a general-purpose Rk selected among plural general-purpose register 5 and a base address of the 2nd interruption pointer table stored in the base address register 4 into the 2nd address generating means 7 according to the identification code of the general-purpose register stored in an instruction register 2. In generating the 2nd interruption vector table address, the interruption entry pointer of the types i, j is decided, which is set into a program counter 1 to start the interruption processing routine.

Description

Detailed Description of the Invention 3. Detailed Description of the Invention Field of Industrial Application The present invention relates to an interrupt device for a digital computer.

BACKGROUND ART FIG. 3 shows a configuration diagram of a conventional interrupt device.
FIG. 4 is an interrupt pointer table of the conventional example.

First, when a software interrupt (represented by "INT i") occurs, the interrupt type number i set in the instruction register 2o is sent from the memory to the address generating means 3.
0 to generate the interrupt vector table address.
As shown in "How to use 86" [Ohmsha], 1AP
In X86, the interrupt entry pointer is 4 bytes, and the base address is address 0, so multiply the interrupt type number i by 4 (shift 2 pinpoints to the left) to set the interrupt pointer in the memory indicated by this address. The entire table is accessed, the type i interrupt entry pointer is set in the program counter 10, and the interrupt processing routine is started.

Problems to be Solved by the Invention However, in the above configuration, for example, in the case of software interrupts, one interrupt type is shared by multiple interrupt handling routines, and the corresponding If you want to start an interrupt processing routine, you must use software to determine all register contents at the beginning of the interrupt processing routine and branch to the corresponding processing routine. The problem was that it was slow.

In view of this point, it is an object of the present invention to provide an interrupt device for increasing the speed of responding to interrupt processing in the above-mentioned cases.

Means for Solving the Problems The present invention provides a first interrupt type number when a software interrupt is generated that specifies the identification code of a general-purpose register in which a first interrupt type number and a second interrupt type number are set. A base address register that stores the base address of the second interrupt pointer table obtained from the number and the first interrupt pointer table, a plurality of general-purpose registers in which the second interrupt type number is set, and a general-purpose register identification code. a selector that selects one of the plurality of general-purpose registers and outputs the contents of the selected general-purpose register; and a base address of a second interrupt pointer table stored in the base address register and output from the selector. and second address generation means for inputting a second interrupt type number e to generate a second interrupt vector table address.

Effect: With the above-described configuration, the present invention uses the base address of the second interrupt pointer table obtained from the first interrupt pointer table and the second interrupt type number, which is the content of the general-purpose register selected by the selector, in the second interrupt pointer table. 2
The second interrupt vector table address is obtained by accessing the second interrupt pointer table using this address, the obtained interrupt entry pointer is set in the program counter, and the interrupt processing routine is started. .

Embodiment FIG. 1 shows a block diagram of an interrupt device in an embodiment of the present invention.

In FIG. 1, 1 is a program counter that indicates the address of the instruction being executed, 2 is an instruction register that stores the instruction code on memory that is obtained by accessing the value of program counter 1, and 3 is a program counter that indicates the address of the instruction being executed. Occasionally,
a first address generation means for inputting the first interrupt type number stored in the instruction register 2 and generating an interrupt vector table address of the first interrupt pointer table; 4b; output of the first address generation means 3; The first
6 is a base address register that stores the base address of the second interrupt pointer table obtained by accessing the first interrupt pointer table with the interrupt vector table address of 6; A general-purpose register 6 is a selector that selects one of the plurality of general-purpose registers 6 according to the general-purpose register identification code stored in the instruction register 2, and outputs the contents of the selected general-purpose register.7 is a selector 6. A second address generating means inputs the second interrupt type number outputted from the base address register 4 and the base address of the second interrupt pointer table stored in the base address register 4, and generates a second interrupt vector table address. be.

The operation of the interrupt device of this embodiment configured as described above will be explained below using the first and second interrupt pointer tables shown in FIG. When a software interrupt (for example, expressed as 'I NT i , Rk' and the contents of general-purpose register Rk is j) that specifies the general-purpose register salt in which the first interrupt type number and the second interrupt type number are set occurs, , type i is determined from the value of the first interrupt type number i in the same way as in the conventional example.
In this embodiment, the obtained pointer indicates the base address of the second interrupt pointer table and is stored in the pace address register 4.

Next, the selector 6 selects the value of the second interrupt type number j, which is the content of the general-purpose register Rk selected from the plurality of general-purpose registers 5, according to the identification code of the general-purpose register stored in the instruction register 2. , the base address of the second interrupt pointer table stored in the base address register 4 is input to the second address generation means 5 to generate a second interrupt vector table address.

In this case, for example, if we consider a microcomputer equivalent to 1APX86 as in the conventional example, the second address generation means 5 multiplies the second interrupt type number j by 4 (shifts 2 bits to the left) and generates the second interrupt type number j. The process is to add it to the base address of the pointer table. From the second interrupt vector table address which is the output of the second address generation means 5, type i+3
The interrupt processing routine starts by determining the interrupt entry pointer and setting this value in program counter 1.

As described above, when using the software interrupt according to this embodiment, depending on the value of the variable stored in a certain register,
A corresponding interrupt processing routine can be activated without software intervention.

Note that as the contents of the first interrupt pointer table in this embodiment, as in the conventional example, an interrupt entry pointer may be directly stored and a conventional software interrupt may be issued.

As described in detail, according to the present invention, the speed at which software interrupts can be handled can be increased, and the practical effects thereof are significant.

[Brief explanation of drawings]

FIG. 1 is a block diagram of an interrupt device according to an embodiment of the present invention, and FIG. 2 is a block diagram of an interrupt device according to an embodiment of the present invention. FIG. 3 is an explanatory diagram of the second interrupt pointer table, FIG. 3 is a configuration diagram of a conventional interrupt device, and FIG. 4 is an explanatory diagram of the interrupt pointer table in the conventional interrupt device. 1...Program counter, 2...Instruction register, 3...First address generation means,
4...Pace address register, 5...
- General purpose register, 61. . ...Selector, 7...Second address generation means. Figure 1 Figure 2 Figure 3 Figure 4

Claims (1)

[Claims] a program counter that indicates the address of the instruction being executed; an instruction register that stores an instruction code on memory obtained by accessing the value of the program counter; and a program counter that is connected to the instruction register and that when a software interrupt occurs,
a first address generating means for inputting a first interrupt type number stored in the instruction register and generating an interrupt vector table address of a first interrupt pointer table; and an output of the first address generating means. 1st
A base address register that stores the base address of the second interrupt pointer table obtained by accessing the first interrupt pointer table with the interrupt vector table address of , and multiple general-purpose registers that set the second interrupt type number. a register, a selector that selects one of the plurality of general-purpose registers according to a general-purpose register identification code stored in the instruction register and outputs the contents of the selected general-purpose register; the selector and the base address register; a second interrupt vector table address, which is connected to the selector and inputs a second interrupt type number that is the output of the selector and a base address of the second interrupt pointer table stored in the base address register, and generates a second interrupt vector table address. and address generation means, and sets an interrupt entry pointer obtained by accessing using the second interrupt vector table address to the program counter.