JPS62280667A - Fault diagnosing device - Google Patents

Abstract

PURPOSE:To diagnose even a circuit board whose operation changes every time measurement is taken by extracting operation data which meet specific requirements among respective operation data on a reference side and respective operation data on a side to be diagnosed and performing a comparative decision. CONSTITUTION:A processing part 14 is equipped with an input circuit 16, a write control circuit 28, an address counter 19, a data memory 20, a RAM 21, a display circuit 22, and a CPU 23. Then, the CPU23 connects probes 13a and 13d to reference and diagnosed circuit substrates 11a and 11b and stores all of obtained operation data on the reference side and side to be diagnosed temporarily. Then, operation data which meet requirements of data extraction are extracted among the operation data on the reference side and the operation data on the side to be diagnosed during diagnosing operation and compared and decided to diagnose whether a circuit board 11b to be diagnosed operates normally or not.

Description

Detailed Description of the Invention 3. Detailed Description of the Invention (Field of Industrial Application) The present invention relates to a failure diagnosis device for diagnosing whether electronic devices such as digital circuit boards are operating correctly.

(Prior Art) Conventionally, as a Mi disorder diagnosis IFium for diagnosing whether a digital machine or the like is operating correctly, a comparison method is known.

As shown in FIG. 5, this system is configured by connecting a plurality of probes 1a to 1d and each of these probes 1a to 1d to a properly operating digital circuit board (reference circuit board) 2a, A reference data storage unit 3 stores operating data (reference data) obtained when operating the probe 2a, and each of the probes 1a to 1d is connected to a digital circuit board to be diagnosed (circuit board to be diagnosed>2b). A diagnostic data storage unit 4 that stores operational data (1/i diagnostic data) obtained when the circuit board 2b is connected and operated, and each of these data storage units 3.4 stores data therein. Comparison unit 5 that compares the reference data and the diagnosed data
and a display section 6 for displaying the comparison result of the comparison section 5, and if the reference data and the data to be diagnosed match, it is determined that the circuit board to be diagnosed 2b is normal; If these data do not match, it is determined that the circuit board 2b to be diagnosed is at fault.

(Problems to be Solved by the Invention) Conventionally, in this type of failure diagnosis device, the operating state of the reference circuit board 2a and the operating state of the circuit board to be diagnosed 2b are all taken in, and these operations are calculated by lυ. Since the circuit board 2b to be diagnosed is normal or not is diagnosed based on whether all the states match, the problem is that it is not possible to diagnose the failure of a circuit board whose operation changes every time a measurement is performed. was there.

In view of the above circumstances, it is an object of the present invention to provide a fault diagnosis device capable of diagnosing not only ordinary circuit boards but also circuit boards whose operation changes each time a measurement is performed.

(Means for Solving the Problems) In order to solve the above problems, the failure diagnosis device according to the present invention uses reference data obtained by operating a reference electronic device and operating an electronic device to be diagnosed. Failure diagnosis for diagnosing whether the electronic device to be diagnosed is operating correctly by comparing the obtained data to be diagnosed [In the i device, a storage unit that captures and stores the operating data of each of the electronic devices; a reference data extraction unit that extracts, as reference data, data that satisfies data extraction conditions from each measurement data of the reference electronic device stored in the storage unit; and a diagnostic target electronic device stored in the storage unit. a diagnostic data extraction section that extracts data that satisfies the data extraction conditions from each measurement data as diagnostic data; The present invention is characterized by comprising a diagnostic section that compares the diagnostic data with diagnostic data to determine whether the electronic device to be diagnosed is operating correctly.

(Embodiment) FIG. 1 is a circuit block diagram showing an embodiment of a failure diagnosis device according to the present invention.

The failure diagnosis shown in this figure is based on the reference circuit board 11a,
All the operating data obtained when the circuit board to be diagnosed 11b is operated is once stored, and then, from among these operating data, those that satisfy the conditions input in advance are selectively extracted and compared. By this, the circuit board to be diagnosed 1
The keyboard 12 and the probes 138 to 1 are configured to diagnose whether the keyboard 1b is operating properly.
3d, a processing section 14, and a display device 15.

The keyboard 12 is equipped with various keys necessary to operate this failure diagnosis device, and generates a signal (key input signal @) according to the operated key, and supplies this to the processing section 14 .

Further, the probes 13a to 13d are connected to the reference circuit board 11a (
Alternatively, a desired location (for example,
each circuit board 11a obtained by each of these probes 13a to 13d.

Each signal 81 to S4 of 11b is supplied to the processing section 14.

Further, the display device t15 includes a CRT (cathode ray tube) display, an LCD (liquid crystal) display, etc., and the processing unit 14
When the display data is supplied from , it is displayed on the screen.

The processing unit 14 includes an input circuit 16, an abuse control circuit 18, an address counter 19, a data memory 20, and an RA.
Each of the circuit boards 11a includes an M21, a display circuit 22, and a CPLJ23.

11b, each operation data on the reference side obtained by connecting each probe 13a to 13d and each operation data on the diagnosed side are all stored once, and at the time of diagnosis IIi, each operation data on the reference side and each operation data on the diagnosed side are stored. By extracting data that satisfies the data extraction conditions from among the operation data on the side and comparing and determining these data, it is diagnosed whether or not the circuit board to be diagnosed 11b operates correctly.

The input circuit 16 includes a bluff memory that temporarily stores the key input signals supplied from the keyboard 12, and when supplied with a readout signal from the CPU 23, sequentially reads out the key input signals stored in the bluff memory. and supplies this to the CPLI23.

The write control circuit 18, as shown in FIG.
A latch circuit 24 that latches the activation signal S6 when it is supplied from 23, a timing generation circuit 25 that oscillates at a predetermined period and outputs a clock signal S7, and the outputs of these latch circuits 24 and the timing generation circuit. and an AND gate 27 that performs logical product with the output of 25.
When the activation signal S6 is supplied from the CPU 23, it is latched and when the timing generation circuit 25 generates the clock signal S7, it is outputted from each output terminal 188.18b.In this case, from the output terminal 18a The output clock signal S7 is sent to the data memory 2 as an m-input signal S8.
The clock signal @87 which is supplied to 0 and output from the output terminal 18b is supplied to the address counter 19 as a count signal S.

The address counter 19 is configured to increment its count value every time the count signal S9 is supplied, and the number of shadows obtained here is supplied to the data memory 20 as an n-bit address signal AD. Ru.

Further, the data memory 20 is equipped with a 4-bit semiconductor RAM, etc., and when the store signal S8 is supplied, it takes in each of the signals 81 to S4, and uses this as measurement data to be used as the data specified by the address signal AD. Enter 1 in the address. Then, when supplied with a read signal and a read address signal from the CPU 23, the data memory 20 reads out the measurement data stored at the address specified by the address signal and supplies it to the CPU 23.

Further, the RAM 21 is a memory used as a work area of the CPIJ 23, and when the operation measurement of the reference circuit board 11a is completed, the measurement data etc. stored in the data memory 20 are transferred to this RAM 21 by the CPU 23.
J! in this RAM 21 as shown in FIG.
It is stored in the quasi-side data storage area 17. Further, during diagnosis, if data extraction conditions are input from the keyboard 12, the CPU 23 creates diagnostic condition data from the data extraction conditions and stores this in the diagnostic condition storage area 26 of the RAM 21.

The display circuit 22 is configured to convert data sent from the CPLJ 23 into display data, and the display data obtained here is supplied to the display device 415 and displayed.

Further, the CPU 23 is constituted by, for example, a microprocessor, and controls each part of the circuit.

Next, the operation of this embodiment will be explained with reference to the flowchart shown in FIG.

First, when diagnosing a new circuit board to be diagnosed 11b, prior to diagnosing this circuit board to be diagnosed 11b, the operation data collection work of the reference circuit board 11a described below is carried out.
# is done.

In this data collection operation, first in step STI, the operator places each probe 13a to 13d on the reference circuit single plate 11a.
Connect to.

Thereafter, in step ST2, the operator activates the standard circuit board 11a and inputs the registration command ``REF'' from the keyboard 12, which is detected by the CPU 23 via the input circuit 16, and the write control circuit 1
8 is supplied with an activation signal S6.

As a result, when the write control circuit 18 starts up and the internal timing generation circuit 25 generates the clock signal S7, it outputs the first write signal S8 and supplies it to the data memory 20. , outputs the first count signal S9 and supplies it to the address counter 19. As a result, the data memory 20 takes in the signals 81 to S4 obtained by the probes 138 to 13d, and writes them as measurement data at an address determined by the address signal AD of the address counter 19.

After this, the value of the address signal AD output by the address counter 19 is incremented.

Thereafter, each time the write control circuit 18 outputs the write signal S8 and the count signal S9, the above-mentioned operation is repeated, and the data memory 20 is filled with the measured data, so that the data memory 20 becomes full. When the state of
The write I/II control circuit 18 no longer outputs the interrupt signal 88 and the count signal S9, and the measurement data collection operation ends.

When this measurement data collection is completed, the CPU 2
3 transfers all measurement data stored in the data memory 20 to the RAM 21 and stores it therein.

Next, in step ST3, this IS is set by the operator.
Q! After the probes 138 to 13d are removed from the circuit board 11a, the operation data collection operation of the circuit board to be diagnosed 11b described below is performed.

In this data collection operation, first, in step ST4, the operator attaches each probe 138 to the circuit board to be diagnosed 11b.
~13d are connected.

Thereafter, in step ST5, the operator activates the circuit board to be diagnosed 11b and inputs the data input command ``DTA'' from the keyboard 12, and the CPCI 23 detects this via the input circuit 16. A starting signal S6 is supplied to the agricultural ti111!1 circuit 18.

As a result, writing 1i is performed in the same manner as the operation data collection operation performed on the reference circuit board 11a.
11@Circuit 18 sends a favor signal @S8 and a count signal $9
Each time the oscilloscope 11 outputs the oscillator 11, the signals 81 to S4 obtained from the base 11b of the mouth to be diagnosed are sequentially stored in the data memory 20 as measurement data.

When the data memory 20 becomes full, the 1-load control circuit 18 stops outputting the input signal S8 and the count signal S9, and the operation data collection operation ends.

Next, in step ST6, the operator inputs data regarding the data extraction conditions from the keyboard 12.

In this case, the blocks 0 to 138 to 13d are respectively represented by symbols P1 to P4, and these symbols P1 to P4 are respectively represented by symbols P1 to P4.
P4 and symbols representing logical product, logical sum, and logical negation, respectively.
Data extraction conditions are input by combining AND'', OR'', ``NOT'', and the symbol ``S ET'' indicating input of data acquisition conditions.

For example, on the condition that the signals 81.82 obtained by the amplifiers 13a and 13b are "1"ff1M,
When extracting data to be compared from each measurement data stored in the data memory 20 and RAM 21,
From keyboard 12, SET PI AND
P2 is input. In this case, since symbols P3 and P4 are not described in this data extraction condition, signal S3.
Even if S4 is not "1", as long as the signal 31.82 is "1", this measurement data is extracted as comparison data against Mongolia.

Then, when data related to such data extraction conditions is input from the keyboard 12, the CPU 23 inputs the data from the input circuit 1.
6 and occupies the RAM 21.

Next, in step ST7, if the operator inputs the diagnostic command ``CIA'' from the keyboard 12, the CPU
23 searches the reference side data storage area 17 of this RAM 21 and the data memory 20 based on the data extraction conditions stored in the RAM 21 in step ST8, and searches these Jl! Measured data stored in the side data storage area 17 and measured data stored in the data memory 20 that satisfy the data extraction conditions are extracted and compared. If these match, the CPLJ 23 determines that the circuit board to be diagnosed 11a is normal. If these measurement data do not match, the CPU 23 determines that the circuit to be diagnosed 11b is abnormal.

Thereafter, the CPLI 23 supplies this determination result to the display circuit 22 in step ST9, and displays it on the display device 15.

As described above, in this embodiment, the reference circuit board 11a
Among the various operating data obtained when operating the circuit board 11b and the circuit board to be diagnosed 11b, those that satisfy the data acquisition conditions set at the time of input diagnosis are selectively extracted, compared, and the result of this comparison is Based on this, it is determined whether the circuit board 11b to be diagnosed is normal or not, so even if the circuit is a circuit whose operation changes every time it is measured, just set the data extraction conditions to avoid the parts that change. It is also possible to diagnose circuit boards whose behavior changes each time a measurement is performed.

Further, in the embodiment described above, the timing generation circuit 25 is provided in the write control circuit 18 to generate a read synchronization signal (write signal 88) for the data memory 20, but the signal obtained from each circuit board 11a, 11b is The 1-inclusive synchronization signal for the data memory 20 may be generated from the signals output by other questions and answers.

In addition, in the above-mentioned embodiment, there is only one data import condition to simplify the explanation, but this data import condition! It may be J number. We also increased the number of probes to 5.
It can be more than just a book.

(Effects of the Invention) As described above, according to the present invention, it is possible to diagnose not only a normal circuit board but also a circuit board whose operation changes every time a measurement is performed.

[Brief explanation of the drawing]

FIG. 1 is a circuit block diagram showing an embodiment of the failure diagnosis 1i equipment according to the present invention, and FIG.
Detailed circuit diagram of the 111 circuit, Figure 3 is the RA shown in Figure 1.
FIG. 4 is a flowchart showing an example of the operation of the same embodiment, and FIG. 5 is a circuit block diagram showing an example of a conventional failure diagnosis device. 11a... Reference circuit board, 11b... Circuit board to be diagnosed, 13a-13b... Probe, 14... Processing section, 20... Storage section (data memory), 21... Storage section ( RAM), 23... Reference data extraction section, diagnosed data extraction section, diagnosis section (CPtJ). Patent applicant Agent: Tateishi Electric Co., Ltd.
Patent attorney Tetsuji Iwan (and 1 other person) No. 4, Figure 5

Claims (1)

[Claims] Comparing reference data obtained by operating a reference electronic device with diagnostic data obtained by operating an electronic device to be diagnosed, to determine whether the electronic device to be diagnosed is operating correctly. In the fault diagnosis device to be diagnosed, there is a storage section that captures and stores the operating data of each of the electronic devices, and reference data that satisfies data extraction conditions from each measurement data of the reference electronic device stored in the storage section. a reference data extraction unit that extracts data that satisfies the data extraction conditions from each measurement data of the electronic device to be diagnosed stored in the storage unit as data to be diagnosed; a diagnosis unit that compares the reference data obtained by the data extraction unit with the diagnosis data obtained by the diagnosis data extraction unit to diagnose whether or not the electronic device to be diagnosed is operating correctly. A failure diagnosis device characterized by: