JPS62279715A - Muting device - Google Patents

Abstract

PURPOSE:To surely keep a muting state while the state with a deficient error rate continues by releasing the muting when a track whose error block number is (n) or below is continued for M-track. CONSTITUTION:When a block error number N exceeds n2 in a counter 20, a detector 21 in a muting circuit 19 outputs a pulse to reset a FF 29 thereby bringing an output 19a to '0' and resetting a counter 26 via an OR gate 27. A pulse F is outputted from a detector 25 till the 16th track to reset the counter 26. The output D of the detector 24 is outputted from the 17th track and the counter 26 starts counting. The count of the counter 26 is 5 at the 21st track and a pulse E is outputted from a detector 28, the FF 29 is set and the counter 26 is reset via the gate 27. The output 19a of the FF 29 is a muting signal.

Description

Detailed Description of the Invention 8. Detailed Description of the Invention [Industrial Application] This invention relates to a muting device provided in a PCM recording/reproducing device.

[Conventional technology]

A rotary head type magnetic recording and reproducing apparatus that performs PCM recording and reproducing using a rotary head such as a VTR is an example of such a moderate apparatus.

FIG. 2 shows a block diagram of a rotary head type PCM magnetic recording and reproducing apparatus. In the figure, (1) is the input terminal, (
2) is a low-pass filter, (3) is an analog-to-digital conversion circuit (hereinafter referred to as AD conversion circuit), (4) is a memory circuit, (5) is an encoding circuit, (6) is a modulation circuit, and (7) is a memory circuit.
) is a selector switch, (8) and (9) are magnetic heads,
αQ is a changeover switch, α2 is a memory circuit, σ3 is a decoding circuit, (141 is a digital-to-analog conversion circuit (hereinafter referred to as DA conversion circuit)), low-pass filter is a low-pass filter, ufil is an output terminal, aη shows a clock generation circuit that generates the system clock, which includes a low-pass filter (2), an AD conversion circuit (3), and a memory circuit (
4), the recording system is composed of the encoding circuit (5) and the modulation circuit (6), demodulation circuit (company), memory circuit ■, decoding circuit q3, DA variable a circuit Q411 low-pass filter hitting, Antogame-80 seconds, The muting circuit (19) constitutes a reproduction system.

Next, we will explain the operation, starting with the recording system. The analog signal to be recorded is input from the input terminal (1), high frequency components are removed by the low-pass filter (2), and then the analog signal is converted into a digital signal by the AD conversion circuit (3) at a sampling frequency of fl (less than or equal to c, referred to as Fs). (hereinafter referred to as samples) and stored in the memory in the memory circuit (4). The encoding circuit (5) reads out the samples stored in the memory, generates a check signal for error correction or error detection, and writes it into the memory. When the encoding is completed, the sample and check signal are time-compressed and read out from the memory. After being converted into a signal suitable for magnetic recording and reproduction in a modulation circuit (6), a changeover switch (7) that is switched every unit time is used. ) is recorded on the magnetic tape by the magnetic head (8) or magnetic head (9).

Figure 3 is a diagram showing the track pattern formed on the magnetic tape, where C is the old magnetic tape, ■ is the recorded track pattern, (to) is the head running direction, and (to) is the tape running direction. ing.

n blocks of signals are recorded on one track. Figure 4 is a diagram showing the signal configuration of one block, where (to) is a block synchronization signal, (to) is a sub-signal cylinder is an audio signal and a check signal for error correction, and ■ is to detect a signal error in one block. This shows the area for recording check signals for checking.

Next, the operation of the reproduction system will be explained. magnetic head (
The time-compressed reproduction signals from the magnetic head (9) and the magnetic head (9) are alternately supplied to the demodulation circuit I via a changeover switch αO that changes every unit time, and are returned to the signal before modulation, and the memory circuit stored in internal memory. Decoding circuit a3
reads the reproduced signals sequentially from the memory and performs error detection and error correction. The decoded samples in the memory are read out at regular time intervals, converted into analog signals by the DA conversion circuit (141), and then high frequency components are removed by the next stage low-pass filter 4 and output from the output terminal αe. Ru.

Note that the lock necessary for the above signal processing is supplied from the clock generation circuit αη.

When errors occur frequently, the muting circuit α9 generates a mute signal to forcibly eliminate the audio signal to prevent inconveniences such as large noise being output and speaker damage. Controls the audio digital signal outputted to the D/A conversion circuit a4 via aQ.

FIG. 5 is a block diagram showing details of a conventional muting circuit, where ■ is an error detection circuit that detects errors in blocks contained in the decoding circuit αJ, ■ is a counter, and
is a detection circuit that detects that the count value of counter ■ has reached a predetermined number n2, the device is a monomulti, and (100) is a clock generation circuit 11? ) is used to set the value of the counter (2) to 0 before the counter (2) starts counting the number of error blocks in each track.

The operation of this circuit is shown below.

The output of the error detection circuit @ is input to the counter 2, which counts the number of error blocks in units of one track. When the output of the counter ■ reaches n2, the detection circuit 1■ outputs a pulse, turns on the monomulti ■, and outputs the muting signal (19
a) Generate. This muting signal (19a) turns off the AND gate α and the DA conversion circuit [14
The audio digital signal input to 1c (shown in the second diagram) becomes 0, and noise can be prevented. The muting time is arbitrarily determined by the time constant of the monomulti, but if it is too long, even high-quality reproduced sound will be muted, so an appropriate time To is selected.

Figure 6 is a time chart showing the operation of muting circuit a9, and the figure shows an example of error distribution, where the horizontal axis shows the track number and the vertical axis shows the number of error blocks in one track. There is. n1 in the figure is the number of correctable errors, n
2 indicates the number of errors for which muting is turned on, as described above. 3 shows the muting signal (19a) output from the monomultiplier, in which the period of 0 is the mute period and the mute time To is set to the signal reproduction period of 10 blocks. Since the number of error blocks in the first track exceeds n2, muting is turned on, muting is canceled after period To, and data from the 11th block onward is transferred to the DA converter.

[Problem that the invention seeks to solve]

As described above, the conventional muting device is configured so that after the muting is turned on, when the main NEET time To has elapsed, the muting is canceled regardless of whether there is an error or not. However, if errors occur frequently, there is a problem in that unpleasant noises are generated, speakers are damaged, and other inconveniences occur.

The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to provide a muting device that can reliably maintain a muting state while a low error rate continues.

[Means for solving problems]

The muting device according to the present invention includes means for counting the number of error blocks for each track of an input signal, and setting the track to a history kneeting state when the counted value exceeds a predetermined value n2; and means for canceling muting after the number of tracks whose count value is equal to or less than a predetermined value n1 (<n2) continues for M tracks.

[Effect]

Since the muting canceling means in the present invention cancels muting when there are M consecutive tracks in which the number of error blocks is n1 (<n2) or less, problems such as noise and speaker damage do not occur.

[Embodiments of the invention]

An embodiment of the present invention will be described below with reference to the drawings. 1st
In the figure, the first counter ■ and the first detector
and (2) respectively indicate the same device as the conventional device shown in FIG. 5, where (2) is the third detector, and the number of error blocks in one track counted by the first counter (2) is n! A pulse is output in the following cases. ■ is a fourth detector that outputs a pulse when the number of error blocks in one track counted by the first counter ■ exceeds n2. 2 is a second counter that counts the number of pulses from the third detector, and is reset by the output of the OR gate. (branch) is a second detector that outputs a pulse when the count value of the second counter @ exceeds M; ) is a flip-flop that is reset by the output pulse.

Next, using the time chart in Figure 6 and taking M=5 as an example,
The operation of this embodiment will be explained.

In the first track, the number of block errors N exceeds n2, so the detector 1t211 outputs a pulse, resets the flip-flop, and outputs the output (19a) as shown in FIG. 6(C).
It is set to 0 as shown by , and the second counter 2 is reset via the OR gate 10.

A pulse F (FIG. 6(F)) is output from the fourth detector up to the 16th track, and the second counter is reset. Output DC of the third detector (to) Figure 6 (to)]
is output from the 17th track, and the second counter starts counting. At the 21st track, the count value of the second counter becomes 5, and the pulse EC is detected from the second detector (support).
FIG. 6 [exist])) is output. .

This pulse E sets the flip-flop and resets the 20th counter via the OR gate @. The output (19a) of the flip-flop device is used as a muting signal to control the AND gate aB shown in FIG. Since the total signal is set to 0, problems such as noise generation and speaker damage do not occur.

In the above embodiment, the third detector +241 outputs pulses when the number of block errors that can be corrected is n1 or less, but the setting value may be changed depending on the device to which it is applied.
The same effect can be obtained by setting any one value in .

Further, in the above embodiment, the number of block errors is determined in units of one track, but the same effect can be obtained even if a plurality of tracks are used as units.

Further, although the rotary head type PCM magnetic recording/reproducing device has been described as an example, the present invention can be similarly applied to a PCM reproducing device such as a compact disc player.

〔Effect of the invention〕

As described above, the muting device according to the present invention is
Since muting is canceled after a state in which the number of errors is small continues over multiple tracks, it is possible to reproduce PCM signals without causing noise or damage to speakers. can get.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing a muting circuit according to an embodiment of the present invention, FIG. 2 is a block diagram showing the configuration of a rotating head type PCM magnetic recording and reproducing apparatus, and FIG. Figure 4 is a diagram showing the recording pattern. Figure 4 is a diagram showing the signal configuration of one block. Figure 5 is a diagram showing the signal configuration of one block.
The figure is a block diagram showing a conventional muting circuit.
The figure is a time chart for explaining the operation of the conventional example and the embodiment. ■...First counter, ■...First detector,
...Error detector, slope...Third detector, (c)...
4th detector, ■...second counter, fin...OR gate, ■...second detector, 4...flip-flop. In each figure, the same reference numerals indicate the same or corresponding parts.

Claims (2)

[Claims] (1) In a muting device configured to count the number of errors N within a predetermined period T of a digital reproduction signal and to transmit a muting signal when this counted value N exceeds a predetermined value n_2, the mutating signal is sending, a predetermined number n in which the number of errors N is smaller than the predetermined number n_2;
A mutating device characterized by comprising means for stopping the transmission of the mutating signal after a period not exceeding _1 continues for M periods. (2) A first counting means for counting the number of errors N occurring in a predetermined period T of the digital reproduction signal, a first detecting means for detecting N>n_2, and a first detecting means for detecting N<n_1 (<n_2). a second counting means for measuring a period of N<n_1; and a third detecting means for detecting that the output of the second counting means exceeds M; The detecting means transmits a mutating signal as an output signal from when it detects N>n_2, and after the second counting means counts a predetermined number M, the transmitting of the mutating signal is stopped. Muting device according to scope 1.