JPS62277824A - Block code decoding system - Google Patents

Abstract

PURPOSE:To attain the decoding with simple processing without using a complicated processing circuit by deciding it as a decode word that a difference of each time rate of a high level and a low level with respect to a regenerative one-bit is used as a reliability index and the total sum of the indexes is minimized thereby using no complicated processing circuit. CONSTITUTION:The difference of each time rate of a high level and a low level of an output of a voltage comparator 12 with respect to a regenerative bit is used as the reliability index of decoding in the unit of bits and a code word minimizing the total sum of the reliability indexes in a different bit of each code word from a received word is decided to be a decode word. For example, the output of the voltage comparator for a received waveform corresponding to each bit is divided into some points on a time axis, +1 is related to each divided output with a mark (high level) and -1 is related in case of a space (low level) and the value being the sum is used as information representing the reliability of decoding in the unit of bits. Thus, the error correction capability of an error correction code is kept and the decoding is applied with a simple processing without requiring complicated processing.

Description

Detailed Description of the Invention 3. Detailed Description of the Invention "Field of Industrial Application" The present invention relates to a block code decoding system using soft decision of a block error correction coded signal.

Specifically, soft-decision decoding methods for block codes can improve reliability compared to decoding methods using hard decisions in transmission methods that use block error correction codes, such as control signal transmission in land mobile radio. This is a possible decoding method.

"Prior Art" First, a conventional hard-decision block code decoding method will be explained using the following example. Now, corresponding to two pieces of information of 0.1, Ω= fx+ , X2 ) =+ (000)
, (111) Consider a block error correction code that is encoded into l. Since this code has an inter-code distance of 3, it is possible to correct l-bit errors. When decoding this block code, the conventional block code decoding method using hard decisions is a method in which it is assumed that a code word that has the smallest i:H distance between the received word and the code has been transmitted. Now, on the transmitting side, 1 corresponds to 1 (volt) and 0 corresponds to -1 (volt), and transmits X, = (111), and the receiving side receives a waveform r(t) as shown in Figure 1. This received waveform r (t) is 1.0 for each time slot T. OV, -
It is assumed that the level values are 0.2V and -0.2V.

In hard-decision decoding, bit-by-bit (each time slot) decoding is performed by 1 depending on the sign of the level of the received waveform (rQ).
．． Therefore, in the example shown in Figure 1, the received word Y is Y = (100), and the distance from the code word (000) is 1 and the distance from the code word (111) is 2. It is assumed that 0 has been sent, resulting in erroneous reception.

On the other hand, a method of decoding a block code by soft decision using level information during bit-by-bit decoding is described in the literature (D, Chase, "A C1asso
f Algorithms “or Decoding”
Block Codes with Channel
Measurement Information
n”, IEEE Trans, IT-1,8,k
1. Jan, 1972), and it has been shown that this method can expand the error correction capability for each block. In the block code soft-decision decoding method using this method, for a received word Y, a code word Xj such that the following is given is a decoded output. where Ω: set of code words, XJ zz-th code word X4. : code word X,
At the i-th dishift of
. , M+n: minimum value, lx; l
: The absolute value is 18.

According to this algorithm, the level value for the example of FIG. 1 is (n+1 = fl, O, -0, 2, -0, 21, so for code word X, Σllr: ('/+ΦXl+) = 1.
Σ1ffil(Y, ■Xz:)=0 for 0 code word Xt
．． 4, which is the minimum when the code word is XsO, so it is assumed that 1 has been transmitted and it is correctly received. In the soft-decision decoding method for block codes, different bits between the code word and the received word are weighted according to the reliability of the decision (level value 2,
The codeword that minimizes the weighted distance from the received word (with , as the weighting factor) is considered to be transmitted. According to this method, the error correction capability of the block code is expanded. but,
Beat/Level value when decoding in units of beats: 1. (i=l~N)
is an analog value, and in order to perform multiple processing including such an analog level value, the level value must be converted into an analog value.
There is a drawback that a complicated processing circuit for digital conversion is required.

"Means for Solving the Problem" According to the present invention, a block code is transmitted as an error-correctable code word consisting of a plurality of bits, and a voltage comparator decodes the block code to the first place, and In a block code decoding method in which error correction decoding is performed by weighting decoding in units of focus according to the signal HMK, the difference in each time rate for reproduced bits between the high level and low level of the voltage comparator output is taken as a reliability index for decoding in units of focus, and a codeword that minimizes the sum of the reliability indexes for different bits between each codeword and the received word is determined to be a decoded word.

For example, if the voltage comparator output of the received waveform corresponding to a bit is divided into several points on the time axis, and each divided output is a mark (high level), +1 is given, and a space (low level) is given.
In the case of -1, the value is the sum of the corresponding values, that is, the value of the difference in each time rate per playback bit between the mark and the space,
or a value proportional thereto is information representing the reliability of decoding in bit units (hereinafter referred to as reliability index), and this reliability index is used instead of the level value in conventional soft decision decoding to determine each received word (frame). ) performs soft decision recovery. In this way, the error correction capability of the error correction code is expanded to the same extent as the conventional soft-decision decoding method, and moreover, the error correction ability of the error correction code is expanded compared to the conventional hard-decision decoding method. Decryption can be performed without the need for additional processing.

``Example'' In this invention, the difference in the time rate per reproduced bit between the high level and low level of the output of the electrical comparator used for decoding each bit is determined as a reliability index. Explain with reference to.

Now suppose that a received waveform 1 as shown in FIG. 2B is obtained for a high-level 1-bit transmission waveform as shown in FIG. 2A. The voltage comparator output of this received waveform 1 is as shown in FIG. 2C. If the time length for one reproduced bit is set to 10 as shown in the figure, the voltage comparator output (Figure 2C) will have a high level of length 4 (positive component of the received waveform) and a low level of length l (positive component of the received waveform). (negative component of the received waveform) and a high level of length 5. Therefore, the difference in the time rate per playback (via) between high level and low level is I! , becomes l(4+5)-11-8.

If the received waveform 2 is received as shown in Figure 2, the output of the voltage comparator will have a length of 3 as shown in Figure 2E.
The high level - the low level of length 3 becomes the high level of length 4, and the difference 12 in the time rate per reproduction bit between the high level and the low level is + (3 + 4) - 31 - 4. When the received waveform 3 is received as shown in FIG. 2F, the output of the voltage comparator is as shown in FIG. 2G: high level of length 1 - low level of length l - length 1 High level - Low level of length 2 - High level of length 1 - Low level of length 3 - High level of length 1, and the difference in the time rate per reproduction bit between the high level and the low level is l , is ・1 (1+1+
1+1)-(1+2+3)l=2.

Difference between these time rates 1+ = 8. 1z=4.13=2 is the level of reliability of the received waveform 1.2.3, respectively.
In other words, it represents a reliability index.

Such a difference in time rate can be measured using an hour wheel circuit, and the difference in time rate thus obtained is used as a reliability index to calculate the level value l in the conventional block code soft decision described above.
If used instead of , it becomes possible to perform hard decision decoding using a voltage comparator in bit units and soft decision decoding in frame units. At this time, bit-by-bit decoding may be performed by determining the identification result at the time of bit identification, that is, whether the level is positive or negative, as in the past, but the decoding result may be the one with the greater time rate within the time of one bit. good. On the other hand, in block code decoding, a soft decision is made using a reliability index in units of bits, so the error correction ability of the error correction code is expanded compared to when a hard decision is made, and the non-receiving rate characteristics are improved. You can expect it.

FIG. 3 shows an embodiment of the present invention, in which an input signal from an input terminal 11 is input to a voltage comparator 12, and the output of the voltage comparator 12 is sent to a bit unit decoder 13 and a time rate measuring circuit 1.
4. The decoding result of the bit unit decoder 13 and the measurement result of the time rate difference measuring circuit 14 are input to the soft decision error correction decoding circuit 15.
The frame decoded output from the output terminal 16 is outputted to the output terminal 16.

Assume that a human input signal 21 as shown in a waveform 21 in FIG. 4 is input from the input terminal 11. This input signal 21 is converted by a voltage comparator 12 into a high level for positive components and a low level for negative components, so that a voltage output as shown by waveform 22 in FIG. 4 is obtained. The voltage output of this waveform 22 is applied to the bitwise decoder 1.
In step 3, each bit is decoded as a mark or a space using the same sophisticated technique as before.

The voltage output of the waveform 22 is input to a time rate difference measuring circuit 14, and the difference in time rate per bit between its high level and low level is measured. The time rate difference measuring circuit 14 can be constructed using a commercially available up/down counter 23 as shown in FIG. The count mode selection terminal 2
4 is applied with the output voltage of the voltage comparator 12, and when this applied voltage is at a high level, the up/down counter 23 enters an up-counting state, and when it is at a low level, it enters a down-counting state. A clock signal from the clock generator 25 that is N times the bit rate of the input signal at the input terminal 11 is supplied.

This clock is manually input to the clock terminal CK of the up/down counter 23, and this clock is counted. The recovered clock obtained from the bit unit decoder 13 is used at the recent terminal 26 of the up/down counter 23. Each l of human signal
At the end of a bit, a value proportional to the time difference between the high level and the low level of the output of the voltage comparator for that l bit, that is, the difference in time rate per reproduction bit, is obtained at the count output terminal 27 of the up/down counter 23. This value is output to the soft-decision error correction decoding circuit 15, and at the end of counting one bit, the up/down counter 23 is reset by the recovered clock from the bit unit decoder 13, and the same operation starts again for the next bit. .

Next, the operation of the embodiment will be explained using the (7,4) Hamming code. <7.4) The code word of the Hamming code is
As shown in the figure. Now, from the sending side in Figure 6! ! Suppose that (1000101) shown in FIG. 12 is sent, and the received waveform on the receiving side becomes as shown in FIG. 7 due to noise added during transmission, and the received word Y becomes Y=(1001111). At this time, in the conventional hard-decision decoding method, the inter-code distance between the code word x-(10001O1) and the received word Y is 2, but Since the inter-code distance between =(1001110) and the received word Y is 1, it is assumed that the code word X' has been transmitted, and erroneous reception occurs.

On the other hand, it will be explained that the decoding method according to the present invention allows correct reception. Note that an example will be considered in which the time rate difference is measured by sampling at 10 locations within one bit.

Reliability index for each bit obtained from the voltage comparator output of the received waveform! , is given as shown in Figure 7,
The right end of FIG. 6 shows the result of calculating the formula fi+ for the code words of 16 Hamming codes using this reliability index β. For code word X = (1000101), Σl 1i 1 (YiOXi ) = 6, but for code word X'-(1001110), the calculation result is 10, and since the calculation result for code word X gives the minimum value, Codeword X is considered to have been transmitted and is correctly decoded.

"Effects of the Invention" As described above, according to the present invention, even received words that are not received or received incorrectly using conventional hard decision decoding methods can be correctly decoded. An efficient algorithm for minimizing formula (11) is also described in detail in the above-mentioned literature, etc.
This method uses an arithmetic bag W for decoding error correction codes.
This can be easily realized with software using (CPU).

On the other hand, bit-by-bit decoding may be performed using the same method as before. Further, the time rate difference measuring circuit for determining the reliability index can be simply constructed using a commercially available IC, but it may also be performed by software processing.

As described above, the present invention has the advantage that the correction capability of an error correction code can be expanded compared to the hard decision decoding method without using a complicated processing circuit such as an AD conversion circuit.

Next, the improvement effect achieved by this invention will be described quantitatively.

According to the above-mentioned literature, when the soft-decision decoding method shown in equation (1) is performed, up to 2to errors can be corrected when the code open circuit ffJ d is 2to ki1. Note that when using conventional hard decision decoding, only up to t0 errors can be corrected at maximum. In the decoding method of this invention, the level value of equation (1) is 11.
Since the value of the difference in time rate between the high level and low level of the voltage comparator output is used instead of 1, if the number of samples in one bit is large enough, bit m can be separated based on the difference in time rate. In other words, 2to+1 or more errors occur within one frame (one code word) based on the bit error rate characteristics when the bit-by-bit decoding result is the one with the larger time rate between the high level and the low level. This probability is the lower limit of the code word error rate of the decoding method according to the present invention. In other words, according to the present invention, this bit error rate can be obtained in the best case.

For example, in the case of BCH (23, 12) code, the inter-symbol distance d is 7, so 2to +1=2x3+1, and L
Since 0=3, the probability of making an error of 7 bits or more out of 23 bits gives the lower limit of the code error rate of the decoding method according to the present invention, and there is a possibility that an error will occur even if the error is within 6 bits. On the other hand, in the conventional hard-decision decoding method, the code open circuit M2to+
Since it is possible to correct up to to errors for 1,
The codeword error rate is t within l codewords (l frames). Equal to the probability of +1 or more errors occurring, BCII(2
3, 12), 4 out of 23 bits (t.

+1=3+1') is equal to the probability of getting more than one bit wrong.

As an example of performing bit identification and reproduction based on the time rate difference between high level and low level, see Reference (2) [Unjo, Suwa 2 Hattori, "Integral decoding method and transmission characteristics of sprint phase signal", 1982] Annual National Conference of the Institute of Electronics and Communication Engineers, 1
h2167), signal transmission speed (bit rate) 300
b/s, frequency deviation 4.5 kflzIF bandwidth 16k
The case of fading frequency 2011z is reported. This characteristic is shown as curve 31 in FIG. Based on the bit error rate characteristics of this song 131, the lower limit of the codeword error rate of the decoding method according to the present invention and the codeword error rate of the conventional hard-decision decoding method are determined as BCH (23, 12).
Using the code as an example, find it assuming random errors. Assuming random errors, it can be calculated as follows. However, p is the bit error rate and the 8th
This is obtained from curve 31 in the figure. FIG. 8 shows relationship curves 32 and 33 between the bit error rate p and the code word error rates P, , P'. For example, when the received input electric field is −8d[lμ, p=
2X10-2, and at this time ・Also, the receiving input electric field -
When p is 1 dBμ, p=2×10 −3 , and then: According to the present invention, the code word error rate characteristics are significantly improved compared to the conventional hard decision decoding method.

Although the present invention has been applied to the NRZ code in the above description, the present invention can also be applied to other codes.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing an example of a received waveform to explain the soft-decision decoding method, FIG. 2 is a diagram showing an example of a transmitted waveform, its various received waveforms, and the output of each voltage comparator. Figure 4 is a block diagram showing an embodiment of the present invention, Figure 4 is a diagram showing an example of the voltage comparator output and received waveform, Figure 5 is a diagram showing an example of implementation of a time rate difference measuring circuit, and Figure 6 is ( 7,4) A diagram showing all code words of a Hamming code. Figure 7 is a diagram showing an example of the received waveform and reliability index. Figure 8 is a diagram showing the bit error rate characteristics shown in the literature 2) and the FIG. 6 is a diagram showing code word error rate characteristics when using the decoding method according to the invention and when using the conventional decoding method.

Claims (1)

[Claims] A voltage comparator performs bit-by-bit decoding of a block code transmitted as an error-correctable code word consisting of a plurality of bits, and decodes the bit-by-bit decoding according to reliability. In a block code decoding method that performs error correction decoding by weighting, the difference in time rate for each reproduced bit between the high level and low level of the output of the voltage comparator in the bit-by-bit decoding process is decoded in bit units. A block code decoding method that determines a code word that minimizes the sum of the reliability indicators in different bits between each code word and a received word as a decoded word.