JPH07112161B2 - Block code decoding method - Google Patents

Description

TECHNICAL FIELD The present invention relates to a block code decoding method using soft decision of a block error correction coded signal. The soft-decision decoding method of the block code is, for example, in a transmission method using a block error correction code such as control signal transmission in land mobile radio, it is possible to improve reliability as compared with a decoding method using a hard decision. This is a possible decoding method.

"Prior Art" First, a conventional block code decoding method by hard decision will be described with the following example. Now, consider a block error correction code that encodes Ω = {X ₁ , X ₂ } = {(000), (111)} for two pieces of information of 0 and 1. Since this code has an inter-code distance of 3, a 1-bit error can be corrected. In the case of decoding this block code, the conventional block code decoding method by hard decision is a method in which it is considered that the code word having the smallest distance between the received word and the code is transmitted. On the transmitting side, 1 is 1 (volt) and 0 is -1.
Suppose that X ₂ = (111) is transmitted in correspondence with (volt) and the receiving side receives the waveform r (t) as shown in FIG. 1. This received waveform r (t) is for each time slot T. 1.0V,
The level values of −0.2V and −0.2V are taken. In the hard-decision decoding, bit-by-bit (each time slot) decoding is performed by associating the received waveform r (t) with 1 and 0 depending on the level of the received waveform r (t). Therefore, in the example of FIG. (100), and the distance from the codeword (000) is 1,
Since the distance from the codeword (111) is 2, it is assumed that 0 has been transmitted, resulting in erroneous reception.

On the other hand, there is a method of performing decoding by soft decision using level information at the time of decoding in block units for block codes [D, Chase, “A Class of Algorithms for Decode
coding Block Codes with Channel Measurement Inform
ation ", IEEE Trans.IT-18, No. 1, Jan. 1972], it is shown that this method can increase the error correction capability for each block. Soft-decision decoding of block codes by this method The law is that for the received word Y, The code word X _j that becomes is the decoded output. Where Ω: a set of code words, X _j : j-th code word X _ji : the i-th digit of code word X _j , X _j = (X _j1 , X _j2 , ..., X _jN ) Y _i : of the received word At the i-th digit, Y = (Y ₁ , Y ₂ , ..., Y _N ) l _i : Level value when decoding the i-th digit of the received word: Exclusive OR, Min: Minimum value, | l ₁ |: l It is an absolute value of ₁ .

According to this algorithm, the level value for the example of FIG. 1 is _{{l i} = {1.0,} -0.2, -0.2} So to the codeword X ₁ For codeword X ₂ Therefore, when the code word X _{2 is} the minimum, 1 is considered to have been transmitted, and is correctly received. In the block-code soft-decision decoding method, for different bits in the code word and the received word,
It is considered that the codeword that minimizes the distance from the received word weighted with the weight according to the reliability of the determination (the level value l _i is used as the weighting coefficient) is transmitted. According to this method, the error correction capability of the block code is expanded. However, the level value l _i (i = 1 to N) at the time of decoding in bit units is an analog value, and in order to perform the decoding process including such an analog level value, the level value is converted from analog to digital. There is a drawback that such a complicated processing circuit is required.

[Means for Solving the Problems] According to the present invention, the block code transmitted by each code as an error-correctable code word composed of a plurality of bits is decoded in bit units by a voltage comparator, and the bits are decoded. In a block code decoding method in which error correction decoding is performed by weighting the decoding in units according to the reliability, the difference between the time ratios of the high level and low level of the voltage comparator output with respect to the reproduced bits is expressed in bit units. As a decryption reliability index,
A code word that minimizes the sum of the reliability indexes at different bits between each code word and the received word is determined as a decoded word.

For example, the voltage comparator output of the received waveform corresponding to a bit is divided into several points on the time axis, and +1 if each divided output is a mark (high level) and -1 if it is a space (low level). The value that is the sum of the two values, that is, the difference between the time ratios of the reproduced bits between the mark and the space, or a value proportional thereto is information indicating the reliability of decoding in bit units (hereinafter referred to as the reliability index). ), The soft-decision decoding is performed for each received word (frame) using this reliability index instead of the level value in the conventional soft-decision decoding. In this way, the error correction capability of the error correction code is expanded to the same extent as the conventional soft-decision decoding method compared to the conventional hard-decision decoding method,
Moreover, the decoding process can be performed by a simple process without requiring a complicated process such as analog-digital conversion.

[Embodiment] In the present invention, the difference between the time rates per reproduced bit between the high level and the low level of the output of the voltage comparator used for decoding in bit units is obtained as a reliability index. Will be described with reference to. Now, assume that a reception waveform 1 as shown in FIG. 2B is obtained for a high-level 1-bit transmission waveform as shown in FIG. 2A. The voltage comparator output of the received waveform 1 is as shown in FIG. 2C. This reproduction 1
When the time length for bit is 10 as shown in the figure, the voltage comparator output (Fig. 2C) has a high level of length 4 (positive component of the received waveform) and a low level of length 1 (received waveform Negative component), length 5 and high level. Therefore, the difference l _{1 in} the time rate per reproduction bit between the high level and the low level is | (4 + 5) −1 | =
It becomes 8. When received as a received waveform 2 as shown in FIG. 2D, the output of the voltage comparator has a high level of length 3—a low level of length 3—a length of 4 as shown in FIG. 2E. It becomes a high level, and the difference l _{2 in} the time rate per one bit of reproduction between the high level and the low level becomes | (3 + 4) −3 | = 4. Second
When received as the received waveform 3 as shown in FIG. F, the output of the voltage comparator is as shown in FIG. 2G, high level of length 1-low level of length 1-high level of length 1. -Length 2
Low level-length 1 high level-length 3 low level-length 1 high level, and the difference l _{3 in} time rate per reproduction bit between the high level and the low level is | (1 + 1 + 1 + 1)
-(1 + 2 + 3) | = 2.

These time rate differences l ₁ = 8, l ₂ = 4, l ₃ = 2 represent the reliability of the received waveforms 1, 2 and 3, respectively, that is, the reliability index.

Such a time rate difference can be measured by a simple circuit, and the level value l _i in the conventional block code soft decision described above using the obtained time rate difference as a reliability index.
If used instead of the above, it is possible to perform hard decision using a voltage comparator in bit units, while performing soft decision decoding in frame units. At this time, the bit-by-bit decoding is the same as the conventional one, and the identification result at the time of identifying the bit,
That is, the judgment may be made based on whether the level is positive or negative,
One having a larger time ratio within the time of 1 bit may be the decoding result. On the other hand, in block code decoding, since the soft decision is made using the reliability index in bit units, the error correction capability of the error correction code can be expanded compared to the case of making a hard decision, and the non-reception rate characteristic can be improved. Can be expected.

FIG. 3 shows an embodiment of the present invention, in which an input signal from the input terminal 11 is input to the voltage comparator 12, and the output of the voltage comparator 12 is supplied to the bit unit decoder 13 and the time rate measuring circuit 14. To be done. The decoding result of the bit unit decoder 13 and the measurement result of the time rate difference measuring circuit 14 are input to the soft-decision error correction decoding circuit 15, and the frame decoding output from the soft-decision error correction decoding circuit 15 is output to the output terminal 16. To be done.

Input signal from input terminal 11 as shown by waveform 21 in Fig. 4
Suppose 21 is entered. This input signal 21 is a voltage comparator 12
Then, the positive component is converted into the high level and the negative component is converted into the low level, and the voltage output as shown by the waveform 22 in FIG. 4 is obtained. The voltage output of the waveform 22 is decoded by the bit-by-bit decoder 13 for each bit, mark or space, by a method similar to the conventional one.

The voltage output of the waveform 22 is input to the time rate difference measuring circuit 14 and the difference in time rate per bit between the high level and the low level is measured. As the time rate difference measuring circuit 14, a commercially available up / down counter 23 as shown in FIG. 5 can be used. The output voltage of the voltage comparator 12 is applied to the count mode selection terminal 24. When the applied voltage is at a high level, the up / down counter 23 is in an upcount state, and when it is at a low level, it is in a downcount state. A clock N times the bit rate of the input signal from the input terminal 11 is input from the clock generator 25 to the clock terminal CK of the up / down counter 23, and this clock is counted. Bit-by-bit decoder at reset terminal 26 of up / down counter 23
The recovered clock obtained from 13 is used. At the end of each 1-bit of the input signal, a value proportional to the time difference between the high level and the low level of the voltage comparator output in the 1-bit, that is, the difference in the time rate per reproduction 1 bit, is the counter output terminal 27 of the up-down counter 23. Can be obtained. This value is output to the soft-decision error correction decoding circuit 15, and at the end of the count of 1 bit, the up / down counter 23 is reset by the reproduction clock from the bit unit decoder 13 and the same operation is started again for the next bit. .

Next, the operation of the embodiment will be described using the (7,4) Hamming code. The code word of the (7,4) Hamming code is shown in FIG. Now, as shown in No. 2 in Fig. 6 from the transmitting side (100010
1) is sent, the received waveform on the receiving side becomes as shown in Fig. 7 due to noise added during transmission, and the received word Y
Is Y = (1001111). At this time, in the conventional hard-decision decoding method, the inter-code distance between the code word X = (1000101) and the received word Y is 2, but it is one of the code words of the Hamming (7,4) code X ′. Since the inter-code distance between = (1001110) and the received word Y is 1, it is considered that the code word X'is transmitted, and erroneous reception occurs.

On the other hand, it will be explained that the decoding method according to the present invention allows correct reception. Consider an example of measuring the time rate difference by sampling 10 points in 1 bit. It is assumed that the reliability index l _i for each bit obtained from the output of the voltage comparator of the received waveform is given as shown in FIG. 7, and the reliability index l _i is used to generate 16 Hamming code code words. On the other hand, the result of calculating the formula (1) is shown at the right end in FIG. For codeword X = (1000101) However, since the calculation result for the code word X ′ = (1001110) is 10, and the calculation result for the code word X gives the minimum value, it is considered that the code word X has been transmitted and is correctly decoded.

[Advantages of the Invention] As described above, according to the present invention, it is possible to correctly decode a received word that is not received or is erroneously received by the conventional hard decision decoding method. An efficient algorithm for minimizing the equation (1) is described in detail in the above-mentioned documents,
This method can be easily realized by software using an arithmetic unit (CPU) for decoding the error correction code.

On the other hand, the bit-by-bit decoding may be performed by the same method as the conventional method. Further, the time rate difference measuring circuit for obtaining the reliability index can be extremely easily constructed by using a commercially available IC, but it may be performed by software processing.

As described above, according to the present invention, there is an advantage that the correction capability of the error correction code can be expanded as compared with the hard decision decoding method without using a complicated processing circuit such as an AD conversion circuit.

Next, the improvement effect of the present invention will be described quantitatively. According to the above-mentioned document, when the soft-decision decoding method shown in Expression (1) is performed, up to 2t ₀ erroneous values can be corrected when the inter-code distance d is 2t ₀ +1. Note that when using conventional hard-decision decoding, up to t ₀ errors can be corrected at maximum. Also in the decoding system of the present invention, the value of the time ratio difference between the high level and the low level of the voltage comparator output is used instead of the level value | l _i | If the number is sufficiently large, when bit identification is performed based on the difference in time rate, that is, when the bit rate decoding result is the one with the higher time rate between the high level and the low level, 1 When 2t ₀ or more errors occur in a frame (one codeword), no reception occurs, so this probability is the lower limit of the codeword error rate of the decoding system according to the present invention. That is, according to the present invention, even in the best case, this code error rate can be obtained.

For example, in the case of a BCH (23,12) code, the inter-code distance d is 7 and therefore 2t ₀ + 1 = 2 × 3 + 1, and t ₀ = 3. The lower limit of the code error rate of the decoding method according to the present invention is given, and there is a possibility that the error may actually be erroneous even within 6 bits. On the other hand, in the conventional hard-decision decoding method, up to t ₀ errors can be corrected for the inter-code distance of 2t ₀ +1. Therefore, the codeword error rate is t ₀ +1 in 1 codeword (1 frame). It is equal to the above probability of error, and in the case of BCH (23,12), 4 (t ₀
+ 1 = 3 + 1) bits or more Equal to the probability of error.

As an example of discriminating and reproducing bits based on the difference in time rate between high level and low level, reference (2) [Ogami, Suwa, Hattori, "Integral decoding method and transmission characteristics of split phase signal", 1983 IEICE General Conference, No.216
In [7], it is reported that the signal transmission rate (bit rate) is 300 b / s, the frequency deviation is 4.5 kHz, the 1F bandwidth is 16 kHz, and the fading frequency is 20 Hz. This characteristic is shown in FIG.
Shown as 31. Based on the bit error rate characteristic of the curve 31, the lower limit of the code word error rate of the decoding method according to the present invention and the code word error rate of the conventional hard decision decoding method are calculated as BCH (23,12).
Random error is assumed for the code. Assuming random error, Can be calculated by However, p is the bit error rate,
It is obtained from curve 31 in the figure. The bit error rate p is shown in FIG.
It is shown as the relation curves 32 and 33 of the code word error rates P _w and P ′ _w . For example, when the received input electric field is -8 dBμ, p = 2 × 10 ^-2 . At this time, Also, when the received input electric field is −1 dBμ, p = 2 × 10 ⁻³ ,
This time, Thus, according to the present invention, the codeword error rate characteristic is significantly improved as compared with the conventional hard decision decoding method.

Although the present invention is applied to the NRZ code in the above description, the present invention can also be applied to other codes.

[Brief description of drawings]

FIG. 1 is a diagram showing an example of a reception waveform for explaining the soft-decision decoding method, FIG. 2 is a diagram showing an example of a transmission waveform, various reception waveforms thereof, and outputs of respective voltage comparators thereof. FIG. 4 is a block diagram showing an embodiment of the present invention, FIG. 4 is a diagram showing an example of a voltage comparator output and a received waveform, FIG. 5 is a diagram showing an implementation example of a time ratio difference measuring circuit, and FIG. 7,4) A diagram showing all code words of the Hamming code, Fig. 7 is a diagram showing an example of a received waveform and a reliability index, and Fig. 8 is a bit error rate characteristic shown in document (2) and its FIG. 6 is a characteristic diagram of each codeword error rate when a decoding method according to the invention is used and when a conventional decoding method is used.

Claims (1)

[Claims] 1. A block code transmitted as an error-correctable code word consisting of a plurality of bits is decoded in bit units by a voltage comparator, and the decoding in bit units is weighted according to reliability. In the block code decoding method for performing error correction decoding by performing the error correction decoding, the difference between the time ratios of the high level and the low level of the output of the voltage comparator for one bit of reproduction in the bit unit decoding process is decoded in bit units. A block code decoding method for determining, as a decoded word, a codeword which is used as a reliability index indicating reliability and which minimizes a sum of the reliability indexes at different bits between each codeword and a received word.