JPS62274811A - Filter control circuit - Google Patents
Filter control circuitInfo
- Publication number
- JPS62274811A JPS62274811A JP11620086A JP11620086A JPS62274811A JP S62274811 A JPS62274811 A JP S62274811A JP 11620086 A JP11620086 A JP 11620086A JP 11620086 A JP11620086 A JP 11620086A JP S62274811 A JPS62274811 A JP S62274811A
- Authority
- JP
- Japan
- Prior art keywords
- frequency
- control circuit
- voltage variable
- conversion
- voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000006243 chemical reaction Methods 0.000 claims abstract description 15
- 238000004519 manufacturing process Methods 0.000 abstract description 3
- 230000010355 oscillation Effects 0.000 description 5
- 101100345673 Xenopus laevis mix-b gene Proteins 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 238000007796 conventional method Methods 0.000 description 2
- 101710170231 Antimicrobial peptide 2 Proteins 0.000 description 1
- AVKUERGKIZMTKX-NJBDSQKTSA-N ampicillin Chemical compound C1([C@@H](N)C(=O)N[C@H]2[C@H]3SC([C@@H](N3C2=O)C(O)=O)(C)C)=CC=CC=C1 AVKUERGKIZMTKX-NJBDSQKTSA-N 0.000 description 1
- 230000004397 blinking Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- HODRFAVLXIFVTR-RKDXNWHRSA-N tevenel Chemical compound NS(=O)(=O)C1=CC=C([C@@H](O)[C@@H](CO)NC(=O)C(Cl)Cl)C=C1 HODRFAVLXIFVTR-RKDXNWHRSA-N 0.000 description 1
Landscapes
- Channel Selection Circuits, Automatic Tuning Circuits (AREA)
- Superheterodyne Receivers (AREA)
- Circuits Of Receivers In General (AREA)
Abstract
Description
【発明の詳細な説明】
３、発明の詳細な説明
［産業上の利用分野］
本発明はＶＨＦ又はＵＨＦ帯域用の受信機の電圧可変型
フィルタに好適なフィルタ制御回路に関する。Detailed Description of the Invention 3. Detailed Description of the Invention [Field of Industrial Application] The present invention relates to a filter control circuit suitable for a variable voltage filter of a receiver for VHF or UHF bands.
［発明の概要コ
ＶＨＦ又はＵＨＦ帯域用の受信機において、電圧可変型
フィルタがＤ−Ａ変換回路を介してマイクロプロセッサ
によりディジタル的に所望の周波数に設定できるように
なっているフィルタ制御回路である。[Summary of the Invention] In a VHF or UHF band receiver, the voltage variable filter is a filter control circuit that can be digitally set to a desired frequency by a microprocessor via a D-A conversion circuit. .
［従来の技％１１１
共振周波数可変の従来の電圧可変型フィルタにおいて、
その共振周波数の制御方法としてはバンド切替をするか
、或いは他の制御系、例えば電圧可変型発振器の制御電
圧を用いて制御していた。[Conventional technique%111 In the conventional voltage variable filter with variable resonant frequency,
The resonance frequency has been controlled by band switching or by using another control system, for example, a control voltage of a voltage variable oscillator.
［発明が解決しようとする問題点］
しかしながらこのような従来の制御方法によると、例え
ば前者の方法では任意のフィルタ周波数を選択できず、
生産時にその周波数を変化調整しなければならないので
、量産性及び汎用性に乏しかった。また後者の方法では
回路間のトラッキング等が複雑となり、調整が困難であ
った。[Problems to be Solved by the Invention] However, according to such conventional control methods, for example, in the former method, it is not possible to select an arbitrary filter frequency;
Since the frequency must be changed and adjusted during production, mass productivity and versatility are poor. Furthermore, in the latter method, tracking between circuits, etc. becomes complicated, making adjustment difficult.
従って、本発明の目的はかかる従来技術の問題点を解決
して周波数調整、バンド幅可変、バンド切替等が容易に
制御できる複雑な調整が不要のフィルタ制御回路を提供
するにある。Therefore, an object of the present invention is to solve the problems of the prior art and provide a filter control circuit that can easily control frequency adjustment, variable bandwidth, band switching, etc., and does not require complicated adjustment.
［問題点を解決するための手段］
本発明は上記目的を達成するため、ＶＨＦ、ＵＨＦ帯域
用の受信機において、電圧可変型フィルタにＤ−Ａ変換
回路を介してマイクロプロセッサから成る周波数制御回
路を接続したことを特徴とする。[Means for Solving the Problems] In order to achieve the above object, the present invention provides a frequency control circuit comprising a microprocessor through a voltage variable filter via a D-A conversion circuit in a receiver for VHF and UHF bands. It is characterized by connecting.
［作用］
周波数チャンネルセット手段の指令により上記周波数制
御回路はＤ−Ａ変換回路に周波数設定用ディジタル信号
を与え、該ディジタル信号に対応する変換電圧がＤ−Ａ
変換回路よの電圧可変型フィルタに印加されて所望の周
波数に設定される。[Operation] According to a command from the frequency channel setting means, the frequency control circuit gives a digital signal for frequency setting to the D-A conversion circuit, and the converted voltage corresponding to the digital signal is set to D-A.
The voltage is applied to a variable voltage filter by a conversion circuit and set to a desired frequency.
［発明の実施例コ
以下図面に示す実施例を参照して本発明を説明すると、
第１図は本発明によるフィルタ制御回路の一実施例とし
て２つの電圧可変型帯域通過フィルタを用いたダブル変
換方式ユニバーサルコンバータを示す。[Embodiments of the Invention] The present invention will be described below with reference to embodiments shown in the drawings.
FIG. 1 shows a double conversion type universal converter using two voltage variable band pass filters as an embodiment of the filter control circuit according to the present invention.
同図において、ＩＮは入力端子、ＯＵＴは出力端子、Ｂ
ＰＦＩ及びＢＰＦ２は夫々第］及び第２の電圧可変型帯
域通過フィルタ、ＭＩＸＩ及びＭＩＸ２は夫々第１及び
第２のミキサ、ＡＭＰｉ。In the same figure, IN is an input terminal, OUT is an output terminal, and B
PFI and BPF2 are the first and second voltage variable band pass filters, MIXI and MIX2 are the first and second mixers, respectively, and AMPi.
ＡＭＰ２及びＡＭＰ３は夫々第１．第２及び第３の増幅
器、丁Ｆ ＢＰＦは中間周波用帯域通過フィルタ、Ｄ
ＡＩ及びＤＡ２は夫々第１−及び第２のＤ−Ａコンバー
タ、ＬＯ５ＣＩ及びＬＯ８Ｃ２は夫々Ｐ Ｌ Ｌ方式の
第１−及び第２の電圧可変型局部発振器、ＣＰＵはマイ
クロプロセッサ、ＣＩ（はチャンネルセット用ディジタ
ルスイッチ、ＲＯＭはＲＯＭメモリ、ＬＡＭは表示ラン
プである。AMP2 and AMP3 are the first. 2nd and 3rd amplifiers, D BPF is intermediate frequency band pass filter, D
AI and DA2 are the first and second DA converters, respectively, LO5CI and LO8C2 are the first and second PLL type variable voltage local oscillators, CPU is the microprocessor, and CI (is the channel set). ROM is a ROM memory, and LAM is an indicator lamp.
図示の如く、第１の電圧可変型帯域通過フィルタＢＰＦ
Ｉ、第１の増幅器ＡＭＰＩ、第１−のミキサＭＩＸＩ、
中間周波用帯域通過フィルタＩＦＢ Ｐ Ｆ、第２の増
幅器ＡＭ、Ｐ２、第２のミキサＭＩＸ２、第２の電圧可
変型帯域通過フィルタＢＰＦ２及び第３の増幅器Ａ、、
Ｍ Ｐ ３は夫々この順に直列に入出力端子ＩＮ、ｏ
ＵＴ間に接続されている。As shown in the figure, the first voltage variable band pass filter BPF
I, first amplifier AMPI, first mixer MIXI,
Intermediate frequency band pass filter IFB P F, second amplifier AM, P2, second mixer MIX2, second voltage variable band pass filter BPF2, and third amplifier A.
M P3 has input/output terminals IN, o connected in series in this order, respectively.
Connected between UTs.
そして、第１及び第２の電圧可変型帯域通過フィー３＝
ルタＢＰＦＩ及びＢＰＦ２は第１及び第２のＤ−Ａコン
バータＤＡＩ及びＤＡ２を介してマイクロプロセッサＣ
ＰＵに結合され、また第１及び第２の局部発振器ＬＯ８
ＣＩ及びＬＯ８Ｃ２はマイクロプロセッサＣＰＵに結合
され、夫々の局部発振周波数ｆ、、ｆ２の出力を第１及
び第２のミキサＭＩＸＩ、ＭＩＸ２に供給している。The first and second voltage variable bandpass filters BPFI and BPF2 are connected to the microprocessor C via the first and second D-A converters DAI and DA2.
coupled to the PU and also the first and second local oscillators LO8
CI and LO8C2 are coupled to the microprocessor CPU and supply outputs of respective local oscillation frequencies f, , f2 to first and second mixers MIXI, MIX2.
更に第１図のユニバーサルコンバータはその中間周波数
をＶＨＦチャンネルとＵＨＦチャンネルとの間に設定す
ると共に前記第１及び第２の局部発振周波数ｆ、、ｆ２
の大部分をテレビチャンネル帯域外（一部寄域内となる
部分ではすべてＵＨＦチャンネルのバンドエツジとなる
ようにする）に選定する。またＲＯＭメモリには周波数
チャンネル変換に必要な各回路に対する制御ステップを
指示するプログラム等が予めメモリされている。Furthermore, the universal converter shown in FIG. 1 has its intermediate frequency set between the VHF channel and the UHF channel, and the first and second local oscillation frequencies f, , f2
Most of the channels are selected to be outside the TV channel band (parts within the band are all set to the UHF channel band edge). Further, the ROM memory stores in advance a program etc. that instructs control steps for each circuit necessary for frequency channel conversion.
さて、入力チャンネル及びこれを変換すべき出力チャン
ネルを決定すると、ディジタルスイッチＣＨにセットす
ることによりマイクロプロセッサＣＰＵにその入出力チ
ャンネルデータが読み込まれ、マイクロプロセッサはＲ
ＯＭメモリのプログラムに従って入力チャンネルに応じ
た局部発振周波数を指示するデータを第１−の局部発振
器ＬＯ８Ｃ１に、また第１の帯域通過フィルタＢＰＦＩ
の通過帯域を指示するデータを第１のＤ−Ａコンバータ
ＤＡＩに夫々与えると共に出力チャンネルに応じた局部
発振周波数を指示するデータを第２の局部発振器Ｌ Ｏ
Ｓ Ｃ２に、また第２の帯域通過フィルタＢＰＦ２の通
過帯域を指示するデータを第２のＤ−ＡコンバータＤＡ
２に夫々与える。これにより上記局部発振器ＬＯ８ＣＩ
、ＬＯ８Ｃ２゜Ｄ−ＡコンバータＤＡＩ、ＤＡ、２では
上記データによって夫々の制御電圧を決定し、各制御電
圧によって前記局部発振周波数ｆ工＋ ｆ２及び通過帯
域がロックされる。第２図はマイクロプロセッサＣＰ
Ｕの制御動作を示すフローチャートである。Now, once the input channel and the output channel to be converted are determined, the input/output channel data is read into the microprocessor CPU by setting the digital switch CH.
According to the program in the OM memory, data instructing the local oscillation frequency according to the input channel is sent to the first local oscillator LO8C1, and also to the first bandpass filter BPFI.
The data instructing the passband of each output channel is given to the first D-A converter DAI, and the data instructing the local oscillation frequency according to the output channel is given to the second local oscillator LO.
S C2 and data indicating the pass band of the second band pass filter BPF2 are sent to the second DA converter DA.
Give each to 2. As a result, the above local oscillator LO8CI
, LO8C2° D-A converters DAI, DA, 2 determine respective control voltages based on the above data, and the local oscillation frequency f + f2 and the pass band are locked by each control voltage. Figure 2 shows the microprocessor CP
3 is a flowchart showing the control operation of U.
なお上記チャンネル変換が不可の場合は表示ランプＬＡ
Ｍの点滅によってまた可能な場合は点灯させることによ
って知るようにすることができる。In addition, if the above channel conversion is not possible, the indicator lamp LA
This can be determined by blinking M or, if possible, by lighting it.
また中間周波数においてビデオ信号の映像及び音声レベ
ルを各々可変する手段を付設し、これをマイクロプロセ
ッサで制御するようにすれば、上記実施例のユニバーサ
ルコンバータをチャンネルプロセッサとしても使用でき
る。Furthermore, by adding means for varying the video and audio levels of the video signal at intermediate frequencies and controlling these with a microprocessor, the universal converter of the above embodiment can also be used as a channel processor.
なお上述の実施例では電圧可変型帯域通過フィルタを用
いるとしたが、これのみに限定されないこと勿論で、ま
た上記フィルタを広帯域増幅器の前段に設けてチャンネ
ル専用の増幅器として使用する場合等にも本発明を適用
できる。Although the above-mentioned embodiment uses a voltage variable band-pass filter, it is of course not limited to this, and the present invention can also be applied when the above-mentioned filter is provided in the front stage of a wideband amplifier and used as a channel-dedicated amplifier. The invention can be applied.
［発明の効果］
以上説明したように本発明によれば従来の方法よりも容
易に任意の周波数が選択できるため、製作時にその都度
周波数を調節する必要がなく、量産性に富んだ汎用性の
高い電圧可変型フィルタの制御回路を実現することがで
きる。[Effects of the Invention] As explained above, according to the present invention, any frequency can be selected more easily than the conventional method, so there is no need to adjust the frequency each time during production, and it is highly versatile and easy to mass produce. A control circuit for a high voltage variable filter can be realized.
第１図は本発明の一実施例を示すブロック図、第２図は
その動作を示すフローチャートである。
ＢＰＦＩ、ＢＰＦ２・・・第１．第２の電圧可変型帯域
通過フィルタ、
ＬＯ８ＣＩ、ＬＯ８Ｃ２・・・第１．第２の電圧可変型
局部発振器、
ＣＰＵ・・・マイクロプロセッサ、
ＣＨ・・・ディジタルスイッチ。
一７＝FIG. 1 is a block diagram showing one embodiment of the present invention, and FIG. 2 is a flow chart showing its operation. BPFI, BPF2... 1st. Second voltage variable band pass filter, LO8CI, LO8C2...first. Second variable voltage local oscillator, CPU...microprocessor, CH...digital switch. 17=
Claims (1)
フィルタにＤ−Ａ変換回路を介してマイクロプロセッサ
から成る周波数制御回路を接続し、周波数チャンネルセ
ット手段の指令により上記周波数制御回路からＤ−Ａ変
換回路に周波数設定用ディジタル信号が与えられ、該デ
ィジタル信号に対応する変換電圧が上記Ｄ−Ａ変換回路
より前記電圧可変型フィルタに印加されて所望の周波数
に設定されるように構成したことを特徴とするフィルタ
制御回路。In a VHF or UHF band receiver, a frequency control circuit consisting of a microprocessor is connected to a variable voltage filter via a D-A conversion circuit, and the frequency control circuit performs D-A conversion according to a command from a frequency channel setting means. A frequency setting digital signal is applied to the circuit, and a converted voltage corresponding to the digital signal is applied from the D-A conversion circuit to the voltage variable filter to set the desired frequency. filter control circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11620086A JPS62274811A (en) | 1986-05-22 | 1986-05-22 | Filter control circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11620086A JPS62274811A (en) | 1986-05-22 | 1986-05-22 | Filter control circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62274811A true JPS62274811A (en) | 1987-11-28 |
Family
ID=14681314
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11620086A Pending JPS62274811A (en) | 1986-05-22 | 1986-05-22 | Filter control circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62274811A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04332220A (en) * | 1991-05-08 | 1992-11-19 | Fujitsu Ltd | Wide band receiver |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6181034A (en) * | 1984-09-28 | 1986-04-24 | Sony Corp | Receiver |
| JPS61228716A (en) * | 1985-04-02 | 1986-10-11 | Matsushita Electric Ind Co Ltd | Input stage filter tuning device for tuner |
| JPS628612A (en) * | 1985-07-05 | 1987-01-16 | Matsushita Electric Ind Co Ltd | Input stage filter tuning device for tuner |
-
1986
- 1986-05-22 JP JP11620086A patent/JPS62274811A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6181034A (en) * | 1984-09-28 | 1986-04-24 | Sony Corp | Receiver |
| JPS61228716A (en) * | 1985-04-02 | 1986-10-11 | Matsushita Electric Ind Co Ltd | Input stage filter tuning device for tuner |
| JPS628612A (en) * | 1985-07-05 | 1987-01-16 | Matsushita Electric Ind Co Ltd | Input stage filter tuning device for tuner |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04332220A (en) * | 1991-05-08 | 1992-11-19 | Fujitsu Ltd | Wide band receiver |
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