JPS62271466A - Bipolar transistor and manufacture thereof - Google Patents

Abstract

PURPOSE:To reduce the effective area of an emitter region without altering the area of an emitter contact region by implanting ions to the same semiconductor as the emitter region in the periphery of the emitter region and forming an insulating region. CONSTITUTION:A collector contact region 32 containing a high-concentration N type impurity, a collector region 33 containing an N-type impurity, a base region 34 containing a high-concentration P-type impurity, N-type impurity containing layers 35, 37 and an emitter contact region 36 are shaped onto a semi-insulating GaAs substrate 31 in succession. The insulating region 37 is formed around the emitter region 35 by deeply implanting oxygen ions. The whole is thermally treated, the heads of the regions 34, 32 are exposed successively through mesa etching to a stepped shape, and a collector electrode 7, an emitter electrode 9 and a base electrode 8 are shaped.

Description

Detailed Description of the Invention 3. Detailed Description of the Invention Field of Industrial Application The present invention relates to a bipolar transistor and a method of manufacturing the same.

Conventional technology Trends in semiconductor devices are toward higher density integration, higher speeds, and higher frequencies. In bipolar transistors, the fundamental performance factor when considering higher frequencies is the cutoff frequency ft. ft is generally expressed as:

ft = 1/ (2πτec) ・・1ll
r e c = r e + r b + r c +
r c ' (21) Here, τe is the emitter depletion layer charging time, τb is the base transit time, τC is the collector depletion layer transit time, and τC° is the collector depletion layer charging time.

In equation (2), τe and τC' are proportional to the resistance valves in the emitter region and collector region. When the transistor size is reduced through miniaturization, the resistance valve increases in inverse proportion to its area, so τe and τC° increase, and the ftO value decreases. This resistance valve is represented by the sum of the internal resistance of each region and the contact resistance due to ohmic electrodes provided in each region. Therefore, reducing contact resistance is a necessary requirement for increasing the frequency of bipolar transistors. The higher the concentration of conductive impurities contained in a semiconductor, the easier it is for an ohmic electrode to be formed. Therefore, in a bipolar transistor that has an emitter region in the top layer, if the impurity concentration of the emitter region is low, a high concentration conductive electrode is generally formed on the emitter region. An emitter contact region is provided with a base impurity.

In the case of a mesa-type (trapezoidal) bipolar transistor formed by conventional film growth, the emitter region and the emitter contact BM region thereon have the same area. The fourth example is
As shown in the figure.

A collector contact region 2, a collector region 3, a base region 4, an emitter region 5, and an emitter contact region 6 are formed in this order on the semiconductor substrate 1, and on the collector contact region 6, a collector electrode 7 in ohmink contact is formed.
A base electrode 8 and an emitter electrode 9 are each formed.

Problems to be Solved by the Invention However, in the above structure, the emitter contact region of the top layer, which is most affected by area reduction due to miniaturization of transistor size, is limited to the area of the emitter region immediately below it, and As the technology advances, it becomes difficult to obtain a sufficiently low contact resistance, which hinders higher frequencies.

The present invention greatly improves the above-mentioned conventional problems,
It is an object of the present invention to provide a bipolar transistor having a configuration that eliminates an increase in contact resistance due to a decrease in area, and a method for manufacturing the same.

Means for Solving the Problems In order to solve the above problems, the bipolar transistor of the present invention includes forming an insulating region around the emitter region under the emitter/vine contact region of the uppermost layer by ion implantation.
It is characterized by having a configuration in which the effective area of the emitter region is reduced without changing the area of the emitter contact region, and an effect equivalent to miniaturization of the transistor size is obtained.

Effect The bipolar transistor with the above configuration has an emitter contact area larger than the area of the emitter area when compared with a bipolar transistor with the conventional configuration having the same emitter area area. Contact resistance can be lowered, and the resulting reduction in the number of resistance valves greatly contributes to higher frequencies of bipolar transistors.

EXAMPLE Hereinafter, an example of the present invention will be described based on FIGS. 1 to 3.

FIG. 1 is a cross-sectional view of a GaAs bipolar transistor in a first embodiment of the present invention. First, semi-insulating G
On the aAs substrate 31 are formed a collector contact layer containing a high concentration n-type impurity, which becomes the collector contact region 32, a collector layer containing n-type impurity, which becomes the collector region 33, and a collector layer containing a high concentration n-type impurity, which becomes the base region 34. A base layer, an emitter layer containing n-type impurities that will become the emitter region 35, and an emitter contact layer that will become the emitter contact region 36 are sequentially formed by film growth, and oxygen ions are deeply implanted to insulate a part of the emitter layer. , insulation region 37
form. After the heat treatment, stepwise mesa etching is performed to sequentially locate the base region 34 and the collector contact region 32. Next, A becomes an n-type Ohmifuku electrode.
With uGe, the collector electrode 7 and the emitter electrode 9 are connected to the collector contact region 32 and the emitter contact region 3.
A is formed on 6 and heat-treated to become a p-type ohmic electrode.
A base electrode 8 made of uZn is formed on the base region 34 to complete the GaAs bipolar transistor in this embodiment.

The order of the heat treatment and mesa etching in the above manufacturing process may be changed.

FIG. 2 shows GaAs-A in a second embodiment of the present invention.
FIG. 1 is a cross-sectional view of an lxGa 1-xAs heterojunction bipolar transistor (hereinafter referred to as rHBTJ). Also the third
The figure is a configuration diagram of the HBT of FIG. 2 viewed from directly above. This HBT is a bipolar transistor that uses a semiconductor in the emitter region that has a larger band gap than the semiconductor used in the base region, and is theoretically characterized by being better at higher frequencies than a normal bipolar transistor. The above formulas (1) 2 and (2) are HI3
The same holds true for T.

The manufacturing process of this embodiment is similar to that of the first embodiment shown in FIG.
In order to grow the xAs film and to form the insulating region 39, oxygen ions are implanted deeper to form the base region 34.
The difference is that even the periphery of the device is insulated.

In FIG. 1, since the insulating region 37 is formed on the base region 34, even if the effective area of the emitter region 35 is reduced,
Although the base region 34 is configured not to be made small, in this embodiment, as shown in FIGS. 2 and 3, the effective areas of the emitter region 38 and the base region 34 can be greatly reduced by the insulating region 39. In FIG. 3, the emitter electrode 9 of the uppermost layer is
Although it has a T-shaped emitter electrode, it is also effective to delete one insulating region and form a T-shaped emitter electrode.

Effects of the Invention As described above, in the bipolar transistor having the structure of the present invention, the area of the emitter contact region can be made larger than the area serving as the emitter region, so that the contact resistance can be lowered. This prevents an increase in contact resistance at the emitter electrode portion, which is a problem when miniaturizing bipolar transistors, and greatly contributes to increasing the frequency of bipolar transistors.

[Brief explanation of the drawing]

FIG. 1 is a sectional view showing the structure of a first embodiment of the present invention, FIG. 2 is a sectional view showing the structure of a second embodiment of the invention, and FIG.
This figure is a configuration diagram when FIG. 2 is viewed from directly above, and FIG. 4 is a sectional view showing the configuration of a conventional bipolar transistor. 7...Collector electrode, 8...Base electrode, 9...Emitter electrode, 31...Semi-insulating GaAs substrate, 32... Collector contact 6M area, 33... Collector area, 34.
...Base region, 35.38 ...Emitter region, 36 ...Emitter contact region, 3
7.39... Insulation area. Name of agent: Patent attorney Toshio Nakao 1 name 7 - Collector also 7 Mayuzuda δ - - German 7 - E ξ... 7 Takujo 5 lights - Emi 7 First diagram? Jδ--1 Emi Tsuta R Junroku, J7-...Yasui' I or Fig. 2 Fig. 3/-11 Semiconductor A Honko 4 Atsu 2-- Kore 77 Con 77) 4A 6-° Emmy 174 Shell 1=-1 Emi Nokuko〉7ri) 2 order 3 bills N4 figure de

Claims (4)

[Claims] (1) On the semiconductor substrate, in order from the substrate side, a collector region,
It has a base region and an emitter region, and has an insulating region formed using at least the semiconductor used for the emitter region adjacent to the periphery of the emitter region to facilitate ohmic contact to the emitter region. A bipolar transistor, comprising: an emitter contact region on the emitter region and the insulating region; and an emitter electrode in ohmic contact with the emitter contact region. (2) The bipolar transistor according to claim (1), characterized in that the emitter region is made of a semiconductor having a larger bandgap than the semiconductor used for at least the base region. (3) A collector layer for forming a collector region, a base layer for forming a base region, an emitter layer for forming an emitter region, and an emitter for facilitating ohmic contact to the emitter region on the semiconductor substrate. a step of sequentially forming an emitter contact layer for forming a contact region by film growth; a step of forming at least an insulating region adjacent to the periphery of the emitter region by deep ion implantation; and a step of forming an ohmic contact on the emitter contact region. 1. A method for manufacturing a bipolar transistor, comprising the step of forming an emitter electrode. (4) The step of forming the insulating region includes the step of forming at least the insulating region adjacent to the peripheral portions of the emitter region and the base region by deep ion implantation. A method for manufacturing bipolar transistors.