JPS622708B2 - - Google Patents
Info
- Publication number
- JPS622708B2 JPS622708B2 JP56097349A JP9734981A JPS622708B2 JP S622708 B2 JPS622708 B2 JP S622708B2 JP 56097349 A JP56097349 A JP 56097349A JP 9734981 A JP9734981 A JP 9734981A JP S622708 B2 JPS622708 B2 JP S622708B2
- Authority
- JP
- Japan
- Prior art keywords
- mask
- layer
- semiconductor body
- oxidation
- oxidation treatment
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H10P76/40—
-
- H10P14/61—
-
- H10W10/0126—
-
- H10W10/13—
-
- H10W20/20—
Landscapes
- Element Separation (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Local Oxidation Of Silicon (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| NL8003612A NL8003612A (nl) | 1980-06-23 | 1980-06-23 | Werkwijze ter vervaardiging van een halfgeleider- inrichting en halfgeleiderinrichting vervaardigd door toepassing van deze werkwijze. |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5731180A JPS5731180A (en) | 1982-02-19 |
| JPS622708B2 true JPS622708B2 (index.php) | 1987-01-21 |
Family
ID=19835496
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9734981A Granted JPS5731180A (en) | 1980-06-23 | 1981-06-23 | Method of producing semiconductor device |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US4374454A (index.php) |
| EP (1) | EP0042643B1 (index.php) |
| JP (1) | JPS5731180A (index.php) |
| AU (1) | AU545453B2 (index.php) |
| CA (1) | CA1163378A (index.php) |
| DE (1) | DE3164132D1 (index.php) |
| IE (1) | IE51994B1 (index.php) |
| NL (1) | NL8003612A (index.php) |
Families Citing this family (24)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4561168A (en) * | 1982-11-22 | 1985-12-31 | Siliconix Incorporated | Method of making shadow isolated metal DMOS FET device |
| JPS62119936A (ja) * | 1985-11-19 | 1987-06-01 | Fujitsu Ltd | コンプリメンタリ−lsiチツプ |
| GB2215124A (en) * | 1988-02-16 | 1989-09-13 | Stc Plc | Integrated circuit underpasses |
| US5306652A (en) * | 1991-12-30 | 1994-04-26 | Texas Instruments Incorporated | Lateral double diffused insulated gate field effect transistor fabrication process |
| EP0940851B1 (en) | 1992-07-31 | 2005-10-05 | Hughes Electronics Corporation | Integrated circuit security system and method with implanted interconnections |
| KR0144902B1 (ko) * | 1995-04-17 | 1998-07-01 | 김광호 | 불휘발성 메모리장치 및 그 제조방법 |
| US5783846A (en) * | 1995-09-22 | 1998-07-21 | Hughes Electronics Corporation | Digital circuit with transistor geometry and channel stops providing camouflage against reverse engineering |
| US5767000A (en) * | 1996-06-05 | 1998-06-16 | Advanced Micro Devices, Inc. | Method of manufacturing subfield conductive layer |
| US5973375A (en) * | 1997-06-06 | 1999-10-26 | Hughes Electronics Corporation | Camouflaged circuit structure with step implants |
| US6396368B1 (en) | 1999-11-10 | 2002-05-28 | Hrl Laboratories, Llc | CMOS-compatible MEM switches and method of making |
| US7217977B2 (en) * | 2004-04-19 | 2007-05-15 | Hrl Laboratories, Llc | Covert transformation of transistor properties as a circuit protection method |
| US6815816B1 (en) * | 2000-10-25 | 2004-11-09 | Hrl Laboratories, Llc | Implanted hidden interconnections in a semiconductor device for preventing reverse engineering |
| US6791191B2 (en) | 2001-01-24 | 2004-09-14 | Hrl Laboratories, Llc | Integrated circuits protected against reverse engineering and method for fabricating the same using vias without metal terminations |
| US7294935B2 (en) * | 2001-01-24 | 2007-11-13 | Hrl Laboratories, Llc | Integrated circuits protected against reverse engineering and method for fabricating the same using an apparent metal contact line terminating on field oxide |
| US6740942B2 (en) * | 2001-06-15 | 2004-05-25 | Hrl Laboratories, Llc. | Permanently on transistor implemented using a double polysilicon layer CMOS process with buried contact |
| US6774413B2 (en) | 2001-06-15 | 2004-08-10 | Hrl Laboratories, Llc | Integrated circuit structure with programmable connector/isolator |
| US6897535B2 (en) | 2002-05-14 | 2005-05-24 | Hrl Laboratories, Llc | Integrated circuit with reverse engineering protection |
| US7049667B2 (en) | 2002-09-27 | 2006-05-23 | Hrl Laboratories, Llc | Conductive channel pseudo block process and circuit to inhibit reverse engineering |
| US6979606B2 (en) | 2002-11-22 | 2005-12-27 | Hrl Laboratories, Llc | Use of silicon block process step to camouflage a false transistor |
| AU2003293540A1 (en) * | 2002-12-13 | 2004-07-09 | Raytheon Company | Integrated circuit modification using well implants |
| US6799844B2 (en) | 2002-12-16 | 2004-10-05 | Xerox Corporation | High shear ball check valve device and a liquid ink image producing machine using same |
| JP4346322B2 (ja) * | 2003-02-07 | 2009-10-21 | 株式会社ルネサステクノロジ | 半導体装置 |
| US7242063B1 (en) | 2004-06-29 | 2007-07-10 | Hrl Laboratories, Llc | Symmetric non-intrusive and covert technique to render a transistor permanently non-operable |
| US8168487B2 (en) * | 2006-09-28 | 2012-05-01 | Hrl Laboratories, Llc | Programmable connection and isolation of active regions in an integrated circuit using ambiguous features to confuse a reverse engineer |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5528229B1 (index.php) * | 1971-03-19 | 1980-07-26 | ||
| US3751722A (en) * | 1971-04-30 | 1973-08-07 | Standard Microsyst Smc | Mos integrated circuit with substrate containing selectively formed resistivity regions |
| US4023195A (en) * | 1974-10-23 | 1977-05-10 | Smc Microsystems Corporation | MOS field-effect transistor structure with mesa-like contact and gate areas and selectively deeper junctions |
| NL185376C (nl) * | 1976-10-25 | 1990-03-16 | Philips Nv | Werkwijze ter vervaardiging van een halfgeleiderinrichting. |
| US4290184A (en) * | 1978-03-20 | 1981-09-22 | Texas Instruments Incorporated | Method of making post-metal programmable MOS read only memory |
| US4268950A (en) * | 1978-06-05 | 1981-05-26 | Texas Instruments Incorporated | Post-metal ion implant programmable MOS read only memory |
| IT1166587B (it) * | 1979-01-22 | 1987-05-05 | Ates Componenti Elettron | Processo per la fabbricazione di transistori mos complementari ad alta integrazione per tensioni elevate |
-
1980
- 1980-06-23 NL NL8003612A patent/NL8003612A/nl not_active Application Discontinuation
- 1980-12-22 US US06/219,161 patent/US4374454A/en not_active Expired - Lifetime
-
1981
- 1981-06-11 EP EP81200640A patent/EP0042643B1/en not_active Expired
- 1981-06-11 DE DE8181200640T patent/DE3164132D1/de not_active Expired
- 1981-06-18 CA CA000380108A patent/CA1163378A/en not_active Expired
- 1981-06-22 IE IE1379/81A patent/IE51994B1/en not_active IP Right Cessation
- 1981-06-22 AU AU72031/81A patent/AU545453B2/en not_active Ceased
- 1981-06-23 JP JP9734981A patent/JPS5731180A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| CA1163378A (en) | 1984-03-06 |
| IE51994B1 (en) | 1987-05-13 |
| DE3164132D1 (en) | 1984-07-19 |
| EP0042643B1 (en) | 1984-06-13 |
| AU545453B2 (en) | 1985-07-18 |
| IE811379L (en) | 1981-12-23 |
| NL8003612A (nl) | 1982-01-18 |
| AU7203181A (en) | 1982-01-07 |
| US4374454A (en) | 1983-02-22 |
| EP0042643A1 (en) | 1981-12-30 |
| JPS5731180A (en) | 1982-02-19 |
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