JPS62268151A - Lead frame for integrated circuit - Google Patents
Lead frame for integrated circuitInfo
- Publication number
- JPS62268151A JPS62268151A JP11074186A JP11074186A JPS62268151A JP S62268151 A JPS62268151 A JP S62268151A JP 11074186 A JP11074186 A JP 11074186A JP 11074186 A JP11074186 A JP 11074186A JP S62268151 A JPS62268151 A JP S62268151A
- Authority
- JP
- Japan
- Prior art keywords
- lead frame
- sections
- cut
- erected
- integrated circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000012778 molding material Substances 0.000 claims abstract description 5
- 239000011347 resin Substances 0.000 abstract description 3
- 229920005989 resin Polymers 0.000 abstract description 3
- 230000020169 heat generation Effects 0.000 abstract description 2
- 238000004080 punching Methods 0.000 abstract 1
- 230000000694 effects Effects 0.000 description 4
- 238000012536 packaging technology Methods 0.000 description 4
- 230000010365 information processing Effects 0.000 description 3
- 239000000463 material Substances 0.000 description 2
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 2
- 238000003491 array Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 230000008054 signal transmission Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3142—Sealing arrangements between parts, e.g. adhesion promotors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
- H01L23/49548—Cross section geometry
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野J
本発明は、多機能化、高速化に適しかつ高耐湿注全有す
る集積回路用リードフレームに関する。DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field J] The present invention relates to a lead frame for integrated circuits that is suitable for multi-functionality and high speed, and has high moisture resistance.
〔従来の技術J
高速情報処理装置ば、高密度にチップが配列される。こ
の高速情報処理装置の性能2価格及び信頼性は、各チッ
プへの電力供給や各チッ7闇の信号伝送用の配線等いわ
ゆるパッケージ技術〉こ左右される。[Prior Art J] In high-speed information processing devices, chips are arranged at high density. The performance, price, and reliability of this high-speed information processing device depend on so-called packaging technology, such as power supply to each chip and wiring for signal transmission between each chip.
又、高密′定Kチップが配列されると、大きな供給電力
が必要になり、これに伴って、相当の絹が発生する。Also, when a high density constant-K chip is arranged, a large amount of power is required, and a considerable amount of silk is generated accordingly.
この熱は、回路の正常作動に大きな影響を及ぼすので、
この大量の熱をいかにして逃がすかが、パッケージ技術
の最大の技術的課題ということができる。This heat has a major effect on the normal operation of the circuit, so
How to dissipate this large amount of heat can be said to be the biggest technical challenge in packaging technology.
従来のリードフレーム(特開昭59−178756号)
は、第5図に示すように、モールド材の中に埋没される
!/ −F 7レームの一部に孔5及び切ジ欠き部6を
設け、リードフレーム3(金PA)と樹脂4の熱膨張差
によって生ずる隙間よシ侵人する水分a、b全防止し、
耐湿性を向上したものがある。Conventional lead frame (Japanese Patent Application Laid-open No. 178756/1983)
is buried in the mold material, as shown in Figure 5! / -F 7 A hole 5 and a notch 6 are provided in a part of the frame to completely prevent moisture a and b from entering the gap caused by the difference in thermal expansion between the lead frame 3 (gold PA) and the resin 4.
Some have improved moisture resistance.
〔発明が解決しようとする問題点J
然しながら、上記従来のリードフレームは、孔5及び切
り欠き6を設けたので、リードフレームの熱容量が小さ
くな)、その分だけ、熱抵抗が増加し、孔及び切り欠き
を設けないリードフレームに比べて、大量の熱を発生す
るという欠点があった。[Problem to be Solved by the Invention J] However, since the conventional lead frame described above has the hole 5 and the notch 6, the heat capacity of the lead frame is small). Also, compared to a lead frame without a notch, it has the disadvantage of generating a large amount of heat.
その結果、チップ配列の高密度化に限界が生じ、高性能
でかつ信頼性の高い高速処理装置とすることができず、
上記熱の問題を解決したパッケージ技術の開発が急がれ
ているのが現状である。As a result, there was a limit to increasing the density of chip arrays, making it impossible to create high-performance and reliable high-speed processing devices.
At present, there is an urgent need to develop packaging technology that solves the above heat problem.
上記問題点を解決するために本発明は、リードフレーム
の熱抵抗を増加させることなく、かつ、水分の侵入を防
止Tるようにしたものでおり、集積回路用リードフレー
ムの外部導出リードのモールド材埋没部又はタブ部近傍
に、−面が一口するように蒲鉾状の切り越しを設けたも
のである。In order to solve the above-mentioned problems, the present invention is designed to prevent the intrusion of moisture without increasing the thermal resistance of the lead frame. A semi-cylindrical cutout is provided in the vicinity of the buried part of the material or the tab part so that the negative side can be cut out.
〔作用j
以上のように構成することだより、切り起こされたリー
ドフレームは、熱抵抗は増加せず従って、大量の発熱は
起らない。又、侵入してくる水分は、−面開口された部
分で遮断され、耐湿性は維持される。[Operation j] With the structure described above, the cut and raised lead frame does not increase its thermal resistance and therefore does not generate a large amount of heat. In addition, invading moisture is blocked by the opening on the negative side, and moisture resistance is maintained.
〔実施例J
以下、本発明の一実施例について説明する。第1図に集
積回路1ヶ分のリードフレームを示す。[Example J Hereinafter, an example of the present invention will be described. Figure 1 shows a lead frame for one integrated circuit.
1けリードフレームであり、2は、外部導出リードのモ
ールド材埋没部又は、タブ近傍に設けた凸状部分である
。It is a 1-digit lead frame, and 2 is a convex part provided near the molding material buried part of the external lead or the tab.
この凸状部2の形状を第2図乃至第4図に示す。The shape of this convex portion 2 is shown in FIGS. 2 to 4.
第2図に示す凸状部2の形状は、−面に開口部7を有し
、円弧状の蒲鉾状にリードフレーム1をプレス加工に1
9切り起したものである。又第4図に示すものけ、−面
に開口部7を有し、角状の蒲鉾状だリードフレーム1を
プレス力ロエによ)切シ起したものである。The shape of the convex portion 2 shown in FIG.
9. The lead frame 1 shown in FIG. 4 has an opening 7 on the negative side and is formed by cutting and raising an angular, semicircular lead frame 1 using a pressing force.
又第3図に示すものは、リードフレーム1の表と裏側に
、第2図に示す凸状部2を設けたものである。勿論、第
4図に示す凸状をリードフレーム1の表と裏に設けても
よい。The one shown in FIG. 3 has convex portions 2 shown in FIG. 2 on the front and back sides of the lead frame 1. Of course, the convex shapes shown in FIG. 4 may be provided on the front and back sides of the lead frame 1.
以上のように構成した本実施例において、リードフレー
ム1を打ち抜かずに切シ起したので、熱抵抗は変らず、
従って、供給電力だよる大計の発熱は、起らない。又、
リードフレーム1とモールドされる樹脂との間よう侵入
してくる水分は、開ロアにより遮断され、水分の侵入は
起らない。In this embodiment configured as above, the lead frame 1 was cut and raised without being punched, so the thermal resistance remained unchanged.
Therefore, no large amount of heat is generated due to the power supply. or,
Moisture that enters between the lead frame 1 and the resin to be molded is blocked by the open lower door, and no water enters.
以上詳述した通力、本発明に係る集積回路用リードフレ
ームによれば、リードフレームの外部導出リードのモー
ルド材埋没部分又は、タブ部近傍に相当する部分に、−
面が開口する蒲鉾状の切り起しを設けたので、その部分
の熱抵抗は増加せず、供給される電力による大量の発熱
は起らない。According to the lead frame for an integrated circuit according to the present invention, the conductive force described in detail above, -
Since a semicircular cut-out with an open surface is provided, the thermal resistance of that part does not increase, and a large amount of heat is not generated by the supplied electric power.
又、侵入してくる水分け、開口する面により遮断される
ので水分の侵入はなく、高耐湿性のリードフレームとす
ることができた。In addition, since the intruding water is blocked by the open surface, there is no intrusion of moisture, and a highly moisture-resistant lead frame can be obtained.
このように、パッケージ技術における熱発生の問題と耐
湿性の問題を同時に解決し、チッグの尚密度の配列が可
能になり、高性能でかつ信須性の高い高速情報処理装置
を得ることができ、産業上果す効果は顕著なものがめる
。In this way, the problems of heat generation and moisture resistance in packaging technology can be solved at the same time, making it possible to arrange chips in a more dense manner, making it possible to obtain high-performance and highly reliable high-speed information processing equipment. , the industrial effect is remarkable.
又、大雪の熱が発生しないことから、プラスチックパッ
ケージ他が可能になり、価格を大巾に低減することがで
き、性能、信頼性1価格の点ですべて満足される等、優
れた効果を有する。In addition, since the heat from heavy snow is not generated, it is possible to use plastic packaging, etc., and the price can be greatly reduced, and it has excellent effects such as satisfying all aspects of performance, reliability, and price. .
第1図乃至第4図は、本発明の一実施例を示す図であ)
、第1図は、リードフレームの斜視図。
第2図は、円弧状の蒲鉾状凸状部を示す斜視図。
第3図は、リードフレームの表側と裏側に円弧状の蒲鉾
状の凸状部を設けた斜視図、第4図は、角形の蒲鉾状の
凸状部を示す斜視図でるる。
第5図は、従来のリードフレームを示す平面図である。
1・・・リードフレーム、2・・・凸状部、7・・・開
口面。1 to 4 are diagrams showing one embodiment of the present invention)
, FIG. 1 is a perspective view of the lead frame. FIG. 2 is a perspective view showing an arcuate semicylindrical convex portion. FIG. 3 is a perspective view showing the arcuate semicircular convex portions provided on the front and back sides of the lead frame, and FIG. 4 is a perspective view showing the square semicylindrical convex portions. FIG. 5 is a plan view showing a conventional lead frame. DESCRIPTION OF SYMBOLS 1... Lead frame, 2... Convex part, 7... Opening surface.
Claims (1)
材埋没部又はタブ部近傍に一面が開口するように蒲鉾状
の切り起しを設けて成る集積回路用リードフレーム。A lead frame for an integrated circuit comprising a semi-cylindrical cut-out so that one side is open in the vicinity of a molding material buried part or a tab part of an external lead of the lead frame for an integrated circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11074186A JPS62268151A (en) | 1986-05-16 | 1986-05-16 | Lead frame for integrated circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11074186A JPS62268151A (en) | 1986-05-16 | 1986-05-16 | Lead frame for integrated circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS62268151A true JPS62268151A (en) | 1987-11-20 |
Family
ID=14543351
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11074186A Pending JPS62268151A (en) | 1986-05-16 | 1986-05-16 | Lead frame for integrated circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS62268151A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0345760A2 (en) * | 1988-06-08 | 1989-12-13 | STMicroelectronics S.r.l. | Semiconductor device in plastic case with means of anchoring between chip-bearing slice and plastic body |
US5397915A (en) * | 1991-02-12 | 1995-03-14 | Matsushita Electronics Corporation | Semiconductor element mounting die pad including a plurality of extending portions |
JPH07235629A (en) * | 1994-02-23 | 1995-09-05 | Nec Corp | Semiconductor device and manufacture thereof |
-
1986
- 1986-05-16 JP JP11074186A patent/JPS62268151A/en active Pending
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0345760A2 (en) * | 1988-06-08 | 1989-12-13 | STMicroelectronics S.r.l. | Semiconductor device in plastic case with means of anchoring between chip-bearing slice and plastic body |
EP0345760A3 (en) * | 1988-06-08 | 1990-11-14 | STMicroelectronics S.r.l. | Semiconductor device in plastic case with means of anchoring between chip-bearing slice and plastic body |
US5397915A (en) * | 1991-02-12 | 1995-03-14 | Matsushita Electronics Corporation | Semiconductor element mounting die pad including a plurality of extending portions |
JPH07235629A (en) * | 1994-02-23 | 1995-09-05 | Nec Corp | Semiconductor device and manufacture thereof |
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