JPS62262441A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS62262441A
JPS62262441A JP10611086A JP10611086A JPS62262441A JP S62262441 A JPS62262441 A JP S62262441A JP 10611086 A JP10611086 A JP 10611086A JP 10611086 A JP10611086 A JP 10611086A JP S62262441 A JPS62262441 A JP S62262441A
Authority
JP
Japan
Prior art keywords
film
nitride film
substrate
oxide film
nitride
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10611086A
Other languages
Japanese (ja)
Inventor
Shinpei Tanaka
田中 伸平
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP10611086A priority Critical patent/JPS62262441A/en
Publication of JPS62262441A publication Critical patent/JPS62262441A/en
Pending legal-status Critical Current

Links

Landscapes

  • Local Oxidation Of Silicon (AREA)
  • Element Separation (AREA)

Abstract

PURPOSE:To prevent the generation of contamination and damage on the surface of a substrate by a method wherein, when an insulation isolation region is going to be formed, the surface of an Si substrate is prevented from exposure when an anisotropic etching is performed for formation of the mask of framed nitride film. CONSTITUTION:An SiO2 film 2, to be used for a pad, is formed on an Si substrate 1, the first nitride film 3 is formed thereon by performing a CVD method, and a patterning operation is conducted using a lithographic technigue. Then, an Al film 4 is formed by sputtering under the state wherein a poor covering property is present, and a cut 5 is formed in the vicinity of the lower end of the stepped part of the nitride film 3. After a groove 6 has been formed by removing the SiO2 film located below the cut 5 by etching, the Al film is removed, and the second nitrogen film 7 is formed. All the nitride films, excluding the nitride film 3 and a frame (sidewall) 7a, are removed by performing anisotropic etching. As a framed nitride film mask is formed in the state wherein the oxide film 2 is left on the substrate 1, the generation of contamination and damage on the surface of the substrate 1 can be prevented. Therefore, the field oxide film to be used for insulation isolation is formed by performing the ordinary method using the nitride film as a mask.

Description

【発明の詳細な説明】 C概要〕 素子間を絶縁分離する領域を作るにあたり、マスクとな
る窒化膜のサイドウオールを異方性エツチングで形成す
る際、Si表面を露出しないで行い汚染を防止する。
[Detailed Description of the Invention] C Summary] When forming a sidewall of a nitride film that serves as a mask by anisotropic etching to create a region for insulating isolation between elements, the Si surface is not exposed to prevent contamination. .

〔産業上の利用分野〕[Industrial application field]

本発明は半導体装置の製造方法に係わり、特に絶縁分離
領域形成方法に関する。
The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of forming an isolation region.

半導体集積回路をよりコンパクトに、より高い集積度に
することは時代の趨勢であり、そのために種々の努力が
なされており、絶縁分離領域を小さくすることも、その
ための重要な要素である。
The trend of the times is to make semiconductor integrated circuits more compact and have a higher degree of integration, and various efforts are being made to achieve this, and reducing the size of the isolation region is also an important element for this purpose.

従来の方法は、最もよく知られているLOCOS法では
パッド酸化膜より酸素が拡散するため、バーズビークを
生じ、このためフィールド酸化膜による絶縁骨M fi
J[域が大きくなり、微細化上好ましくなかった。 又
、これを改善する方法の窒化膜枠付きの方法は、バーズ
ビークに対しては改善されているが、窒化膜を異方性エ
ツチングにより全面エツチングする際、Si基板表面が
露出するため、この部に汚染とダメージを与え特性上に
好ましからぬ影響を及ぼす欠点を有し、この点の改善が
望まれている。
In the conventional method, the most well-known LOCOS method, oxygen diffuses from the pad oxide film, resulting in a bird's beak, which results in the insulating bone M fi by the field oxide film.
J [area became large, which was not preferable in terms of miniaturization. In addition, the method with a nitride film frame to improve this problem has improved the bird's beak, but when the nitride film is etched over the entire surface by anisotropic etching, the surface of the Si substrate is exposed. It has the disadvantage of causing contamination and damage to the material, which has an undesirable effect on the properties, and it is desired to improve this point.

〔従来の技術〕[Conventional technology]

第2図(a)〜(e)は従来例におけるフィールド酸化
膜形成工程の断面模式図である。
FIGS. 2(a) to 2(e) are schematic cross-sectional views of the field oxide film forming process in the conventional example.

第2図(a)は第1の窒化膜上のフォトレジストにパタ
ーニングした状態を示す。
FIG. 2(a) shows a state in which the photoresist on the first nitride film is patterned.

この図において、1はSi基板でこの上にパッド用の酸
化膜(Sift膜)2を厚さ100〜700人形成、更
にこの上にCVD法で第1の窒化M3を厚さ約1000
−1500人被着形成し、ついでこの上にフォトレジス
ト6を塗布し、リソグラフィ技術によりパターニングす
る。
In this figure, reference numeral 1 denotes a Si substrate, on which an oxide film (Sift film) 2 for pads is formed to a thickness of 100 to 700 mm, and on top of this, a first nitride M3 is deposited to a thickness of approximately 1000 mm using the CVD method.
- 1,500 layers are deposited, and then a photoresist 6 is applied thereon and patterned using lithography technology.

第2図(b)は窒化膜および酸化膜までエツチングした
状態を示す。
FIG. 2(b) shows a state in which the nitride film and oxide film have been etched.

前の第2図(a)において、フォトレジスト9をマスク
にしてRIE法による異方性エツチングにより窒化膜3
をエツチングする。このときのRIEは、ガスはCFa
 + Ot1圧力は0.5Torr 、電力は250−
で行う。
In FIG. 2(a), the nitride film 3 is etched by anisotropic etching using the RIE method using the photoresist 9 as a mask.
etching. In this RIE, the gas is CFa.
+ Ot1 pressure is 0.5 Torr, power is 250-
Do it with

ついで、ウェットエツチングで酸化膜2のエツチングを
行う。
Next, the oxide film 2 is etched by wet etching.

第2図(c)は第2の窒化膜を被覆した状態を示す。FIG. 2(c) shows the state covered with the second nitride film.

第2の窒化膜7をCVD法で厚さ約1000人、表面全
面に被着形成する。
A second nitride film 7 is deposited on the entire surface to a thickness of about 1,000 yen by CVD.

第2図(d)は窒化膜のサイドウオール形成の状態を示
す。
FIG. 2(d) shows the state of sidewall formation of the nitride film.

第2の窒化膜7を約1000人、RIE法で異方性エツ
チングすることにより、酸化膜2と第1の窒化膜3のパ
ターンの側面に第2の窒化膜7のサイドウオール7aを
形成すると同時に、窒化膜3とSi基板1の表面を露出
せしめる。
By anisotropically etching the second nitride film 7 by about 1000 people using the RIE method, a side wall 7a of the second nitride film 7 is formed on the side surface of the pattern of the oxide film 2 and the first nitride film 3. At the same time, the surfaces of the nitride film 3 and the Si substrate 1 are exposed.

このときのR[の条件は、ガスはCF4 + 0□、圧
力は0.5Torr 、電力は250−である。
The conditions for R[ at this time are that the gas is CF4 + 0□, the pressure is 0.5 Torr, and the electric power is 250-.

第2図(e)はフィールド酸化膜を形成した状態を示す
FIG. 2(e) shows a state in which a field oxide film has been formed.

酸化膜2ρ上部と側面に形成した枠状の窒化膜3と窒化
膜のサイドウオール7aをマスクにして熱酸化すること
により、6000〜8000人のフィールド酸化膜8を
形成する。
A field oxide film 8 of 6,000 to 8,000 layers is formed by thermal oxidation using the frame-shaped nitride film 3 and the nitride film sidewall 7a formed on the top and side surfaces of the oxide film 2ρ as a mask.

この後図示しないが、更に窒化膜とその下の酸化膜を除
去し、フィールド酸化膜間に素子を形成する。
Thereafter, although not shown, the nitride film and the oxide film below it are further removed, and elements are formed between the field oxide films.

このとき、フィールド酸化膜形成時のバーズビーク部の
量は、窒化膜のサイドウオール7aがないときは酸化膜
より酸素が拡散するために0.5μm位であったものを
、この方法によるときはサイドウオール7aの下が直接
Si基板1となっているため0.1 μm程度に抑える
ことが出来る。
At this time, when the field oxide film is formed, the amount of the bird's beak portion is about 0.5 μm when there is no nitride film sidewall 7a because oxygen diffuses from the oxide film; Since the Si substrate 1 is directly under the wall 7a, the thickness can be suppressed to about 0.1 μm.

この方法によると、サイドウオール7a形成のため、異
方性エツチングを行うとき、窒化膜で被覆されていない
部分はSi基板1が露出し、そのためSi表面の露出部
に汚染とダメージを与える。このときの汚染はエツチン
グ装置の容器金属によるものが多く、ダメージと共に素
子領域にまで悪影響を及ぼし、ジャンクションリーク不
良等の原因となる欠点がある。
According to this method, when anisotropic etching is performed to form the sidewall 7a, the portions of the Si substrate 1 that are not covered with the nitride film are exposed, thereby causing contamination and damage to the exposed portions of the Si surface. Most of the contamination at this time is caused by the container metal of the etching device, which has the drawback of damaging and adversely affecting the element region, causing junction leakage defects and the like.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

絶縁分離領域形成方法において、枠付き窒化膜マスク形
成のための異方性エツチング時、Si基板表面が露出し
ないようにして、汚染とダメージを防↓する。
In the method for forming an insulation isolation region, during anisotropic etching to form a framed nitride film mask, the surface of the Si substrate is not exposed to prevent contamination and damage.

(問題点を解決するための手段〕 上記問題点の解決は、Si基板の表面に、酸化膜を形成
し、この上に第1の窒化膜のパターンを形成する工程と
、前記第1の窒化膜のパターンの段差部下端近傍に切れ
目のある、金属膜による被膜を形成する工程と、前記酸
化膜をエツチングして、切れ目の部分に溝を形成する工
程と、前記金属膜を除去後、Si基板全面に第2の窒化
膜を被覆し、続いて異方性エツチングを行い、溝の上お
よび第1の窒化膜の側面に第2の゛窒化膜によるサイド
ウオールを形成する工程と、続いて、前記第1の窒化膜
とサイドウオールをマスクとして、フィールド酸化膜を
形成する工程とを含んでなる本発明による半導体装置の
製造方法により達成される。
(Means for Solving the Problems) The above problems can be solved by forming an oxide film on the surface of a Si substrate, forming a first nitride film pattern thereon, and A step of forming a metal film coating with a cut near the lower end of the step of the film pattern, a step of etching the oxide film to form a groove at the cut portion, and after removing the metal film, A step of coating the entire surface of the substrate with a second nitride film, followed by anisotropic etching to form a sidewall of a second nitride film over the groove and on the side surfaces of the first nitride film; This is achieved by the method of manufacturing a semiconductor device according to the present invention, which includes the step of forming a field oxide film using the first nitride film and the sidewall as a mask.

特に、前記金属膜をアルミニウム、モリブデン又はチタ
ンとすることにより本発明は容易に実施することが出来
る。
In particular, the present invention can be easily implemented by using aluminum, molybdenum, or titanium as the metal film.

〔作用〕[Effect]

パッド用酸化膜上の窒化膜パターンの段差部にカバレー
ジ性のよくない金属被膜の切れ目を形成し、この部の酸
化膜に溝を作り、ついでこの溝を埋めるが如き窒化膜を
全面被覆して、異方性エツチングを行うことによりサイ
ドウオールを形成するもので、異方性エツチング時Si
基板面が露出しないので汚染もダメージもな(、且つバ
ーズビークも極めて小さいフィールド酸化膜を形成する
ことが出来る。
A cut in the metal film with poor coverage is formed at the stepped part of the nitride film pattern on the oxide film for the pad, a groove is made in the oxide film in this part, and then the entire surface is covered with a nitride film that fills this groove. , sidewalls are formed by anisotropic etching, and during anisotropic etching, Si
Since the substrate surface is not exposed, a field oxide film can be formed without contamination or damage (and with extremely small bird's beaks).

〔実施例〕〔Example〕

第1図(a)〜(f)は本発明におけるフィールド酸化
膜形成工程の断面模式図である。
FIGS. 1(a) to 1(f) are schematic cross-sectional views of the field oxide film forming step in the present invention.

第1図において、第2図と同じ名称のものは同じ符号で
示す。
In FIG. 1, parts with the same names as in FIG. 2 are indicated by the same reference numerals.

第1図(a)は第1の窒化膜をパターニングした状態を
示す。
FIG. 1(a) shows a state in which the first nitride film has been patterned.

この図において、1はSt基板でこの上にパッド用の酸
化膜(SiO□膜)2を厚さ100〜700人形成、更
にこの上にCVD法で第1の窒化膜3を厚さ約1000
大破着形成し、この窒化膜3にリソグラフィ技術により
パターニングする。
In this figure, reference numeral 1 denotes an St substrate, on which an oxide film (SiO□ film) 2 for pads is formed to a thickness of 100 to 700 mm, and on top of this a first nitride film 3 is formed by CVD to a thickness of approximately 1000 mm.
Large cracks are formed, and this nitride film 3 is patterned using lithography technology.

第1図(b)はAI膜を形成した状態を示す。FIG. 1(b) shows a state in which an AI film is formed.

この図において、Al膜4をスパッタリング法で0.3
〜1.5μI被着するが、このとき特にA1膜4のカバ
レージ性のよくない方法、例えばSii板1を加熱しな
い方法あるいはターゲットとSi基t7i1との距離を
調整する等して、窒化膜の段着部下端近傍でAI膜4に
切れ目5を形成する。
In this figure, an Al film 4 of 0.3
~1.5 μI is deposited, but at this time, the nitride film is deposited using methods that do not provide good coverage of the A1 film 4, such as not heating the Sii plate 1 or adjusting the distance between the target and the Si substrate t7i1. A cut 5 is formed in the AI film 4 near the lower end of the step.

第1図(c)はAI膜を除去した状態を示す。FIG. 1(c) shows the state with the AI film removed.

この図において、)IFで酸化膜2の表出部をエツチン
グして溝幅約100 〜700人の溝6を形成する。つ
いで、AI膜をflN(h等でボイル除去する。
In this figure, the exposed portion of the oxide film 2 is etched using )IF to form a groove 6 having a width of approximately 100 to 700 mm. Then, the AI film is removed by boiling with flN (h, etc.).

第1図(d)は第2の窒化膜を被覆した状態を示す。FIG. 1(d) shows the state covered with the second nitride film.

この図において、減圧CVD法で第2の窒化膜7を厚さ
約1000大破着する。この窒化膜qはカバレージ性が
良好で、段差部における窪みは厚さ約1000人被覆す
るとな(なる。
In this figure, the second nitride film 7 is deposited to a thickness of approximately 1,000 yen using the low pressure CVD method. This nitride film q has good coverage, and will cover the depressions at the stepped portions to a thickness of approximately 1000 mm.

第1図(e)は異方性エツチングを行いサイドウオール
を形成した状態を示す。
FIG. 1(e) shows a sidewall formed by anisotropic etching.

RIH法による異方性エツチングで窒化膜7を約100
0人の厚さエツチングして酸化膜2の上の窒化膜7を除
去し、且つ窒化膜のサイドウオール7aを形成する。こ
のRIHの条件としては、ガスはCF4+Oz、圧力は
Q、5Torr %電力は250讐で行う。
The nitride film 7 is etched approximately 100% by anisotropic etching using the RIH method.
The nitride film 7 on the oxide film 2 is removed by etching to a thickness of 0.0 mm, and a nitride film sidewall 7a is formed. The RIH conditions are as follows: gas is CF4+Oz, pressure is Q, 5 Torr%, and power is 250%.

第1図(f)はフィールド酸化膜を形成した状態を示す
FIG. 1(f) shows a state in which a field oxide film has been formed.

この図において、窒化膜をマスクとして熱酸化してフィ
ールド酸化膜8を厚さ6000〜8000人形成する。
In this figure, a field oxide film 8 is formed to a thickness of 6,000 to 8,000 layers by thermal oxidation using the nitride film as a mask.

更に、図示しないが、窒化膜3と窒化膜のサイドウオー
ル7aを除去、酸化膜2を除去して、素子形成工程に入
る。
Further, although not shown, the nitride film 3 and the nitride film sidewall 7a are removed, the oxide film 2 is removed, and the device forming process is started.

この方法によるときは、RIIE法で異方性エツチング
を行って窒化膜のサイドウオールを形成するときSi基
板面が全く表出しないので、Si表面がダメージを受け
たり、金属等に汚染されることがなく、ジャンクション
リーク等の特性不良は生じない。
When this method is used, the Si substrate surface is not exposed at all when the nitride film sidewall is formed by anisotropic etching using the RIIE method, so the Si surface may be damaged or contaminated with metals, etc. There is no problem with characteristics such as junction leaks.

また、フィールド酸化膜形成時、Si表面の露出した部
分がないのでバーズビークも少ない。
Furthermore, since there is no exposed portion of the Si surface during the formation of the field oxide film, there are fewer bird's beaks.

ここでは窒化膜パターン上に被覆する金属膜としてAI
を用いるものについて述べたが、この金属膜はAIの替
わりにMoあるいはTiを用いても同様な結果を得るこ
とが出来る。
Here, AI is used as the metal film coated on the nitride film pattern.
Although we have described the metal film using Mo or Ti instead of AI, similar results can be obtained.

〔発明の効果〕〔Effect of the invention〕

フィールド酸化膜形成時マスクとして必要な窒化膜のサ
イドウオールを作るための異方性エツチング時、St基
板面が露出しないので汚染もダメージもなく、且つバー
ズビークも極めて小さい絶縁分離領域を形成することが
出来る。
During anisotropic etching to create a nitride film sidewall, which is required as a mask during field oxide film formation, the St substrate surface is not exposed, so there is no contamination or damage, and an insulating isolation region with extremely small bird's beaks can be formed. I can do it.

【図面の簡単な説明】[Brief explanation of drawings]

第1図(a)〜(f)は本発明におけるフィールド酸化
膜形成工程の断面模式図、 第2図(a)〜(e)は従来例におけるフィールド酸化
膜形成工程の断面模式図である。 図において、 1はSi基板、 2は酸化膜、 3は第1の窒化膜、 4は金属膜(AI膜)、 5は切れ目、 6は溝、 7は第2の窒化膜、 7aはサイドウオール、 8はフィールド酸化膜
FIGS. 1(a) to 1(f) are schematic cross-sectional views of the field oxide film forming step in the present invention, and FIGS. 2(a) to (e) are cross-sectional schematic views of the field oxide film forming step in the conventional example. In the figure, 1 is a Si substrate, 2 is an oxide film, 3 is a first nitride film, 4 is a metal film (AI film), 5 is a cut, 6 is a groove, 7 is a second nitride film, 7a is a side wall , 8 is the field oxide film

Claims (1)

【特許請求の範囲】 〔1〕Si基板(1)の表面に、酸化膜(2)を形成し
、この上に第1の窒化膜(3)のパターンを形成する工
程と、 前記第1の窒化膜(3)のパターンの段差部下端近傍に
切れ目(5)のある、金属膜(4)による被膜を形成す
る工程と、 前記酸化膜(2)をエッチングして、切れ目(5)の部
分に溝(6)を形成する工程と、前記金属膜(4)を除
去後、Si基板(1)全面に第2の窒化膜(7)を被覆
し、続いて異方性エッチングを行い、溝(6)の上およ
び第1の窒化膜(3)の側面に第2の窒化膜(7)によ
るサイドウォール(7a)を形成する工程と、 続いて、前記第1の窒化膜(3)とサイドウォール(7
a)をマスクとして、フィールド酸化膜(8)を形成す
る工程とを、 含んでなることを特徴とする半導体装置の製造方法。 〔2〕前記金属膜(4)がアルミニウム、モリブデン又
はチタンであることを特徴とする特許請求の範囲第1項
記載の半導体装置の製造方法。
[Claims] [1] A step of forming an oxide film (2) on the surface of the Si substrate (1) and forming a pattern of a first nitride film (3) thereon; A step of forming a film of metal film (4) having a cut (5) near the lower end of the step of the pattern of the nitride film (3), and etching the oxide film (2) to remove the cut (5). After removing the metal film (4), the entire surface of the Si substrate (1) is coated with a second nitride film (7), and then anisotropic etching is performed to form the grooves. forming sidewalls (7a) of a second nitride film (7) on top of (6) and on the side surfaces of the first nitride film (3); side wall (7
A method for manufacturing a semiconductor device, comprising the step of: a) forming a field oxide film (8) using the mask as a mask. [2] The method for manufacturing a semiconductor device according to claim 1, wherein the metal film (4) is made of aluminum, molybdenum, or titanium.
JP10611086A 1986-05-09 1986-05-09 Manufacture of semiconductor device Pending JPS62262441A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10611086A JPS62262441A (en) 1986-05-09 1986-05-09 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10611086A JPS62262441A (en) 1986-05-09 1986-05-09 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS62262441A true JPS62262441A (en) 1987-11-14

Family

ID=14425336

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10611086A Pending JPS62262441A (en) 1986-05-09 1986-05-09 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS62262441A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01281748A (en) * 1988-05-07 1989-11-13 Fujitsu Ltd Manufacture of semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01281748A (en) * 1988-05-07 1989-11-13 Fujitsu Ltd Manufacture of semiconductor device

Similar Documents

Publication Publication Date Title
US6514672B2 (en) Dry development process for a bi-layer resist system
JPH06302684A (en) Forming method for field oxide film in semiconductor element
JPH03145730A (en) Manufacture of ic semiconductor device
US5922516A (en) Bi-layer silylation process
JP2000124203A (en) Fine pattern formation method
JPS62262441A (en) Manufacture of semiconductor device
JP3080400B2 (en) Semiconductor device
JP3998288B2 (en) Element isolation method for semiconductor device
JPH03234041A (en) Manufacture of semiconductor device
JPH07302791A (en) Formation of field oxidized film of semiconductor element
JPH07321091A (en) Etching and wiring forming method
JPH06163528A (en) Fabrication of semiconductor device
JPH03236235A (en) Manufacture of semiconductor device
JPH04111445A (en) Manufacture of semiconductor device
JPH09181077A (en) Semiconductor device and manufacturing method thereof
JPH08107112A (en) Method of forming interconnection semiconductor device
KR0124637B1 (en) Method of forming the isolation on semiconductor device
JPS61216329A (en) Manufacture of semiconductor device
JPS62219961A (en) Manufacture of thin film mos structure semiconductor device
JPH0117256B2 (en)
JPH1070186A (en) Method of forming element isolation film of semiconductor device
KR940009578B1 (en) Semiconductor device and manufacturing method thereof
JPH01162351A (en) Manufacture of semiconductor device
JPH0748494B2 (en) Method for manufacturing semiconductor device
JPH04315433A (en) Manufacture of semiconductor device