JPS62255951A - Production of semiconductor device - Google Patents
Production of semiconductor deviceInfo
- Publication number
- JPS62255951A JPS62255951A JP10009386A JP10009386A JPS62255951A JP S62255951 A JPS62255951 A JP S62255951A JP 10009386 A JP10009386 A JP 10009386A JP 10009386 A JP10009386 A JP 10009386A JP S62255951 A JPS62255951 A JP S62255951A
- Authority
- JP
- Japan
- Prior art keywords
- resist film
- film
- substrate
- semiconductor device
- dry etching
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 20
- 238000004519 manufacturing process Methods 0.000 title claims description 13
- 239000000758 substrate Substances 0.000 claims abstract description 20
- 239000011248 coating agent Substances 0.000 claims abstract description 6
- 238000000576 coating method Methods 0.000 claims abstract description 6
- 238000005530 etching Methods 0.000 claims abstract description 5
- 238000000034 method Methods 0.000 claims description 12
- 238000010894 electron beam technology Methods 0.000 claims description 8
- 238000001312 dry etching Methods 0.000 abstract description 11
- 230000001678 irradiating effect Effects 0.000 abstract description 5
- 238000000059 patterning Methods 0.000 abstract description 3
- 238000002844 melting Methods 0.000 abstract description 2
- 230000008018 melting Effects 0.000 abstract description 2
- 238000010438 heat treatment Methods 0.000 description 5
- 229920003986 novolac Polymers 0.000 description 4
- ZAMOUSCENKQFHK-UHFFFAOYSA-N Chlorine atom Chemical compound [Cl] ZAMOUSCENKQFHK-UHFFFAOYSA-N 0.000 description 3
- 229910052801 chlorine Inorganic materials 0.000 description 3
- 239000000460 chlorine Substances 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 239000000155 melt Substances 0.000 description 3
- VXEGSRKPIUDPQT-UHFFFAOYSA-N 4-[4-(4-methoxyphenyl)piperazin-1-yl]aniline Chemical compound C1=CC(OC)=CC=C1N1CCN(C=2C=CC(N)=CC=2)CC1 VXEGSRKPIUDPQT-UHFFFAOYSA-N 0.000 description 2
- 239000005049 silicon tetrachloride Substances 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
Classifications
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/20—Exposure; Apparatus therefor
- G03F7/2022—Multi-step exposure, e.g. hybrid; backside exposure; blanket exposure, e.g. for image reversal; edge exposure, e.g. for edge bead removal; corrective exposure
Abstract
Description
【発明の詳細な説明】
〔概要〕
半導体装置を製造する際に用いるレジスト膜の処理方法
であって、〜配線膜等の被膜を形成した半導体基板上に
レジスト膜を塗布後、該レジスト膜を所定パターンにパ
ターンニングした後、該パターンニングされたレジスト
膜に電子線を照射することで、レジスト膜の耐熱性を向
上させ、ドライエツチング時に於ける基板の加熱によっ
てレジスト膜がフローしないようにする。[Detailed Description of the Invention] [Summary] A method for processing a resist film used when manufacturing a semiconductor device, which comprises applying a resist film onto a semiconductor substrate on which a film such as a wiring film is formed, and then removing the resist film. After patterning into a predetermined pattern, the patterned resist film is irradiated with an electron beam to improve the heat resistance of the resist film and prevent the resist film from flowing due to heating of the substrate during dry etching. .
本発明は半導体装置の製造方法に係り、特に装置形成に
用いるレジスト膜の耐熱性向上に関する。The present invention relates to a method for manufacturing a semiconductor device, and more particularly to improving the heat resistance of a resist film used for forming the device.
半導体基板上に形成した半導体素子間を接続するための
〜の配線膜を所定のパターンに形成するには、該配線膜
上にレジスト膜を塗布後、該レジスト膜をホトリソグラ
フィ法によって所定パターンに形成後、該パターンニン
グされたレジスト膜をマスクとして用い、四塩化珪素ガ
スのような塩素系の反応ガスを用いたドライエツチング
法により〜の配線膜を所定のパターンにエツチング形成
している。To form a wiring film in a predetermined pattern for connecting semiconductor elements formed on a semiconductor substrate, a resist film is applied on the wiring film, and then the resist film is formed into a predetermined pattern by photolithography. After formation, using the patterned resist film as a mask, the wiring films are etched into a predetermined pattern by a dry etching method using a chlorine-based reactive gas such as silicon tetrachloride gas.
従来、このような方法で半導体装置を形成する際、第１
図に示すようにＨ等の配線膜１を形成した基板２上に紫
外線に感光するノボラック系のポジ型レジスト膜３を塗
布後、ホトマスク（図示せず）を用いて紫外線を所定の
パターンに照射する。Conventionally, when forming a semiconductor device using such a method, the first
As shown in the figure, after coating a novolac positive resist film 3 sensitive to ultraviolet rays on a substrate 2 on which a wiring film 1 such as H is formed, ultraviolet rays are irradiated in a predetermined pattern using a photomask (not shown). do.
次いで第２図に示すように、紫外線露光されたレジスト
膜３を現像して所定のパターンのレジスト膜に形成する
。Next, as shown in FIG. 2, the resist film 3 exposed to ultraviolet light is developed to form a resist film in a predetermined pattern.
次いでこのパターンニングされたレジスト膜を有する基
板をベーキング炉を用いて加熱してポストベーキングし
、レジスト膜の耐熱性を向上させる。Next, the substrate having the patterned resist film is post-baked by heating it in a baking oven to improve the heat resistance of the resist film.
次いでこのポストベーキングされたレジスト刀臭を有す
る基板を反応管内に導入し、該反応管を真空になる迄排
気した後、四塩化珪素ガス等の塩素系の反応ガスを導入
してパターンニングされたレジスト膜をマスクとして〜
の配線膜を所定のパターンにエツチング形成していた。Next, this post-baked resist substrate having a sword odor was introduced into a reaction tube, and after the reaction tube was evacuated to a vacuum, patterning was carried out by introducing a chlorine-based reactive gas such as silicon tetrachloride gas. Using resist film as a mask
The wiring film was etched into a predetermined pattern.
ところで、このようなノボラ・ツク系のポジ型のレジス
トＩＩりをマスクとして、塩素系の反応ガスを用いたド
ライエ・ノチング法で、〜の被膜をエツチングしようと
すると、ドライエツチングの際の基板の加熱によってレ
ジスト膜が溶融してフローする現象が発生し、所定のパ
ターンに精度良くエツチングされない問題が生じる。By the way, if you try to etch the film of ~ by the dry etching method using a chlorine-based reactive gas using such a novola-based positive resist II as a mask, the substrate will be damaged during dry etching. A phenomenon in which the resist film melts and flows due to heating occurs, resulting in a problem that a predetermined pattern cannot be etched with high precision.
そのため、ドライエツチングの際に用いる高周波電源の
電力を低下させて、基板の加熱温度を低下させ、この状
態で八Ωの配線膜をエツチングしようと試みたが、この
ような方法ではエツチングに要する時間が掛かり過ぎる
問題が生じる。Therefore, an attempt was made to reduce the power of the high-frequency power supply used during dry etching to lower the heating temperature of the substrate, and to etch an 8Ω wiring film in this state, but the time required for etching was The problem arises that too much is applied.
本発明は上記した問題点を解決し、上記したマスクとな
るレジスト膜の耐熱性を向上させ、高精度に且つ短時間
でエツチングできるような半導体装置の製造方法の提供
を目的とする。SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned problems, improve the heat resistance of a resist film serving as a mask, and provide a method for manufacturing a semiconductor device that can be etched with high precision and in a short time.
本発明の半導体装置の製造方法は、半導体基板上に設け
た被膜上にレジス日臭を塗布し、該レジス）ＦＪを露光
後、現像して所定のパターンに形成し、該パターン形成
されたレジスト膜をマスクとして用いて被膜をエツチン
グする工程を有する半導体装置の製造に於いて、
前記レジスト膜を露光、現＠！後、該パターンニングさ
れたレジスト膜に電子線を照射する工程を含むようにす
る。The method for manufacturing a semiconductor device of the present invention includes applying a resist film on a film provided on a semiconductor substrate, exposing the resist (FJ) to light, and then developing it to form a predetermined pattern. In the manufacture of semiconductor devices, which includes a step of etching the film using the film as a mask, the resist film is exposed to light. After that, a step of irradiating the patterned resist film with an electron beam is included.
本発明の半導体装置の製造方法は、耐熱性の悪いノボラ
ック系のポジ型のレジスト膜に電子線を照射することで
、この樹脂の耐熱性を向上させ、このレジスト膜をマス
クとして用いることで、ドライエツチングする際の高周
波電力を低下させなくともレジスト膜が熔融してフロー
しない状態となし、通配線膜等のエツチング速度の低下
を見ないようする。The method for manufacturing a semiconductor device of the present invention improves the heat resistance of a novolac-based positive resist film with poor heat resistance by irradiating the resin with an electron beam, and uses this resist film as a mask. To maintain a state in which a resist film does not melt and flow without reducing the high frequency power during dry etching, and to prevent a decrease in the etching speed of a conductive wiring film, etc.
以下、図面を用いて本発明の一実施例につき詳細に説明
する。Hereinafter, one embodiment of the present invention will be described in detail with reference to the drawings.
第１図は本発明の半導体装置の製造方法の説明図で、図
示するようにＲΩ等の被膜１１を形成したＳｉ基板１２
等にノボラック系のポジ型のレジスｌ−１１！ｉ！１３
を塗布後、ホトマスクを用いて紫外線を所定のパターン
に照射して露光後、現像する。FIG. 1 is an explanatory diagram of the method for manufacturing a semiconductor device according to the present invention.
Novolac positive type Regis l-11! i! 13
After coating, a predetermined pattern is irradiated with ultraviolet rays using a photomask, exposed, and then developed.
次いでこのレジスト膜１３に電子線照射用装置１４より
電子線を照射して１００マイクロクーロンの照射量で照
射する。Next, this resist film 13 is irradiated with an electron beam from an electron beam irradiation device 14 at a dose of 100 microcoulombs.
このようにした後、この電子線照射をしたレジスト膜１
３を有する基板１２をベーキング炉に導入し、基板を１
９０℃の温度で加熱して数１０分間ベーキングを行った
処、レジスト膜が溶融してフローする現象も見られず耐
熱性が充分向上しているのが確かめられた。After doing this, the resist film 1 subjected to electron beam irradiation
Introduce the substrate 12 with 3 into the baking oven,
When the resist film was baked at a temperature of 90° C. for several tens of minutes, no phenomenon of melting and flowing of the resist film was observed, and it was confirmed that the heat resistance was sufficiently improved.
ちなみに、このようにノボラック系の樹脂を基板上に塗
布後、露光現像して所定のレジスト膜のパターンに形成
後、この基板を前記した１９０ ”Ｃの温度でベーキン
グした処、レジスト膜が溶融してフローし実用とならな
いことが判明した。By the way, after coating the novolac resin on the substrate, exposing and developing it to form a predetermined resist film pattern, this substrate was baked at the temperature of 190"C as described above, and the resist film melted. It was found that the process flowed and was not practical.
また基板をドライエツチングする際の基板の温度は１９
０ ’Ｃ以下であるので、本発明によれば、ドライエツ
チングの際の基板の加熱によってレジストＩＮが熔融し
てフローする現象が避けられ、充分実用になることが明
らかになった。Also, the temperature of the substrate when dry etching the substrate is 19
Since the temperature is 0'C or less, it has been revealed that according to the present invention, the phenomenon in which the resist IN melts and flows due to heating of the substrate during dry etching can be avoided and is sufficiently practical.
以上述べたように、本発明の半導体装置の製造方法によ
れば、ドライエツチングの際に用いる高周波電源に印加
する電力を特別に低下させなくとも基板上のマスクとな
るレジスト膜が溶融してフローする現象が避けられ、高
精度に被膜がエツチングできる効果がある。As described above, according to the method for manufacturing a semiconductor device of the present invention, the resist film that serves as a mask on the substrate melts and flows without any particular reduction in the power applied to the high frequency power source used during dry etching. This has the effect of avoiding this phenomenon and allowing the film to be etched with high precision.
第１図は本発明の半導体装置の製造方法の説明図、
第２図より第３図迄は従来の半導体装置の製造方法の説
明図である。
図に於いて、
１１は〜被膜、１２は基板、１３はレジスト膜、１４は
電子線照射装置を示す。FIG. 1 is an explanatory diagram of a method of manufacturing a semiconductor device according to the present invention, and FIGS. 2 to 3 are explanatory diagrams of a conventional method of manufacturing a semiconductor device. In the figure, 11 is a film, 12 is a substrate, 13 is a resist film, and 14 is an electron beam irradiation device.
Claims (1)
ト膜（１３）を塗布し、該レジスト膜（１３）を露光後
、現像して所定のパターンに形成し、該パターン形成さ
れたレジスト膜（１３）をマスクとして用いて被膜（１
１）をエッチングする工程を有する半導体装置の製造に
於いて、 前記レジスト膜（１３）を露光、現像後、該パターンニ
ングされたレジスト膜（１３）に電子線を照射する工程
を含むことを特徴とする半導体装置の製造方法。[Claims] A resist film (13) is applied on a coating (11) provided on a semiconductor substrate (12), and after exposure, the resist film (13) is developed to form a predetermined pattern, The patterned resist film (13) is used as a mask to form a coating (1).
1) In the manufacturing of a semiconductor device having the step of etching, the resist film (13) is exposed and developed, and then the patterned resist film (13) is irradiated with an electron beam. A method for manufacturing a semiconductor device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10009386A JPS62255951A (en) | 1986-04-29 | 1986-04-29 | Production of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10009386A JPS62255951A (en) | 1986-04-29 | 1986-04-29 | Production of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62255951A true JPS62255951A (en) | 1987-11-07 |
Family
ID=14264795
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10009386A Pending JPS62255951A (en) | 1986-04-29 | 1986-04-29 | Production of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62255951A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003151876A (en) * | 2001-11-09 | 2003-05-23 | Fujitsu Ltd | Lithography method and machining method |
-
1986
- 1986-04-29 JP JP10009386A patent/JPS62255951A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003151876A (en) * | 2001-11-09 | 2003-05-23 | Fujitsu Ltd | Lithography method and machining method |
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