JPS62245889A - Television conference device - Google Patents

Abstract

PURPOSE:To obtian an excellent picture quality without attending a remarkable design change such as a monitor by using twice a video signal by 1/2 picture obtained from a multiplexed video signal so as to form a video signal whose vertical frequency is doubled. CONSTITUTION:A split synthesizing circuit 3 splits pictures 1a, 2a from video cameras 1, 2 respectively, combines the center half of both the pictures, a video signal S3 forming a combined picture 3a is fed to a coding circuit 4 and a digital video signal subjected to band compression is sent to a line 5. A digital video signal S3' is restored by a decoding circuit 6 at the recetion side, a split circuit 7 separates video signals corresponding to the upper half and the lower half region of the picture 3a from the video signal S3', uses each of the video signals by a half picture twice to double the vertical frequency only without changing the signal band width and the horizontal frequency thereby applying the processing doubling equivalently the field frequency. Only the center half of the display picture of monitors 8, 9 is scanned repetitively twice each and the video image with unremarkable flicker is obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a television conference device used for long-distance conferences.

[Summary of the invention]

In a television conference device used for long-distance conferences, the present invention separates a multiplexed video signal, in which a plurality of images are split and combined and transmitted, into individual video signals on the receiving side, and also separates the video signal band. Field double speed processing is performed by doubling only the vertical frequency without changing the width or horizontal frequency, and only the effective screen area at the center of the screen is rescanned without scanning the screen area that was conventionally blanked. By forming a video signal that reflects this, flicker interference can be reduced and good image quality can be obtained without major design changes to monitors or the like.

[Conventional technology]

Conventionally, when a conference is held with participants located far away using a television conference device, multiple video cameras are used to image the participants, and multiple channels are obtained.
The video signals are split-combined, multiplexed, and transmitted as an Lch video signal. On the receiving side, video signals of a plurality of channels are separated from the multiplexed video signal that has been transmitted, and participants on the other side are displayed on respective monitors, and a conference is held.

For example, assume that two screens are obtained from two video cameras on the transmitting side. In such a case, two screens are divided into an area in the center 1/2 of the screen where the participant is shown and an area other than that, and the center 1/2 area of both screens is divided into two areas.
The areas are combined to form a single screen. The multiplexed video signals forming a composite screen are transmitted to the receiving side, and each video signal is separated from the multiplexed video signals at the receiving side. Each of the 172 screens of video formed by the separated video signals is processed so that it is projected in the center on the monitor screen, and video information is missing due to screen splitting and compositing processing on the transmitting side.17
Blanking processing is performed on the signal section for two screens. On the monitor display screen, the participants are displayed in the center 1/2 area of the screen, and the upper 1/4 and lower 1/4 areas of the screen are
/4 area is blacked out.

However, the video signal reproduced by the above-mentioned television conference device is based on the conventional standard television signal, and the field frequency is, for example, 6011z or 5.
0Hz, and flicker is a problem. In particular, television conferences require a sense of realism and proximity, and there is a need for a television conference device that reduces flicker interference.

For this reason, it has been proposed to set the field frequency of the video signal to 80 fiz or higher to make the frizz less noticeable in terms of human visual characteristics. For example, a circuit shown in FIG. 4 is known as a speed-doubling processing circuit that doubles the field frequency.

For example, a video signal having a field frequency of 60 Hz is supplied to an input terminal indicated by 31 in FIG. 4, and this video signal is supplied to the switch circuit 32 via the input terminal 31. The switch circuit 32 is switched for each field, and, for example, an odd field video signal is supplied to a field memory 33, and an even field video signal is supplied to a field memory 34.

At the timing when the odd field video signal is supplied to the field memory 33, the video signal can be written to the field memory 33, and the field memory 3
The video signal is written into the field memory 34 at the timing when the even field video signal is supplied to field memory 34. Also, during one field in which writing is performed to the field memory 33, the field memory 33
The video signal that has already been written to is read out twice during one field at twice the writing speed.

During one field in which data is written to the field memory 34, the video signal already written in the field memory 33 is read out twice during one field at twice the writing speed.

The output of the field memory 33 is supplied to one input terminal of the switch circuit 35, and the output of the field memory 34 is supplied to one input terminal of the switch circuit 35.
The output of the switch circuit 35 is supplied to the other input terminal of the switch circuit 35. Switch circuit 35 connects field memories 33 and 34
The video signal is switched every l field in response to the read operation, and the video signal read twice from the field memory 33 is supplied to the output terminal 36 via the switch circuit 35, and the video signal is read twice from the field memory 34. The resulting video signal is supplied to the output terminal 36 via the switch circuit 35.

That is, the input terminal 31 has three screens 31a (A, B) arranged on the time axis as shown in FIG. 5A.

When the video signal forming C) is supplied, the read operation is performed at twice the speed of the write operation in each of the field memories 33 and 34, and the field frequency is doubled by reading out the video signal twice in each field memory. The input screen 31a (A.

A video signal forming a screen 36a (A, A, B, B, C, . . .) in which two screens of each of the images B, C, . . . ) are lined up on the time axis is taken out from the output terminal 36.

[Problem that the invention seeks to solve]

However, the video signal obtained by the double-speed processing circuit described above has a problem in that the video signal bandwidth, horizontal frequency, and vertical frequency are all doubled compared to when input. When a double-speed processing circuit with such problems is used in a television conference device, a major design change of the monitor is required, which has the drawback of being impractical.

Therefore, an object of the present invention is to provide a television conference device that can increase the field frequency to such an extent that flicker is not noticeable without making any major design changes to monitors, etc., and can provide good image quality. It is in.

[Means for solving problems]

The present invention provides a television conference device in which an input image in which a first image and a second image are split and synthesized is supplied, and the input image is divided to form a plurality of output images.
Image memory 1 that stores a first image and a second image, respectively
3 to 16, and an image in which at least two first images are split and combined using the image data stored in the image memories 13 to 16, and an image in which at least two second images are split and combined using the image data stored in the image memories 13 to 16. and a circuit 19.24 for adding at least a vertical synchronizing signal twice as large as the standard f to each of the synthesized images and supplying it to the monitor receivers 8 and 9. This is a television conference device characterized by:

[Effect]

A video signal multiplexed by split synthesis processing is supplied to the split circuit 7, and the split circuit 7
172 from video camera 1 from the multiplexed video signal
The video signal for one screen and the video signal for 1/2 screen from the video camera 2 are separated, and each of the obtained video signals for 172 screens is used twice without changing the signal bandwidth and horizontal frequency. Equivalently, the field frequency is doubled, and a video signal with the vertical frequency doubled is formed in such a way that the video signals for 172 screens from the video camera 1 are lined up two by two on the time axis. , a video signal whose vertical frequency is doubled is formed such that 172 screens worth of video signals from the video camera 2 are lined up two by two on the time axis.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings.

a. Configuration and operation of one embodiment FIG. 1 shows an embodiment of the present invention, and in FIG. 1, reference numerals 1 and 2 indicate a video camera installed on the transmitting side to capture images of conference participants. It is.

For example, three participants (A.

B, C) are imaged, and a video signal S1 forming, for example, screen 1a is supplied from video camera 1 to split synthesis circuit 3. In addition, for example, three participants (D, E, F) are imaged by the video camera 2, and for example, the screen 2a is
A video signal S2 forming the video signal S2 is supplied from the video camera 2 to the split synthesis circuit 3.

The split combining circuit 3 separates the screens 1a and 2a from the video cameras 1 and 2, respectively, and combines them into one screen. For example, each of screens 1a and 2a has an upper 1/4. Central part 1/2. The lower 1/4 area is divided into 1/4 area, and the center 1/4 area of both screens is cut off except for the area in which participants (A, B, C) and (D, E, F) are shown. For example, participants (A, B, C) are projected in the upper half of the screen, and participants (D, E, F) are projected in the lower half of the screen. The two screens 3a are combined. A video signal S3 forming the screen 3a is supplied to an encoding circuit 4.

In the encoding circuit 4, the analog video signal S3 is subjected to analog-to-digital conversion, and then subjected to band compression by high-efficiency encoding processing (eg, D-PCM, Hadamard orthogonal transformation, vector quantization, etc.). A band-compressed digital video signal is sent from the encoding circuit 4 to the digital line 5.

A digital video signal is supplied via a digital line 5 to a decoding circuit 6 on the receiving side. The decoding circuit 6 decodes the high-efficiency encoded video signal 1 and restores the digital video signal 33' forming the screen 3a. This digital video signal 33' is supplied to the split circuit 7.

The split circuit 7 separates a digital video signal corresponding to the upper 1/2 area of the screen 3a and a digital video signal corresponding to the lower 1/2 area of the screen 3a from the digital video signal 83'. Each of the 1/2-screen video signals obtained by separation is used twice to double only the vertical frequency without changing the signal bandwidth or horizontal frequency, which equivalently doubles the field frequency. conduct. Each double-speed processed digital video signal is converted from digital to analog, and the vertical frequency is doubled in such a way that the video signals for 1/2 screen from video camera 1 are lined up two by two on the time axis. At the same time, an analog video signal Sl' whose vertical frequency is doubled is formed such that the video signals for 1/2 screen from the video camera 2 are lined up two by two on the time axis. A video signal S2' is formed. A video signal SL' is supplied from the split circuit 7 to a monitor 8, and a video signal S2' is supplied to a monitor 9.

The participants (A, B) are imaged by the video camera 1 in the central 1/2 area of the display screen of the monitor 8.

The DC current of the vertical deflection coil of the monitor 8 is adjusted so that C) is displayed, and only the central 1/2 area of the display screen is repeatedly scanned twice with the same video signal output, resulting in an image with less noticeable flickering. is realized. Also,
The DC current of the vertical deflection coil of the monitor 9 is adjusted so that participants CD, E, and F) imaged by the video camera 2 are displayed in the central 1/2 area of the display screen of the monitor 9. Only the central 1/2 area is repeatedly scanned twice by the same video signal output, and an image with less noticeable flicker is realized.

b. Structure and operation of the split circuit on the receiving side in one embodiment A specific structure of the split circuit 7 in the above-described embodiment is shown in FIG. In addition, the signal states of each part of the split circuit 7 shown in FIG. 2 are shown on the screen 11a, in FIG.
17a, 22a, 21a.

26a.

A digital video output S3= outputted from the decoding circuit 6 is supplied to the terminal 11. For example, the top 1/2 of the screen
The image obtained by the video camera 1 is projected in the area, and the video camera 2 is projected in the lower 1/2 area of the screen.
A digital video signal S3' forming the screen 11a in FIG.
1 to the input terminal of the switch circuit 12.

One output terminal of the switch circuit 12 is connected to the input terminal of the 172 field memory 130 and also to the input terminal of the 1/2 field memory 14. Also,
The other output terminal of the switch circuit 12 is connected to the input terminal of the 172 field memory 15 and also to the input terminal of the 1/2 field memory 16. The switch circuit 12 is supplied with, for example, a frame period timing signal (not shown), and the input terminal of the switch circuit 12 and one or the other output terminal are alternately connected every l field. Therefore, for example, the odd field video signal S3' is supplied to the 172 field memories 13 and 14, and the even field video signal 33' is supplied to the 1/2 field memories 15 and 16.

Although not shown, for example, 1/2 field memories 13 and 1
The 1/2 field memory 1 is controlled at a frame period so as to write signals of the first half 172 sections of the video signal S3' for one field which are alternately supplied to each of the 1/2 field memory 1.
4 and 16 are controlled at a frame period so as to write signals of the second half of the video signal S3' for one field, which are alternately supplied. In other words, for every 1/2 field, for example, 1/2 field memory (13→14→
15→16), the video signal S3' is written into the tail area of each memory once per frame.

Therefore, the video signal from the video camera 1 and the video signal from the video camera 2 are written into the respective memories in a separated form from the digital video signal 53'. 1
/2 Field memory 13 contains the first half of the odd field.
Only the video signal of 72 sections is written, only the video signal of the first half section of the even field is written to the 1/2 field memory 15, and only the video signal from the video camera 1 is written to both memories. . Also, 1/2
The field memory 14 contains the second half 172 of the odd field.
Only the video signal of the section is written, only the latter 172 sections of the even field are written to the 1/2 field memory 16, and only the video signal from the video camera 2 is written to both memories.

In addition, the 172 field memories 13 and 14 are read out sequentially in order to sequentially read out the video signals for 172 screens written in each of the 1/2 field memories 13 and 14.
are controlled, and 1/2 field memory 1
172 field memories 13 and 1 so as to read out video signals for 172 screens written to 5 and 16, respectively.
Each of the 1/2 field memories 15 and 16 is controlled at a frame period delayed by one field from the read timing of No. 4. In other words, 1/2 field memory 13
During one field in which an odd field video signal is supplied to 14 and 14 is written, the video signal for 1/2 screen that has already been written to 172 field memories 15 and 16 is written twice at the same speed as when writing. read over the entire period. In addition, 1/2 field memory 15 and 1
172 field memory 1 is written during 1 field in which an even field video signal is supplied to 6.
The video signals for 1/2 screen which have already been written in 3 and 14 are read out twice at the same speed as when they were written.

The output terminal of the 1/2 field memory 13 is connected to one input terminal of the switch circuit 17, and the output terminal of the 1/2 field memory 14 is connected to one input terminal of the switch circuit 22. Further, the output terminal of the field memory 15 is connected to the other input terminal of the switch circuit 17, and the output terminal of the 1/2 field memory 16 is connected to the other input terminal of the switch circuit 22. For example, a frame period timing signal is supplied to each of the switch circuits 17 and 22, and the 1/2 field memories 13 to 1
One or the other input terminal and output terminal are alternately connected for each field in synchronization with the timing at which the video signal written in each of the fields 6 and 6 is read out.

Therefore, only the video signal obtained by the video camera 1 is output from the output terminal of the switch circuit 17. For example,
A digital video signal forming the screen 17a in FIG. 3 in which the same video is displayed in each of the upper and lower half areas of the screen is supplied to the blanking addition circuit 18. Also, from the output terminal of the switch circuit 22, the video camera 2
For example, the digital video signal forming the screen 22a in FIG. Supplied.

In each of the blanking addition circuits 18 and 23, the screen 17 is
17 corresponding to the upper and lower 1/2 areas of a and 22a, respectively.
Blanking processing is performed in a predetermined section so that the video signals for two screens become one unit. The output of the blanking addition circuit 18 is supplied to the vertical synchronization addition circuit 19, and the output of the blanking addition circuit 23 is supplied to the vertical synchronization addition circuit 24.

In the vertical synchronization adding circuits 19 and 24, a vertical synchronization signal is added to the section where the blanking process of the video signal has been performed. In other words, by adding a vertical synchronization signal to a predetermined period of 1/2 field period, only the vertical frequency can be changed to 2.
A doubled digital video signal is formed. The output of the vertical synchronization addition circuit 19 is supplied to the D/A converter 20, and the output of the vertical synchronization addition circuit 24 is supplied to the D/A converter 2.
5.

In the D/A converter 20, the digital video signal supplied from the vertical synchronization addition circuit 19 is digital-to-analog converted into an analog video signal Sl'. In other words, the vertical frequency is 2B in such a way that the video signals for 172 screens from video camera 1 are lined up two by two along the time axis.
For example, an analog video signal Sl' forming the screen 21a in FIG. 3 is output from the D/A converter 20. This analog video signal St' is taken out from the terminal 21 and supplied to the monitor 8. Further, in the D/A converter 25, the digital video signal supplied from the vertical synchronization addition circuit 24 is digitally analog converted into an analog video signal 82'. In other words, for example, the analog video signal forming the screen 26a in FIG. 3 has its vertical frequency doubled in such a way that the video signals for 172 screens from the video camera 2 are lined up two by two along the time axis. S2' is output from the D/A converter 25.

This analog video signal Sl' is taken out from the terminal 26 and supplied to the monitor 9.

In one embodiment of the present invention, a case has been described in which a video signal is transmitted in one direction, but the present invention is also fully applicable to a case in which a video signal is transmitted in both directions. It is also fully applicable when .

C Effects of the Invention] In this invention, a video signal multiplexed by Suburi-nod combining processing is supplied to a receiving-side sprint circuit, and in the sprint circuit, each video signal is separated from the multiplexed video signal, Each of the separated partial video signals is used multiple times to equivalently double the field frequency without changing the signal bandwidth and horizontal frequency. Video signals with doubled vertical frequencies are formed such that a plurality of video signals are lined up on the time axis.

Therefore, according to the present invention, it is only necessary to change the design of the part related to the vertical frequency of the monitor, and only the effective screen area at the center of the screen can be scanned without scanning the screen part that was conventionally blanked. Scanning is performed multiple times by the partial video signal output during the period of one conventional field, reducing flicker interference and realizing a good video.

[Brief explanation of drawings]

Fig. 1 is a block diagram of an embodiment of the present invention, Fig. 2 is a block diagram showing the configuration of a sprint circuit in an embodiment of the invention, and Fig. 3 is an explanation of the sprint circuit in an embodiment of the invention. The route map used, FIG. 4 is a block diagram used to explain double speed processing in a conventional television conference device, and FIGS. 5A and 5B are route maps used to explain double speed processing in a conventional television conference device. be. Explanation of main symbols in the drawings ■, 2: Top 2: Camera, 3 Nisbritt synthesis circuit,
4: Encoding circuit, 5: Digital line, 6: Decoding circuit, 7: Sprint circuit, 8゜9=monitor, 12.17,227 switch circuit, 13.14,
15.16: 1/2 field memory, 18.23
Ni blanking addition circuit, 19.24: Vertical synchronization addition circuit. Agent Patent Attorney Tadashi Sugiura Figure 3 Voltage test L Figure 4 Figure 5 A Figure 5 B

Claims (1)

[Scope of Claims] In a television conference device, an input image obtained by split-synthesizing at least a first image and a second image is supplied, and is divided to form a plurality of output images. An image memory that stores an image and the second image, respectively, and an image obtained by split-synthesizing only two first images and at least two first images using the image data stored in the image memory. means for forming an image in which two images are split and synthesized; and a circuit for adding at least a vertical synchronizing signal twice as large as the standard f to each of said images and supplying the signal to a monitor receiver. A television conference device characterized by: