JP2646132B2 - Television receiver - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a television receiver that displays a screen based on a standard television system video signal on a part of a screen based on a high-definition television system video signal.

[Prior Art] In a television receiver, a so-called picture-in-picture in which another screen is displayed as a small screen on a certain screen is known.

In recent years, as a television system, a high-definition television system has been proposed in addition to a standard television system. For example, a screen based on a standard television system video signal is partially replaced by a screen using a high-definition television system video signal. May be displayed.

[Problems to be Solved by the Invention] However, in the standard television system, for example, the NTSC system, the screen aspect ratio is 4: 3 and the number of scanning lines is 525 lines / frame, whereas in the high-definition television system, The screen aspect ratio is 16: 9 and the number of scanning lines is 1125 lines / frame.

Therefore, it is not easy to display a screen based on a standard television system video signal on a part of a screen based on a high-definition television system video signal.

Therefore, in the present invention, it is possible to satisfactorily display a screen based on a video signal of a standard television system in a part of a video signal of a high-definition television system.

[Means for Solving the Problems] A television receiver according to the present invention uses a large-screen screen based on a high-definition television video signal (first video signal) as a standard television. In a television receiver which displays a screen based on a video signal (second video signal) of a system as a small screen, N scanning lines of the second video signal are M lines (where M and N are M ≦ N). and
This is a natural number that satisfies 1.432 ≦ N / M ≦ 1.461. And a second video signal whose scanning line has been converted by the scanning line converting means is written as a small-screen video signal by a write clock signal and read by a read clock signal. A memory circuit, and generates a color subcarrier synchronized with the color burst signal included in the second video signal by inverting the phase in one horizontal period alternately, and using the phase inverted output as the write clock signal in the memory circuit; Means for outputting a clock signal generated in synchronization with the synchronization signal of the first video signal to the memory circuit as the readout clock signal. Here, preferably, the above N and M
May be the smallest numerical value among the above natural numbers.

[Operation] The color subcarriers have a phase inversion relationship for each scanning line and each frame. Therefore, if a video signal for a small screen is written into a memory using a signal having the same frequency as the color subcarrier as a write clock signal as it is, the sampling position of each scanning line is spatially shifted. In the above configuration, the signal is not used as it is as a write clock signal, but the signal is inverted in phase for one horizontal period, and the phase-inverted signal is used as a write clock signal to convert a small-screen video signal into a memory signal. , The spatial sample position does not shift.

[Embodiment] As a method of transmitting a video signal of a high-definition television system by band compression, a multiplex sub-sample transmission system using offset sub-sampling between fields and between frames is known.

As one of the multiple sub-sample transmission systems, MUSE
A method called (Multiple Sub-Nyquist Sampling Encoding) has been proposed.

In such a MUSE-type decoder, a transmission signal is A / D converted and digital signal processing is performed to restore the original high-definition video signal, and then D / A converted to an analog signal. .

In this case, the clock signal for A / D conversion and digital signal processing is formed by dividing the frequency of the 97.2 MHz original oscillation signal that is phase-synchronized with the synchronization signal included in the video signal.

Also, in the current standard television system, for example, the NTSC system, when extracting necessary color information from the carrier chrominance signal, a 3.58 MHz color subcarrier synchronized with the color burst signal included in the horizontal blanking period is generated. ing.

Therefore, in a television receiver that displays a small screen based on the NTSC system video signal on a part of the screen based on the high-definition television system video signal, when the small screen video signal is written to and read from the field memory, the writing frequency is changed. 3.58MHz and read frequency 97.2MHz
1 / Q (Q = 1, 2,...) Times, it becomes simple and economical without requiring a new oscillator.

FIG. 1 is a conceptual diagram of PinP (Picture-in-Picture), where 1 is a high-definition television receiver, 2 is a picture tube, 3 is a large screen by a video signal of a high-definition television system, and 4 is a standard screen. This is a small screen using a video signal of a television system, for example, an NTSC system.

The write frequency to the above-mentioned field memory is 3.58
MHz and the read frequency from the field memory is 32.
The case of 4 MHz (97.2 MHz ÷ 3) will be described with reference to FIG.

If the frequency fsc and the original oscillation frequency foc of the chrominance subcarrier are accurately represented, the following expression is obtained.

foc = 2 ⁷ × 3 ⁵ × 5 ⁵ (Hz) ... (2) Furthermore, the horizontal scanning frequency fH of the high-definition television system
(HD) and NTSC horizontal scanning frequency fH (NTSC)
Each is represented by the following equation.

fH (HD) = 2 × 3 3 × 5 4 (Hz) ...... (3) Since the unit expressing the size of the pixel has different dimensions in the horizontal and vertical directions, the relationship between the two is first determined.
Here, [TV lines] is used as a unit in the vertical direction, and [sec] is used as a unit in the horizontal direction, which means the time required to scan the pixel.

16: 9 aspect ratio, 1 / 74.25 MHz sample rate, 1035 effective scanning lines (TV), 19 effective pixels from BTA S-001 standard
Using 20, this relationship is Becomes That is, 5 ² × 11 × 23 × fH (HD) [TV lines] = 3 [sec] (6)

Further, M (where M ≦ N) scanning lines of the small-screen video signal are formed from the N scanning lines of the NTSC system, and before the time axis expansion of 12/11 output from the MUSE decoder. When a small-screen video signal is inserted into a video signal of a high-definition television system, the following relationship must be satisfied in order to obtain an aspect ratio of 4 × 11/12: 3.

x [sec]: 525 x ηV x M / N [TV book] = 4 x 11/12: 3 (7) ηV: current broadcast vertical effective scanning period rate = 0.935 x: small screen horizontal effective scanning time Becomes By substituting equation (6) into equation (8), Also, the clock frequency for writing the small-screen video signal to the memory is WCK, the clock frequency read from the memory is RCK, and the clock frequency read from the memory is RCK.
Then, ηH: Current broadcast horizontal effective scanning period ratio = 0.83. That is, Becomes By calculating this equation (11), Becomes

That is, if the scan line conversion is performed from 1.446... Lines to one line, a small screen without graphic distortion is displayed.

However, it is not easy to strictly convert 1.446... Scan lines into one scan line, and the circuit scale becomes large. By setting an allowable range for the graphic distortion, scanning line conversion is facilitated.

For example, if a value of ± 1% is set as the allowable range of the graphic distortion, N / M may be within the range of the following expression.

If a natural number that minimizes N and M is selected within this range, N / M = 13/9. That is, the scanning line conversion from 13 lines to 9 lines may be performed. Hereinafter, the conversion of scanning lines from 13 lines to 9 lines will be described.

For example, in FIG. 2, when the current signal is C, the current signal C is multiplied by a coefficient of 4/9, and the signal B one horizontal period earlier is multiplied by a coefficient of 5/9, and these are added. By I
A scan line signal of I can be obtained. When the current signal is C ', the current signal C' is multiplied by a coefficient of 6/9, and
By multiplying the signal B 'before the horizontal period by a coefficient of 3/9 and adding these, a scanning line signal II' can be obtained.

Hereinafter, an embodiment of the present invention will be described with reference to FIG.

In FIG. 1, a satellite broadcast signal received by an antenna 11 is supplied to a tuner 12, and a MUSE signal from the tuner 12 is supplied to a MUSE decoder 13. This MUSE signal is band-compressed to 8.1 MHz on the transmission side, and this MUSE decoder 13
In this example, the MUSE signal is A / D converted and subjected to digital signal processing to obtain a high-definition television video signal SV1 having a sampling frequency of 48.6 MHz.

In this case, a clock signal synchronized with the synchronization signal included in the MUSE signal is output from the voltage controlled oscillator 14, and digital signal processing is performed based on the clock signal.

Thus, the video signal SV1 output from the decoder 13
Is supplied to the insertion circuit 16 as a large-screen video signal.

Further, the vertical synchronization signal and the horizontal synchronization signal formed by the MUSE decoder 13 are supplied to the memory control circuit 25 as a large-screen synchronization signal.

Further, the terrestrial broadcast signal received by the antenna 21 is supplied to a tuner 22, and the intermediate frequency signal from the tuner 22 is supplied to an intermediate frequency amplification and detection circuit 23.
The output NTSC video signal SV2 is supplied to the A / D converter 26.

The video signal SV2, which is converted into a digital signal by the A / D converter 26, is supplied to a coefficient unit 29 composed of a ROM (Read Only Memory). Supplied to In addition, this video signal SV2
Is RO through a delay element 27 having a delay time of one horizontal period.
It is supplied to a coefficient unit 28 composed of M, multiplied by a predetermined coefficient by the coefficient unit 28, and then supplied to an adder 30. The output signal of the adder 30 is applied to the field memory 3 of the memory circuit 31
2, 33 are supplied as write signals to these memories 32, 3
Written to 3 by field alternation.

The video signal SV2 from the circuit 23 is supplied to a synchronization separation circuit 24, and the vertical synchronization signal and the horizontal synchronization signal separated by the synchronization separation circuit 24 are supplied to the memory control circuit 25 as a small-screen synchronization signal. .

The coefficients multiplied by the coefficient units 28 and 29 are controlled by the memory control circuit 25 based on the large-screen synchronization signal and the small-screen synchronization signal. For example, when the video signal SV2 is as shown in FIG. 2C, the coefficient at the coefficient unit 29 is 4/9, and the coefficient at the coefficient unit 28 is 5/9. Since these coefficients circulate every 13 scanning lines, the memory control circuit 25 sends the R
OM is supplied with a 4-bit address signal and is controlled. The 3-bit address signal is reset by, for example, a small-screen vertical synchronizing signal and is generated by a 13-ary counter in which the small-screen horizontal synchronizing signal is used as a clock signal.

As described above, the current signal output from the A / D converter 26 and the signal obtained by delaying the current signal output from the delay element 27 by one horizontal period are multiplied by predetermined coefficients in the coefficient units 29 and 28, respectively, and added. The conversion is performed by the adder 30, and the scanning line conversion from 13 lines to 9 lines is performed.

The video signal SV2 from the circuit 23 is supplied to a band amplification circuit 36, and the color burst signal extracted by the band amplification circuit 36 is supplied to a phase detection circuit 37. The phase error signal from the phase detection circuit 37 is supplied to a voltage controlled oscillator 38, and the output signal of the voltage controlled oscillator 38 is
Supplied to 37. The phase detection circuit 37 and the voltage-controlled oscillator 38 constitute a so-called APC circuit, and the voltage-controlled oscillator 38 is phase-synchronized with the color burst signal.
A 58 MHz color subcarrier is output. This color subcarrier is
Although not shown, the waveform is shaped and then supplied to the exclusive OR circuit 39.

The horizontal synchronizing signal separated by the sync separation circuit 24 is supplied to a frequency divider 35 having a dividing ratio of 1/2, and alternates between high level "1" and low level "0" alternately for one horizontal period. A signal of a horizontal period cycle, that is, a line inversion output is obtained. This line inversion output is supplied to an exclusive OR circuit 39. Therefore, the exclusive OR circuit 39 outputs a 3.58 MHz signal whose phase is inverted every horizontal period.

The output signal of the exclusive OR circuit 39 is supplied to the AD converter 26 as a clock signal for sampling, and is also supplied to the memory circuit 31 as a clock signal for writing.

The color subcarrier frequency of 3.58 MHz is 455 of the horizontal frequency.
/ 2 times, and the phase is inverted for each scanning line and each frame. If this is used as it is as a clock signal, a sampling pattern as shown in FIG.
Spatial displacement occurs. In the figure, ○ indicates a sample position in the 2n-th frame, and ● indicates a sample position in the 2n + 1-th frame. In this example, the phase was inverted every horizontal period as described above.
By using a 58 MHz signal as a clock signal, such spatial displacement is avoided.

A signal having a frequency of 97.2 MHz is output from the voltage controlled oscillator 14, and this signal is supplied to a frequency divider 15 having a frequency division ratio of 1/3, and a signal having a frequency of 32.4 MHz is output from the frequency divider 15. This signal is output and supplied to the memory circuit 31 as a clock signal for reading.

In the memory control circuit 25, whether the video signal for the large screen and the video signal for the small screen is of the first field or the second field is based on the synchronization signal for the large screen and the synchronization signal for the small screen. Is determined.

Reading from the memory circuit 31 is controlled so as to read from the field memory that is not being written. At this time, if the video signal SV1 is in the second field and the video signal for the small screen read from the memory circuit 31 is of the first field based on the above-described determination result, the small screen The reading of the video signal is controlled to be delayed by one scanning line.

The small-screen video signal SV3 read from the memory circuit 31 in this manner is converted from the sampling frequency of 32.4 MHz to 48.6 MHz by the frequency conversion circuit, and then supplied to the insertion circuit 16.

In the insertion circuit 16, the video signal SV3 for small screen is inserted into the video signal SV1 for large screen supplied from the MUSE decoder 13. The composite video signal output from the insertion circuit 16 is supplied to a time axis expansion circuit 17, where the time axis expansion of 12/11 is performed. This is because the video signal SV1 output from the MUSE decoder 13 is time-axis compressed to 11/12.

The composite video signal output from the time base expansion circuit 17 is
After being converted into an analog signal by the D / A converter 18, it is supplied to the picture tube 20 via the video amplifier circuit 19. This allows
The picture signal S is added to a part of the screen by the picture signal SV1.
The V3 screen is displayed.

In this example, only the luminance signal has been described for the sake of simplicity, but the same applies to the color signal.

As described above, according to the present embodiment, since the coefficient units 28 and 29 are configured by ROMs, it is possible to form a small-screen video signal by performing scanning line conversion without complicating the circuit configuration.

In addition, since a 3.58 MHz signal whose phase is inverted every horizontal period is used as a write clock signal, spatial displacement does not occur.

[Effects of the Invention] As described above, according to the present invention, since the small-screen video signal is written in the memory by inverting the color subcarrier alternately for one horizontal period, the spatial sample position does not shift. . In the present invention, the number N of scanning lines of the second video signal is M (where M, N) in consideration of the number of effective scanning lines and the effective scanning line period of the high-definition television system and the standard television system. Is a natural number that satisfies M ≦ N and 1.432 ≦ N / M ≦ 1.461.) Since the scanning lines are converted into small lines, a small screen having no graphic distortion is displayed.

[Brief description of the drawings]

1, 2 and 4 are diagrams for explaining the present invention, and FIG. 3 is a block diagram showing an embodiment of the present invention. 11,21 Antenna 12,22 Tuner 13 MUSE decoder 14,38 Voltage controlled oscillator 15,35 Frequency divider 16 Insertion circuit 17 Time expansion circuit 18 D / A converter 19 …… Video amplification circuit 20 …… Picture tube 23 …… Intermediate frequency amplification and detection circuit 24 …… Synchronous separation circuit 25 …… Memory control circuit 26 …… A / D converter 27 …… Delay element 28, 29 ... Coefficient unit 30 ... Adder 31 ... Memory circuit 32,33 ... Field memory 34 ... Frequency conversion circuit 36 ... Band amplification circuit 37 ... Phase detection circuit 39 ... Exclusive OR circuit

Claims (2)

(57) [Claims] 1. A high-definition television system video signal (first
Of the standard television system (a second video signal).
A television receiver which displays a screen according to the above as a small screen, the N scanning lines of the second video signal are M lines (where M,
N is a natural number satisfying M ≦ N and 1.432 ≦ N / M ≦ 1.461. Means for converting the scanning lines into scanning lines, and the second video signal whose scanning lines have been converted by the scanning line converting means is written as a small-screen video signal with a write clock signal and read with a read clock signal. A memory circuit, and generates a color subcarrier synchronized with a color burst signal included in the second video signal by inverting the phase in one horizontal period alternately, and using the phase inversion output as the write clock signal in the memory circuit. A television receiver comprising: an output unit; and a unit that outputs a clock signal generated in synchronization with a synchronization signal of the first video signal to the memory circuit as the read clock signal. 2. The television receiver according to claim 1, wherein said N and M are the smallest numerical values among said natural numbers.