JPS62241042A - Fault processing system for microprogram control - Google Patents

Abstract

PURPOSE:To search the contents of such a fault that makes it impossible to read a 1st RAM out of an external device, by using a state control circuit as well as a 2nd RAM which stores the fault information on the 1st RAM in an initialization mode. CONSTITUTION:A reset control circuit 10 reads out the contents of a state control circuit 11 to decide a fault state in response to an external initialization indication. If the abnormality of a microprogram itself is detected, a CPU 1 writes data and the control information to the fault areas following an address X of the 1st RAM 3 and at the same time stores the abnormality also in the circuit 11. In a reloading mode, the circuit 10 reads the state information cut of the circuit 11 and activates initialization signals 31-33. While the CPU 1 shifts the data on those areas following the address X of the RAM 3 to the 2nd RAM 4 by the instruction of the circuit 10. Thus the contents of the fault can be searched and analyzed via the RAM 4 since the fault information on the RAM 3 is loaded after it is shifted to the RAM 4 when the microprogram is loaded again.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a fault handling method for microprogram control.

[Conventional technology]

Conventionally, logic device diagnostic control circuits based on microprogram control analyze fault information and manage the status of other control circuits, and when other control circuits fail, they notify the outside of the fault status and detect the fault using a 5CAN command from the outside. Outputs the details of the fault by accessing the control circuit that has become
I was searching for obstacles.

However, when an abnormality is detected in the microprogram control itself, in the conventional fault handling method of microprogram control, trace information up to the detection of the abnormality is stored in the random access memory (hereinafter referred to as RAM) in which the microprogram is stored. 7' [? The fault was analyzed by reading out the stack area information of the gram counter, the status register information at the time of the fault, and the control information in the RAM from an external device.

! Problems that Komei is trying to solve: 1. As mentioned above, conventional microprogram control
In the h processing method, when an abnormality occurs in the control of the own microprogram, the 1-race information of the failure is stored in RA3.1, but if the microprogram is in a stalled state, etc., the RAM is read out and traced. When the information cannot be supplied to the external device, initialization is performed without reading the trace information, and there is a problem that the IIa book search cannot be performed. R
There are two functions: a function to read the trace information in the .MA, and a function to output the read contents to the outside, but the latter function is generally more likely to be malfunctioning.

It is an object of the present invention to provide a fault handling method for my-zero program control that can output trace information to the outside and search for faults even in the case of the latter functional fault.

[Failure to solve the problem]

The system of the present invention stores trace information necessary for searching for the failure in the case of a failure in the microprogram itself in a first storage unit that stores the microprogram, and reads out the stored trace information from the outside to detect the failure. In a fault handling method controlled by a microprogram that performs a search, a second storage section stores information, a state storage means stores information indicating that the fault is in the microprogram itself, and a state storage means stores the fault in the microprogram itself in response to an initialization instruction from the outside. The status storage means is checked, and if the fault is in the microprogram itself, the 1-race information stored in the first storage section is transferred to the second storage section, and then the microprogram is transferred to the first storage section. and initialization means for reloading the file.

[Embodiment 1] Next, an embodiment of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing one embodiment of the present invention.

1 is a microprocessor (hereinafter referred to as CPU) that controls the microprogram, and 2 is a read-only memory (hereinafter referred to as CPU) for initializing the microprogram.
(hereinafter referred to as ROM). 3 is R and AM for control that stores the microprogram, and 4 is RA when the microprogram control receives an initial A/rise instruction from the outside.
This is a RAM that stores failure information starting from address X of M3. 5 is an input/output control adapter, and 6 is an external storage medium in which a microprogram is stored. Reference numeral 10 denotes a reset control circuit unit which outputs initialization signals 30,
This is a circuit that activates 31, 32, and 33. 35 is RA
This is a signal for transferring data from address X onward from M3 to RAM4. Reference numeral 11 denotes a state control circuit that stores the abnormal state of the own microphone 1 coprogram that is transferred from R and AM3. 20.21 is an address bus and a data bus.

The operation of this embodiment will be explained.

When a power-on instruction or an initialization instruction such as a mask reset instruction is received from the outside, the reset control circuit 10 reads the contents of the state control circuit 11 and determines whether there is a failure state. If there is no failure state, initialization signals 30, 31 and 32 are activated. The CPU starts the ROM2 from address 0, starts the input/output adapter 5 by the load program stored in the ROM2, and loads the microprogram including the function of reading the RAM4 stored in the external storage medium 6 into the RAM3. RA after completion
Control is transferred to M3 and microprogram control is performed by RAM3.

If an abnormality is detected in the microprogram itself, the CPU
1 writes data in the stack area of the program counter and information in other control registers to the fault information area starting from address
It also makes me remember that there is an abnormality in the microbroderum itself.

Then, the microprogram is reloaded by an external initialization instruction. In this case, the reset control circuit 10 that has received the initialization instruction reads the state information from the state control circuit 11, recognizes that there is a failure state, and activates the initialization signals 31 and 33 in addition to 32. In that case, the initialization signal 30 is sent to the CPU from RAM3 to RA.
An instruction 35 to move to M4 is output. Upon receiving this signal, the CPU 1 reads a program from RAM 3 to transfer the data in the fault information area from address
Move from AM3 to RAM4, then ROM2
Start from address O. As a result, when reloading a microprogram, the fault information from address It is possible to search for failures when the program itself fails.

〔Effect of the invention〕

As explained above, in the present invention, the failure information in the first RAM in which the microprogram is stored is transferred to the second RAM.
When a failure occurs such as when the first RAM cannot be read from another external device, the microprogram in the first RAM reads the contents of the second YtAM to know and analyze the contents of the failure. This has the effect of making it possible.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing one embodiment of the present invention. l...cpu, 2...ROM, 3.4...RAM
, 5... input/output control adapter, 6... storage medium, 1
0...Reset control circuit, 11...State control circuit.

Claims (1)

[Scope of Claims] When the microprogram itself has a failure, trace information necessary for searching for the failure is stored in a first storage unit storing the microprogram, and the stored trace information is read from the outside to search for the failure. A microprogram-controlled fault handling method that performs the following: a second storage section for storing information; a state storage means for storing that the fault is in the microprogram itself; Checking the storage means and if the fault is in the microprogram itself, transferring the trace information stored in the first storage to the second storage, and then reloading the microprogram to the first storage. 1. A microprogram-controlled fault handling method, characterized in that it includes initialization means for: