JPS62237803A - Frequency synthesizer - Google Patents

Abstract

PURPOSE:To obtain a frequency synthesizer with small size and low cost by mixing an instantaneous amplitude data of a triangle function obtained through the integration of an external synthesized frequency setting data at each clock with harmonics of a fundamental frequency. CONSTITUTION:A reference frequency fR generated by a reference frequency oscillator 11 is received by a frequency source 12 to generate a fundamental frequency fo and a clock frequency fc being an integer number multiple of the frequency fR. A digital integration device 15 integrates an external synthesis frequency setting data Nf at each frequency fc and a phase address data corresponding to the phase angle of a sampled triangle function is fed to a triangle function generator 18. Every time the phase address data is received, the generator 18 outputs the instantaneous amplitude data of the triangle function of the corresponding phase angle to a D/A converter 21. The converter 21 coverts the data into a sinusoidal wave signal corresponding to the data Nf, a filter 22 smoothes the sinusoidal wave signal and sends the result to a mixer 14. The mixer 14 mixes the signal from the filter 22 with harmonics of the frequency fo from a high frequency generator 13 and outputs the result via a crystal filter 23. Thus, the frequency is changed at a high speed with a smaller resolution.

Description

DETAILED DESCRIPTION OF THE INVENTION Industrial Application Field of the Present Invention The present invention relates to a frequency synthesizer that outputs a variable frequency at high speed with extremely fine frequency resolution.

<Prior art and its problems> A frequency synthesizer that can vary the frequency from 0 with extremely fine frequency resolution in the VHF band, for example 90
Conventionally, a PLL frequency synthesizer has been used as a synthesizer that can vary the frequency with a resolution of 0.1 Hz in MHz, but with the 211 frequency synthesizer, the smaller the resolution, the slower the response speed, and the faster the frequency can be varied. There wasn't.

For this reason, in the past, NGO (numerically controlled oscillator) using a digital multiplier that inputs frequency setting data fi'
Synthesizers are also used.

As shown in FIG. 4, in this NC, O type frequency synthesizer, the digital MIi1 integrates frequency setting data from the outside every time a clock is input, and sequentially outputs the resultant data as phase address data φ. Each time the ROM2 receives phase address data, the corresponding 5ttnφ,C stored in advance is stored in the ROM2.
Output instantaneous amplitude data of ooφ. Two DA changes yA
P! ! 3.4 converts each output of ROM2 to DA and converts the frequency confidence corresponding to the frequency setting data into SSB
It outputs to each mixer 6.7 of mixer 5. SSB mixer 5
is composed of a mixer 6.7, a 90° phase shifter 8, and a synthesizer Ia9, and the harmonic signal "L" is input to the two mixers 6.7 by the 90" phase shifter 8 with their phases shifted by 90 degrees from each other. Mixer 6.7 mixes it with the output of OA converter 3.4. The outputs of the two mixers 6 and 7 are combined by a combiner 9 to produce a combined frequency output.

In this NCO method, the frequency of the synthesized frequency output can be varied depending on the value of the frequency setting data, so it can be varied at high speed with extremely small resolution.

However, in this NGO frequency synthesizer, the phase shift in the 90° phase shifter 8 must be exactly 90° (
] However, this adjustment is extremely difficult and requires advanced analog technology, and also requires two DA converter J% units and two mixers 6.7, making the equipment large and
The price was high.

<Object of the present invention> An object of the present invention is to correct the above-mentioned drawbacks and provide a small, low-cost frequency synthesizer that can vary the frequency at high speed with extremely small resolution.

<Example of the present invention> Hereinafter, the present invention will be described in detail based on the drawings.

FIG. 1 shows a schematic diagram of an embodiment of a frequency synthesizer according to the present invention.

In the figure, 11 is M that generates the reference frequency f8.
It is a single frequency oscillator. To determine the frequency stability of this synthesizer, a crystal oscillator is usually used.

The frequency source 12, constructed by means such as frequency division, multiplication, or PLL, or a combination thereof, receives the 31 quasi-frequency ``8'' generated by the reference frequency oscillator 11, and generates a rational number multiple of the reference frequency ``. Tsuku frequency r&fc,
A fundamental frequency to is generated.

The harmonic generator 13 receives the main frequency [0 generated by the frequency source 12 and outputs fo, 2ro, 3fo, 4fo, --1N' ON.
...generates harmonics. The harmonic generator 13 is composed of nonlinear elements such as transistors, gate elements, and diodes.

These harmonics are input to the mixer 14 at the next stage. The mixer 14 is a nonlinear element similar to the harmonic generator 13 or a DBM.
(double balanced mixer).

On the other hand, the clock frequency signal "." from the frequency source 12 is input to the digital integration 'ilt 15.

Every time the digital integrator 15 receives this clock frequency fζ, it receives externally inputted frequency setting data N, and sequentially generates phase address data corresponding to the phase angle of the sampling trigonometric function.

This digital integrator 15, as shown in FIG.
This can be realized by the circuit 16 and the latch circuit 17.

The adder 16 adds the frequency setting data Nf input from the input terminal to the output of the latch circuit 17 input to the B input terminal, and the latch circuit 17 sequentially stores the output of the adder 16 and clocks it. It outputs every time it receives the frequency f.

Therefore, the adder 16 receives the frequency setting data N.

(integer) is input, it is weighted and output every 1/[seconds. That is, if Pn is the phase address data, ρ+ ``'o'' Nf ) Pt '''o' 2
NOP, 7” Po” 3N (, R” Pa ” 4N (
,=,・.

Output. Note that, in accordance with the required resolution, the necessary upper m bits of the M-bit phase data are used as phase address data.

The trigonometric function generator 18 stores instantaneous [15 amplitude data] of the trigonometric function sampled for each address in advance, and when it receives this m-bit phase address data k, it generates the triangular Instantaneous amplitude of the function, e.g. -・△, 5n (Δ button k) ... (1) k"o
, +..., 2 is the integer value obtained by rounding 1 by the number of input bits of D△ conversion 7S21.
/[Output every 2 seconds.

The trigonometric function generator 18 generates a trigonometric function RO as shown in FIG.
It is composed of M19 and a latch circuit 20.

Since the output timing of the trigonometric function ROM 19 varies, the latch circuit 20 latches it and outputs it every time it receives the clock Q f, . trigonometric function ROM
19 can be realized, for example, by a ROM of 8 bits x 2'''' words.If the number of bits of the adder 16 is M bits, then the frequency generated by the DA converter 21 is the frequency.

The DA conversion circuit 21 thus receives the instantaneous amplitude data which is a digital signal from the trigonometric function generator 18 (and converts it into analog ffi).

The instantaneous amplitude sampled at this clock frequency fc is smoothed by a filter 22. DA conversion 2S21
Components other than the sine wave of frequency f8 included in the output of the filter 22 are suppressed by the necessary amount. ".

A monolithic crystal filter 23, which will be described later, is on the output side.
If the band is sufficiently higher than the band of
A one-pass filter can also be constructed with only one capacitor in series.

Kokote, Example J Hare -IM Hz, f e
=250 K-1Nf =64, in the case of M-8 pits, in FIG.
64, and the latch circuit 17 receives the clock signal f.

0.64, 128.192.0, to 8 input terminals for each
..., the phase address data kG output from the adder G1 unit 16 becomes -64, 12B, 192.0.64, ....

Therefore, if the instantaneous amplitude data α output from the trigonometric function ROM 19 is A-128 in equation (1), then
(1,-128,0,-128,01128,...
...(in equation (1), Δφ−−?), and every clock conversion (i.e., 1/10' 5ec−1μ
sec) and passes through the DA converter 21 to become a sine wave as shown in FIG. In this way, the frequency of the composite frequency output output from the DA converter 21 can be arbitrarily varied depending on the value of the frequency setting data N4.

The mixer 14 receives the output of the filter 22, combines it with the harmonic output of the harmonic generator 13, and generates Nfo±f N
=0.1.2, . . . generates frequency components.

The monolithic crystal filter 23 is a narrowband bandpass filter that includes one of these components within the normal band, and is a narrowband bandpass filter that contains one of these components within the normal band, and is a narrowband bandpass filter that contains one of these components within the normal band.
The synthetic component N[0-+
: To efficiently extract f8 and suppress other components to a sufficiently large extent.

Also, by changing the pass frequency of the monolithic crystal filter 23, the NF2 filter can be used without changing the other components at all.
Nf. -f8＞ ・・・・・・ ・Yo(N-1)L
Various frequencies such as +f8>(N-1)+, -4°, etc. can be synthesized.

Because the pass band of the monolithic crystal filter 23 is narrow, t8 cannot be changed very much, but the resolution of 8 is because the generation of r8 is performed by phase integration in the digital multiplier 15, so the bit of addition 516 You can make it as fine as you like by simply increasing the number.

In other words, the frequency resolution (minimum step) is Δf Hz
Then, the adder 16 with digits for the integer [-pits that satisfies the clock frequency f is connected to the latch circuit 17 with L digits.
Is required.

As mentioned above, in this frequency synthesizer 1A, by changing the frequency setting data, the frequency can be changed as fast as the band of the output monolithic crystal filter.
Just by increasing the number of bits of the digital product tLJ15,
Resolution can be increased arbitrarily.

In addition, for the output of the frequency synthesizer, a monolithic crystal filter 2 that can be input with a relatively narrow band, small size, and low cost is used.
3, the filter 22 can be a simple and low-cost one, and the harmonic generator 13 for IQing the frequency of the VHF band is a harmonic generator composed of simple nonlinear elements. There is no need to use expensive filters.

As explained above, the present invention makes it possible to create a miniaturized and low-cost frequency synthesizer that can vary the frequency at high speed with extremely small resolution. Since the fundamental frequency of the signal is generated by the same reference frequency generator, high stability can be obtained.

[Brief explanation of drawings]

Fig. 1 is a block diagram showing a schematic configuration of an embodiment of the Kihatsu +111, Fig. 2 is a block diagram without showing some details, Fig. 3 is an output waveform diagram, and Fig. 4 shows a conventional example. It is a block diagram. 11...FA quasi-station frequency oscillator 12...
・Frequency source, 13...Harmonic generator, 14...
...Mixer, 15...Digital integrator, 1
6... Adder, 17... Latch circuit,
18... Trigonometric function generator, 19... 0M120 with trigonometric function 1... Latch circuit, 21...
...DA converter, 22...Filter, 2
3... Monolithic crystal filter. Patent applicant: Makoto Hayakawa, Patent attorney, Anritsu Co., Ltd. Figure 4 Circumference M setting data

Claims (1)

[Scope of Claims] A harmonic generator that generates a harmonic signal of the fundamental frequency; Integrates externally input synthetic frequency setting data every time the clock frequency signal is received, and calculates the phase of the sampling trigonometric function. a digital integrator that outputs phase address data corresponding to an angle; and a trigonometric function generator that sequentially outputs instantaneous amplitude data of a trigonometric function at a corresponding phase angle stored in advance each time it receives phase address data from the digital integrator. a DA converter that performs DA conversion on the instantaneous amplitude data received from the trigonometric function generator and outputs a sine wave signal with a frequency corresponding to the composite frequency setting data; a mixer that mixes a sine wave signal and a harmonic signal from the harmonic generator; a monolithic crystal filter that suppresses signals other than necessary frequency components from the output signal of the mixer and outputs a composite frequency signal; A frequency synthesizer comprising: