JPS60677B2 - mixed waveform signal generator - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a device for digitally synthesizing a mixed waveform signal, which is a mixture of a plurality of analog waveform signals having different frequencies, and is particularly necessary for ensemble effect circuits of electronic musical instruments. The present invention relates to a mixed waveform signal generator that can be integrated into an IC and is suitable for use as a means for supplying control signals.

Conventionally, the circuit configuration for generating a control signal that is a mixture of two signals with different frequencies is to prepare two oscillators that oscillate at different frequencies, and mix the oscillation outputs of each through a resistor, etc. A device that obtains a desired control signal is known (see, for example, Japanese Patent Publication No. 52, Ippara Matsushi issue).

However, since this type of conventional circuit uses an analog signal processing method, it is large in size as a whole, and it is difficult to say that it is suitable for integration into an IC. An object of the present invention is to provide a digital mixed waveform signal generator suitable for integration into an IC.

In order to achieve this object, the present invention is characterized in that an operation corresponding to the amplitude mixing operation of an analog waveform is digitally executed in an adding circuit. Explain in detail.

FIG. 1 shows a mixed waveform signal generator according to an embodiment of the present invention, in which a variable resistor i for controlling the oscillation frequency is used.
Ku with ooa.

Clock pulse generator, 11 Clock pulse generator 10
A frequency divider that divides the clock pulse CP from 0 by 1/I0, 120A is a 1/10 frequency divider of frequency divider 1 1 0.
120B is a second counting circuit consisting of an 8-bit counter that counts clock pulses CP. The counting output P of the first counting circuit 120A is supplied to a first exclusive OR gate circuit 140A including seven exclusive OR gates GII to GI7, and the counting output P of the first counting circuit 120A is supplied to a first exclusive OR gate circuit 140A including seven exclusive OR gates GII-GI7,
The counting output R of 5 exclusive OR gates G21 to G25
is supplied to a second exclusive OR gate circuit 140B including. These first and second exclusive OR gate circuits 14
0A, 140B' are each input counting output P,
This is provided to convert a unidirectional numerical change in the up direction only in R to a bidirectional numerical change in the up and down directions.A similar function is provided in the lead/down direction.
Also obtained through only memory. first exclusive O
In the R gate circuit 140A, exclusive OR gate GI
A first counting circuit 120A is connected to one input terminal of each of I to GI7.
"1" to "7" output of the counter (lower 7 of counting output P
bits) are supplied respectively, and GII to GI7
The other input terminal of the counter is supplied with the "8" output (the most significant bit of the signal output P), and each gate GII~
A 7-bit gate output Q is output from the output side of GI7. Further, in the second exclusive OR gate circuit 140B, the counters "3" to "7" of the second counting circuit 120B are connected to one input terminal of each of the exclusive OR gates G21 to G25.
” output (3rd bit to 7th bit of counting output R) is supplied, and the “8” output (most significant bit of counting output R) of the same counter is supplied to the other input terminal of G21 to G25. A 5-bit gate output SI is output from the output side of each gate G21--G25. The first adder 160 receives the gate output Q as its AI to A7 inputs, and also receives the gate output SI as its BI to B5 inputs, and the upper 2 bits of B6 and B7 inputs and the carry input Ci. "0" is added.

An 8-bit addition output T is taken out to the output side (SI to S7 output and carry output Co) of the first adder 160,
This addition output T is supplied to the second adder 180 as inputs AI to A8. The second adder 180' is its BI
~BL input is supplied with the 4-bit output S2 from exclusive OR gates G22-G25, and I10'' is added as the upper 3-bit B5-B8 input and carry input 0. On the output side of the adder 180, the lower 3 bits of the addition output are discarded and only the upper 5 bits of S4 to S8 are taken out, and the addition output U consisting of this 5-bit output is a digital-analog (D A) A conversion circuit 200' is supplied. This D/A conversion circuit 20 receives the addition output U and outputs an analog signal of a desired waveform, that is, a mixed waveform signal V. For example, the second It can be configured as shown in the figure.Second
In the figure, 201 is a decoder that receives and decodes the addition output U of the adder 180, and 202 is an analog information memory that receives the decoded output of the decoder 201 as a control signal and outputs the mixed waveform signal V. It is.

The analog information memory 202 has a large number of haze pressure extraction points defined in order to extract analog voltages corresponding to instantaneous values of a large number of sample points of a desired analog waveform, and a voltage V between both ends.
One resistor 20 consisting of a diffused resistor etc. to which o is applied
3, and a group of FETs, etc., which read out analog voltages from a plurality of voltage extraction points of the resistor 203 to the output terminal 205 in accordance with a digital readout control signal supplied from the decoder 201 in an orderly and cyclical manner. Gate element GT
The output circuit 204 includes an output circuit 204 including I to GT31.
In this example, the resistance value between the adjacent pressure points of the resistor 203 is determined so as to obtain an analog voltage corresponding to the instantaneous amplitude value of the sine wave, and the mixed waveform signal V is a mixture of the sine waves. It is now possible to obtain a signal in the form of Since the resistive analog information memory illustrated here can be easily integrated into an IC, it is convenient for integrating the entire mixed waveform signal generator shown in FIG. 1 into an IC except for the resistor 100a. It is something. next,
The overall operation of the circuit shown in FIG. 1 will be explained. The clock pulse generator 100 generates a clock pulse CP of a predetermined frequency f set by a variable resistor 100a, and this clock pulse CP is 1/1 with a frequency of 1/1.
Powder is given to you. The counter of the first counting circuit 120A is 1
/1 and f' (= f/10
), while repeatedly counting the clock pulses CP' of
The second counting circuit 120B repeatedly counts the clock pulses CP. The count outputs P and R respectively output from the counting circuits 120A and 120B both show numerical changes that increase in the upward direction, thereby digitally expressing periodic amplitude changes. Here, the frequency f p of the periodic amplitude change digitally expressed by the counting output P is the frequency f' of the 1/1 divided clock pulse CP' multiplied by 1/8 of 2 (1/). , while
The frequency fR of the periodic amplitude change digitally expressed by the counting output R is the frequency f of the clock pulse CP equal to 1
′〆 times. As a result, the frequency fp becomes 1/10 of the frequency fR. Since the count outputs P and R are unidirectional changes in numerical values only in the increasing direction, they digitally represent periodic amplitude changes similar to sawtooth waves. In this embodiment, in order to make such an amplitude change similar to a triangular wave, first and second exclusive OR gate circuits 140A and 140B are provided to control only the up (increase) direction of the count outputs P and R. Gate outputs Q, SI, and S2 are generated by converting unidirectional numerical changes into bidirectional numerical changes in up and down (increase and decrease) directions. Here, the numerical change (instantaneous amplitude change) of the counting output P and the corresponding numerical change (instantaneous amplitude value change) of the gate output Q for one counting cycle of the counting circuit 120A are shown in the following table. -become. Further, the numerical changes in the gate outputs SI and S2 according to the count output R are also the same as those in the above table, except that the number of bits is different.

In this manner, each of the gate outputs Q, SI, or S2 is input to the adder 160 or 18 as a digital representation of a periodic amplitude change similar to a triangular wave.
In adder 160, gate output Q and gate output S
When adding I, digital waveform mixing is performed at an amplitude mixing ratio of 8:2 by setting the B6 and B7 inputs to mo''.

In other words, AI to A7 inputs are 0 to 127 in decimal notation.
BI~B5 input shows numerical changes from 0 to 31.
, and the addition output T consisting of the SI to S7 outputs and the carry output Co shows a numerical change of 0 to 1 spot.
This addition output T has a relatively high frequency (one-tone frequency of the first periodic amplitude change) relative to a first periodic amplitude change (corresponding to the count output P) of a relatively low frequency. It digitally represents periodic amplitude changes in the form of superimposing or mixing periodic amplitude changes (corresponding to count output R), and the amplitude mixing ratio therein is such that the first periodic amplitude change is 8 and the periodic amplitude change is 8. The periodic amplitude change of 2 is a ratio of 2. Similarly to the first adder, the second adder 180 performs a digital waveform mixing operation, but the amplitude mixing ratio in this case is set to 8:1 by setting the B5 to B8 inputs to no''. The AI to A8 inputs of the adder 180 indicate numerical changes of 0 to 1, and the B
I~B4 input shows numerical change from 0~15, SI~S8
The addition output shows a numerical change from 0 to 173. However, of the 8-bit addition outputs such as "00000000" to "10101101", only the S4 to S8 outputs are extracted and the lower 3 bits "000" to "101" are discarded, so the addition outputs B4 to The mixed signal U consisting of S8 shows amplitude changes in 21 steps from "00000" to "10101". Also, the amplitude mixing ratio in the adder 18 is 8:1, and this is mixed in the adder 16.
By adding up the amplitude mixing ratio of 8:2 in , it can be seen that amplitude mixing at a ratio of 8:3 is achieved as a whole.
Therefore, the mixed signal U has a relatively low frequency first periodic amplitude change (corresponding to the count output P) and a relatively high frequency second periodic amplitude change (corresponding to the count output R). It is output as a digital representation of a mixed waveform mixed at a ratio of 3. Mixed signal U obtained as above
is converted into an analog signal with a desired waveform, that is, a mixed waveform signal V by the D/A conversion circuit 20. In this example, a sinusoidal waveform is obtained by means such as specifying the resistance value between each voltage extraction point of the resistor in the resistive analog information memory described above, so the mixed waveform signal V is A signal with a waveform as shown in FIG. 3 is obtained. According to FIG. 3, it is clear that the mixed waveform signal V has a form in which a relatively low frequency, large amplitude sine waveform Va is superimposed with a relatively high frequency, small amplitude sine waveform Vb. Since the mixed waveform signal generator according to the present invention described above has a configuration based on digital circuits, it has advantages such as being easy to integrate into an IC, and the amplitude mixing ratio can be easily changed as appropriate. Furthermore, as a method for realizing a mixed waveform signal generator such as the one targeted by this invention,
One possible method is to provide multiple digital waveform memories, read digital waveform data from each memory at different rates, add and synthesize the data in an adder circuit, and then perform D/A conversion. Since a plurality of waveform memories are required and the readout control circuit thereof is complicated, the overall configuration is complicated and the cost is high.On the other hand, the mixed waveform signal generator of the present invention , the count outputs of multiple counters that count clock signals of different frequencies are converted into digital waveform data representing a triangular mixed waveform, and then decoded and read out from the analog information memory, so the structure of the memory is simple. One analog information memory is sufficient, and its peripheral circuits can be easily configured with counters, exclusive OR gates, adders, decoders, etc., making the overall configuration extremely simple and reducing costs. Since it is converted into a triangular wave combination waveform before the addition process, there is an advantage that any mixed waveform signal such as a sine wave combination waveform can be easily obtained by simply setting each analog voltage appropriately in the analog information memory. , in the above embodiment, the amplitude mixing ratio is 8:2.
If this is acceptable, the adder 180 can be omitted and the addition output T of the adder 160 can be input to the D/A conversion circuit 20. Next, a preferred application example of the mixed waveform signal generator according to the present invention will be explained with reference to FIG.

The illustrated example shows an ensemble effect circuit for an electronic musical instrument;
B are respectively a clock pulse generator, a variable resistor, a 1/10 frequency divider, and a first
A counting circuit and a second counting circuit are shown. The clock pulse CP generated by the clock pulse generator 100 is, for example, 1.6384 KHz, and therefore
The divided output CP' of 0 frequency divider 1 1 0 is 163.84H
z, the output P of the counting circuit 120A is 0.64 Hz, and the output R of the counting circuit 1 20B is 6.4 Hb.

A counting output P generated from the first counting circuit 120A,
The counting output R generated from the second counting circuit 120B is distributed to three systems to obtain three-phase control signals.

Each count output P is generated by seven exclusive OR gates (EXO
Three exclusive OR gate circuits 141A, 142A, 14 having the same configuration as the aforementioned gate circuit 140A including
3A in parallel, and the counting output R is supplied to three exclusive OR gate circuits 141B, 1 having the same configuration as the aforementioned gate circuit 140B, each including five exclusive OR gates.
42B and 143B in parallel. These gate circuits 141A, 141B, 142A, 142B, 14
3A and 143B are provided for converting numerical changes in the upward direction of the count outputs P and R into numerical changes in the upward and downward directions. Gate circuit 142A, 14
3A, 142B, and 143B are each provided with an adder circuit 132A in order to generate a desired phase difference between the three-phase signals.
, 133A, 132B, and 133B are provided. Adder circuits 132A and 132B are both adders ADI.
The binary signal "1010"( By adding 10), the phase of the output Q2, S2 of the gate circuit 142A, 1428 becomes the output Q1, S of the gate circuit 141A, '1418.
They are each shifted by 112.50 with respect to I. Further, the adder circuits 133A and 133B both have a similar configuration including an adder AD12,
"6" to " of the corresponding counters 20A and 120B, respectively.
By adding the binary signal "101" (5 in IQ Hayabusa number) to the output of "8" (6th bit to 8th bit of counting outputs P, R), the output Q of gate circuits 143A, 143B is
3 and S3 are shifted by 2250 degrees with respect to the outputs Q1 and SI of the gate circuits 141A and 141B, respectively. Addition circuits 171, 172, 173 are
Two adders 160,1 similar to those described above for the figures.
80 respectively, and digitally synthesizes a mixed signal in the form of a mixture of two waveforms with different frequencies, as described above.

The first adder circuit 171 receives the gate outputs Q1 and SI and generates a first mixed signal UI, and the second adder circuit 172
receives the gate outputs Q2 and S2 and outputs the second mixed signal U2.
The third adder circuit 173 generates the gate output Q3,S
3 and generates a third mixed signal U3. These first to third mixed signals U1, U2, and U3 are output while maintaining the above-mentioned phase difference, and are outputted from D/A conversion circuits 210 and 2 similar to the above-described circuit 200, respectively.
20,230' are supplied. D/A conversion circuit 210,
220 and 230 generate mixed waveform signals V1, V2, and V3 as respective outputs by the same operation as described above. These mixed waveform signals V1, V2, and V3 are three-phase signals with a phase difference of 112.50 between VI and V2 and 2250 between VI and V3.
This is used as a phase control signal. Note that in the above circuit, the portion surrounded by a frame indicated by the symbol "IC" can be easily integrated into a semiconductor chip. In a circuit system for frequency modulating or phase modulating a musical tone signal, a musical tone signal MI is inputted from an input terminal 300 to three bucket brigades connected in parallel. Device (BBD) 31 0
, 320, 330 to an output terminal 340.

Each BBD 31 0, 320, 330 receives a pair of drive signals (transfer clock pulses) OA, ◇A, ? with opposite phases from the corresponding voltage controlled oscillator (VCO) 311, 321, 331. B-stop B, hook and ◇c are supplied respectively. Each BBD 310, 320, 330 operates as a shift register type delay line in a manner known per se by being driven by a pair of drive signals A and A, OB and OB, Gc and ◇c, respectively. In this example,
By changing the signal delay time in the BBD, which operates as such a delay line, according to the frequency modulation signal, the musical tone signal MI is subjected to frequency modulation or phase modulation to obtain a musical tone signal MO that can be produced with a vibrato effect. In particular, by providing three systems of such vibrato effect adding circuit systems and controlling them with control signals having different phases, it is possible to generate musical tones with a so-called ensemble effect. To be more specific, each BBD310, 320,
VC0311, 321, 3 provided corresponding to 330
31, a corresponding low pass filter (LPF) 312
, 322, 332 through mixed waveform signals V1, V2, V
3 are respectively supplied as control signals. The low-pass filters 312, 322, 332 are the D/A conversion circuit 201,
Signals V1 and V2 output from 202 and 203, respectively
, V3 by removing the high frequency components to generate these signals U1, U2.
, U3 as control signals with suitable smooth waveforms. VC0311, 321, 33 controlled by control signals V1, V2, V3, respectively
1, frequency modulation is performed, and each output signal JA and JA
, OB is stopped and B, Gc and Jc are the respective control signals V1.
, V2, and V3 in a frequency-modulated manner with different phases. Therefore, each BBD3 1 0,320
, 330, the drive signals OA and O in frequency modulated form
A musical tone signal MI that causes a change in delay time according to c between A, B, OB, and Mec, and produces a vibrato effect.
Frequency modulation (and in some cases phase modulation) is achieved. Therefore, the output terminal 340' is for each BBD3.
1. Three musical tone signals subjected to frequency modulation with different phases at 0, 320, and 330 are extracted in a mixed form, and the mixed musical tone signal output MO extracted in this way can effectively produce an ensemble effect. Become something. As described above, according to the present invention, a digital mixed waveform signal generator suitable for IC implementation can be realized, and in particular, such a mixed waveform signal generator can be used to configure an ensemble effect circuit of an electronic musical instrument. This would be advantageous as it would significantly reduce the size and cost of the structure.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram of a mixed waveform signal generator according to an embodiment of the present invention, FIG. 2 is a circuit diagram showing an example of a D/A conversion circuit in the circuit of FIG. 1, and FIG. 1 is a diagram showing the output waveform of the circuit of FIG. 1, and FIG. 4 is a block diagram of an ensemble effect circuit for an electronic musical instrument showing a preferred application example of the mixed waveform signal generator according to the present invention. 120A, 1208... Counting circuit, 140A, 140
8... Exclusive OR circuit, 160, 180... Adder, 2
00...D/A conversion circuit. Figure 2 Figure 3 Figure Ship diagram Dimensions

Claims (1)

[Claims] 1. A mixed waveform signal generator for generating a mixed waveform signal in the form of a mixture of a plurality of analog waveform signals having different frequencies, which includes: (a) repeatedly generating clock pulses each having a different frequency; (b) receiving count outputs from the first and second counting means, respectively, and calculating numerical changes in only one direction of each count output; (c) first and second converting means respectively converting into numerical changes in opposite directions;
(d) an addition means that receives the output of the conversion means as an addition input and generates an addition output obtained by mixing the outputs of the first and second conversion means at a predetermined ratio; A decoding means for decoding, and (e) an analog information memory from which an analog voltage is read in accordance with the output of the decoding means are provided, and the analog voltage read from the analog information memory is taken out as the mixed waveform signal. A mixed waveform signal generator characterized by: 2. In the mixed waveform signal generator according to claim 1, the analog information memory has a large number of voltage extraction points to generate analog voltages each corresponding to the instantaneous values of a large number of sample points of a desired waveform. The decoding means comprises: a resistor for generating an analog voltage, to which a voltage is applied to both ends, and a readout circuit including a large number of gate elements connected correspondingly to each voltage extraction point of the resistor; A mixed waveform characterized in that the analog voltage is sequentially and cyclically read out from the resistor to the output terminal via the gate element by supplying the output as a readout control signal to the readout circuit. signal generator.