JPS622336A - Image memory access system - Google Patents

Abstract

PURPOSE:To shorten the time required for one cycle of the time of memory access, and to execute a printing operation at a high speed by reading out an image data from an image memory, and simultaneously, clearing a storage area in which the read-out image data has been stored. CONSTITUTION:A gate circuit 18 goes to effective by a write control signal 20, and an image data 11 from a microprocessor goes to an image memory data 13, and written in an image memory. Also, a gate circuit 19 which is used when reading out the image memory goes to effective by a read-out control signal 21 from the microprocessor, and the image memory write data 13 goes to '0', and written in the image memory. As a result, the image memory is cleared. Accordingly, when a serial data sending-out operation from the microprocessor is ended, immediately the processor can write the next printing data in the image memory.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to an image memory access method, and particularly to an image memory access method suitable for application to a page printer.

(Prior Art) FIG. 5(a) is a block diagram showing a configuration example of an image memory access method of a conventional page printer, and FIG. 5(b)
) is an operation timing diagram of this configuration.

In FIG. 5(a), when the microprocessor 2 in the printer control unit 1 sends serial data for printing to the link unit 7', it sends a write signal 3 to the image memory 7 in the printer control unit 1. . Next, in accordance with the timing signal 8 from the printer unit 6, the previously written printing data is sent from the image memory 7 to the printer unit 6 as serial data 5.

Thereafter, a memory clear signal 4 is sent to the image memory 7 as a preparation operation for the next operation, and another print data write operation is performed.

That is, in the method described above, when performing one printing operation (or one cycle), as shown in FIG. The operation and the memory clear operation of the image memory 7 were performed in this order.

(Problem to be Solved by the Invention) However, in such a conventional image memory access method, since the writing operation to the image memory 7 and the memory clearing operation require the same amount of time, There is a problem in that the time required for one cycle is long, and therefore the time required for one printing is long.

Therefore, an object of the present invention is to solve the above-mentioned problems, shorten the time required for one cycle during memory access, and speed up printing operations.

(Means for Solving the Problems) The present invention is directed to an access method for an image memory that stores image data.

The present invention uses the access method described above, and is configured by simultaneously reading image data from the image memory and clearing the storage area in which the read image data was stored.

(Function) According to the present invention, the function of one cycle during memory access is as follows. First, image data is written to the image memory. Next, the written image data is read from the image memory. At this time, at the same time as reading the image data, the read image
- The storage area where the data was stored is cleared.

Therefore, instead of clearing the image memory after the image data has been read as in the conventional method, the image memory is cleared at the same time as the image data is read, making it possible to shorten one cycle of memory access compared to the conventional method. can.

(Example) Hereinafter, the present invention will be described in detail based on an example with reference to the drawings.

FIG. 1 is a block diagram showing an outline of an embodiment of the present invention, and FIG. 2 is an operation timing diagram of this block diagram. 1st
In the figure, the same reference numerals are given to the same components as in FIG. 5(a), and the explanations here will be omitted. The feature of this embodiment is that a memory clear signal 22 is sent to the image memory 7.
The purpose is to clear the image memory 7 by supplying the image data every time the image data is read. Note that details of this component will be described later.

Next, this operation will be explained.

The microprocessor 2 in the printer control unit 1 is
When sending serial data for printing to the printer unit 6, the write signal 6 is sent to the image memory 7 in the printer control unit 1, and then the previously written print data is sent according to the timing signal 8 from the printer unit 6. The data is sent from the image memory 7 to the printer unit 6 as serial data 5. At this time, simultaneously with the serial data sending operation, a memory clear signal 22 is supplied to the image memory 7 by hardware, which will be described later, to perform a memory clear operation. Therefore, as soon as the serial data sending operation is completed, the microprocessor 2 can write the next print data into the image memory 7.

That is, as shown in FIG. 2, this operation is performed by writing data 0 to the image memory 7 in the read modify write mode based on the memory clear signal 22 of the memory clear operation of the immograph.

FIG. 3 is a diagram showing an example of a configuration for clearing the image memory 7 at the same time as sending serial data from the image memory 7 to the printer unit 6. In the figure, a portion that performs memory clearing at the same time as reading from the image memory 7° is composed of an image memory write data control gate 17 and an image memory write/read address generation circuit 10.

Image memory write data control gate 17
When the image memory write data control signal 12 sent from the microprocessor 2 is at a low level, the data 11 from the microprocessor 2 is output as is as the image memory write data 13, and when the image memory write data control signal 12 is at a high level. This multiplexer has the function of outputting all low level data, ie, "0", to the image memory write data 13, regardless of the data 11 from the microprocessor 2.

Therefore, the microprocessor 2 transfers the data to the image memory 7.
During a write operation, the image memory write data control signal 12 is at a low level, and the data 11 from the microprocessor 2 is generated by the image memory write/read address generation circuit 10. It is written into the image memory 7 indicated by address data 16.

When transmitting serial data from the image memory 7 to the print unit 6, the data in the image memory Z indicated by the image memory write/read address data 16 generated by the image memory write/read address generation circuit 10 is It is output as image memory read data 14, converted to serial data 15 by the parallel-serial conversion circuit 9, and output to the printer unit 6. At this time, by using a dynamic RAM as a component of the image memory 7 and reading in read-modify-write mode, the contents of the image memory write data 13 are written to the same address where the image memory was read. .

Therefore, when transmitting serial data from the image memory 7 to the printer unit 6, if the image memory write data control signal 12 is set to high level and the image memory write data 16 is set to "0", the serial data is sent to the printer unit 6. "0" is written to the address in the image memory 7 that was read for output, and the image memory 7 is placed in the same state as when the memory clear operation was performed.

FIG. 4 shows a detailed configuration example of the image memory write data control gate 17 shown in FIG. 3. In the figure, 18 is a gate circuit used when writing image data into the image memory 7. This gate circuit 18 is enabled by a write control signal 20 (corresponding to the image memory write data control signal in FIG. 6), and the image data 11 from the microprocessor 2 is transferred to the image memory write data 1
6 and is written into the image memory 7. Also,
Reference numeral 19 denotes a gate circuit used when reading the image memory, which is enabled by a read control signal 21 from the microprocessor 2, and "0" becomes the image memory write data 13 and is written into the image memory 7. As a result, the image memory 7 is cleared.

The present invention has been described above based on an embodiment in which the present invention is applied to a page printer. The present invention is not limited to page printing/printing, but can be applied to devices that require similar control.

(Effects of the Invention) As explained above, according to the present invention, the time required for one cycle when accessing the image memory can be shortened, so when applied to a page printer, the printing speed can be improved. I can do it.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an embodiment of the present invention, FIG. 2 is an operation timing diagram of this embodiment, FIG. 3 is a diagram showing the configuration around the image memory of this embodiment, and FIG. 4 is a diagram of the third embodiment. Image memory write data control gate 17 shown in
FIGS. 5(a) and 5(b) are a diagram showing a detailed configuration example of a conventional page printer and FIGS. 5(b) and 5(a) and 5(b), respectively, are diagrams showing a configuration of an image memory access method of a conventional page printer, and their operation timing diagrams. DESCRIPTION OF SYMBOLS 1... Printer control unit, 2... Microprocessor, 3... Write signal, 4... Memory clear signal, 5... Serial data, 6... Printer unit, 7... Image memory, 8 ...Print timing signal, 9.Parallel/serial conversion circuit, 10.Image memory write/read address generation circuit, 11.Data from microprocessor 2, 12.
...Image memory write data control signal, 13...Image memory write data, 14...
Image memory read data, 15... Serial data, 16... Image memory write, write/read address data, 17... Image memory write data control gate, 18... Write gate, 19... Read gate , 20...Write control signal, 21...Read control signal. Patent applicant Oki Electric Industry Co., Ltd. Patent application agent Patent attorney Megumi Yamamoto -11-Data from microprocessor 212-Image memory write data control signal 13-Image memory 1 data to be written 14-Image memory Read data 15 - Serial data 16 - Image memory write Read address data 17 - Image memory write data Control gate Configuration of the surroundings of the image memory 7 in Fig. 1 Fig. 3 Control gate No. 4 18: Write gate 19: Read Configuration example diagram of gate 20: write hrontrol signal 21: read control signal 17

Claims (1)

[Claims] An access method for an image memory that stores image data, characterized in that, at the same time as reading the image data from the image memory, a storage area in which the read image data was stored is cleared. Image memory access method.