JPS6223167A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS6223167A
JPS6223167A JP16189985A JP16189985A JPS6223167A JP S6223167 A JPS6223167 A JP S6223167A JP 16189985 A JP16189985 A JP 16189985A JP 16189985 A JP16189985 A JP 16189985A JP S6223167 A JPS6223167 A JP S6223167A
Authority
JP
Japan
Prior art keywords
cathode
electrode plate
side electrode
deformation
plate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16189985A
Other languages
Japanese (ja)
Other versions
JPH0566730B2 (en
Inventor
Masafumi Ono
小野 政文
Shigeyasu Takatsuchi
高槌 重靖
Kazuyoshi Masuda
増田 和由
Shuroku Sakurada
桜田 修六
Tadashi Sakagami
阪上 正
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Hitachi Power Semiconductor Device Ltd
Original Assignee
Hitachi Ltd
Hitachi Haramachi Electronics Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd, Hitachi Haramachi Electronics Ltd filed Critical Hitachi Ltd
Priority to JP16189985A priority Critical patent/JPS6223167A/en
Publication of JPS6223167A publication Critical patent/JPS6223167A/en
Publication of JPH0566730B2 publication Critical patent/JPH0566730B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Thyristors (AREA)
  • Die Bonding (AREA)

Abstract

PURPOSE:To remove the scratch deformation of a cathode Al electrode and reduce the deformation of the cathode Al electrode, and to lengthen thermal-fatigue lifetime by forming a cathode-side electrode plate to a cuppy drawing shape forming an R extending over inner and outer peripheries and also bevelling a section corresponding to an R section in a cuppy electrode plate shaping the R extending over the inner and outer peripheries in the shape of another cathode-side electrode plate. CONSTITUTION:An R is formed extending over inner and outer peripheries in a cathode- side electrode plate 8 (a thin impingement buffer plate) and the electrode plate 8 is drawn to a cuppy shape, and another cathode-side electrode plate 7 (a thick impingement buffer plate) is incorporated under the state in which a section corresponding to an R forming section in the cathode-side electrode plate 8 for the electrode plate 7 is bevelled. Large bevelling C is executed in order to also make the deformation of a cathode Al electrode 2 smaller than the R value of the cathode-side electrode plate 8 in the size of bevelling C at that time. Accordingly, scratch deformation is removed, and the deformation of the cathode Al electrode 2 is reduced only by a section corresponding to an effect in which bevelling and the formation of the Rs are each executed to the cathode-side electrode plates 7, 8.

Description

【発明の詳細な説明】 〔発明の利用分野〕 本発明はGTOのカソード側電極板構造に係択特にカソ
ードAt電極の変形低減に好適な半導体構造に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a cathode side electrode plate structure of a GTO, and particularly to a semiconductor structure suitable for reducing deformation of a cathode At electrode.

〔発明の背景〕[Background of the invention]

従来のGTO構造は第4図のようにカソード側電極板(
肉薄緩衝板)形状が平らな打抜き型加工となっており、
また、もう一つのカソード側電極板(肉厚緩衝板)形状
が面取力無しの形状となってい念。しかし第5図のよう
にカソードAt電極が熱疲労等によシカソード側電極板
と共に横方向へ変形する際に発生するスクラッチ状の変
形に対してはカソードAt電極全体の変形を含めこの変
形を減少するという点については配慮されていなかった
。なお、この種の装置として関連するものには例えば特
開昭58−43531号、特開昭59−134876号
等が挙げられる。
The conventional GTO structure has a cathode side electrode plate (
Thin buffer plate) The shape is a flat punching die.
Also, please note that the shape of the other cathode side electrode plate (thick buffer plate) has no chamfering force. However, as shown in Figure 5, scratch-like deformation occurs when the cathode At electrode is laterally deformed together with the cathode side electrode plate due to thermal fatigue, etc., and this deformation, including the deformation of the entire cathode At electrode, is reduced. There was no consideration given to the fact that Incidentally, related devices of this type include, for example, Japanese Patent Laid-Open Nos. 58-43531 and 59-134876.

〔発明の目的〕[Purpose of the invention]

本発明の目的は、従来構造の欠点を補い、カソードAt
電極の変形を減少するために一つにはカソード側電極板
(肉薄緩衝板)の形状を内外周縁にわたシR採りとなる
カップ状の絞シ型加工形状とし、もう一つのカソード側
電極板(肉厚緩衝板)の形状も内外周縁にわたりR採り
となるカップ状の電極板のR部に当たる部分を面取りを
することを提供することにある。
The purpose of the present invention is to compensate for the drawbacks of the conventional structure and to
In order to reduce the deformation of the electrode, one of the cathode side electrode plates (thin buffer plates) is shaped into a cup-like drawing shape with rounded edges on the inner and outer peripheries, and the other cathode side electrode plates are The shape of the (thick buffer plate) is also provided by chamfering the portion corresponding to the R portion of the cup-shaped electrode plate, which is rounded over the inner and outer peripheral edges.

〔発明の概要〕[Summary of the invention]

本発明は、従来のカソード側電極板(肉薄・肉厚緩衝板
)形状がR採シなしの平らな打抜き型加工及び面取りな
しの加工となっておシカソードAt電極が熱疲労等によ
)カソード側電極板と共に横方向へ変形する際にこのカ
ソード側電極板によって変形させられ発生するスクラッ
チ状の変形やカソードAt電極が横方向に潰し出されて
変形が生じていたために、このカソードAt電極の変形
を減少するためにカソード側電極板(肉厚緩衝板)とカ
ソードAt電極との接触のなじみを良くし、当り具合い
を均一にするために挿入されたもう一つのカソード側電
極板(肉薄緩衝板)の加工仕上り形状を内外8縁にわた
りR採りとなるカップ状の絞力型加工としカソードAt
電極のスクラッチ変形をなくし、またこのR採りのカッ
プ状の電極板に位置決めされるカソード側電極板(肉厚
緩衝板)の面取りをカップ状の電極板のR値より大きい
面取りCをとり、カソードAt電極の変形を減少する構
造とする。
In the present invention, the shape of the conventional cathode side electrode plate (thin/thick buffer plate) has been changed to a flat punching die without R-cutting and without chamfering, and the cathode At electrode has been changed from thermal fatigue etc.) to the cathode. This cathode At electrode was deformed due to scratch-like deformation caused by the cathode electrode plate being deformed in the lateral direction together with the side electrode plate, and deformation caused by the cathode At electrode being crushed in the lateral direction. In order to reduce deformation, another cathode side electrode plate (thin buffer plate) was inserted to improve the contact between the cathode side electrode plate (thick buffer plate) and the cathode At electrode, and to make the contact uniform. Cathode At
In order to eliminate scratch deformation of the electrode, the chamfer C of the cathode side electrode plate (thick buffer plate) positioned on this R-shaped cup-shaped electrode plate is made larger than the R value of the cup-shaped electrode plate. The structure is designed to reduce deformation of the At electrode.

〔発明の実施例〕[Embodiments of the invention]

以下、本発明の一実施例を第1図及び第2図によシ説明
する。第1図はカソードAt電極2のスクラッチ変形や
潰れによる変形を減少中るためにカソード側電極板8(
肉薄緩衝板)にR採りを施し、もう一つのカソード側電
極板7(肉厚緩衝板)に面取フを施し、その他の部品と
共に組込まれ半導体Siベレット1を圧接している状態
図である。
An embodiment of the present invention will be described below with reference to FIGS. 1 and 2. FIG. 1 shows the cathode side electrode plate 8 (
This is a state diagram in which the other cathode side electrode plate 7 (thick buffer plate) is rounded and the other cathode side electrode plate 7 (thick buffer plate) is chamfered, and is assembled together with other parts and pressed against the semiconductor Si pellet 1. .

第2図囚はカソード側電極板7(肉厚緩衝板)に面増シ
Cを施し、もう一つのカソード側電極板8(肉薄緩衝板
)をR採りしていない状態で組込まし半導体Siベレッ
ト1を圧接している状態図であシ、第2図■は、第2図
囚の状態が熱疲労等によりカソードAt電極2カ’f1
7D圧圧接され変形した状態図である。第2図囚の状態
でカソード側電極板8(肉薄緩衝板)VtR,採〕が施
されていない場合は内外周縁のエツジ部がカソードAt
電極2をこす力第2図■の°ようにカソードAt電極2
がスクラッチ変形2′を起こす。第3図(Aは、カソー
ド側電極板8(肉薄緩衝板)VC内外周縁にわたIL採
りを施しカップ状の絞シ型加工として更にもう一つのカ
ソード側電極板7(肉厚緩衝板)のカソード側電極板8
(肉薄緩衝板)のR採フ部に当たる部分を面取りしてい
る状態で組込まれ半導体Siベレット1を圧接している
状態図である。この場合に面取りCの大きざに、カソー
ド側電極板8(肉薄緩衝板)のR値よシもカソードAt
電極2の変形を減少するためにも大きな面取りcを施す
必要がある。また第3図■は第3図囚の状態が熱疲労等
によシ加圧圧接された場合のカソードAt電極2の変形
具合いを示している。本実施例によれば第3図構造を適
用することによって第2図■のようなスクラッチ変形が
なくなりカソード側電極板7−8にそれぞれ面取シ及び
R採りを施した効果分力ソードAt電極2の変形が減少
するという効果がある。また熱疲労寿命試験においても
第4図のような従来構造品で5000サイクル以下の寿
命に対し25000サイクル以上の寿命があることも試
験を実施して確認できた。
In Figure 2, the cathode side electrode plate 7 (thick buffer plate) is subjected to area increase C, and another cathode side electrode plate 8 (thin buffer plate) is assembled without R, and a semiconductor Si pellet is installed. Fig. 2 (■) is a state diagram in which the cathode At electrode 2 is in pressure contact with the cathode At electrode 2 due to thermal fatigue, etc.
7D is a state diagram of a deformed state after pressure welding. In the state shown in Figure 2, if the cathode side electrode plate 8 (thin buffer plate) VtR is not installed, the edges of the inner and outer peripheries are connected to the cathode At.
The force that rubs the electrode 2 is as shown in Figure 2.
causes scratch deformation 2'. Fig. 3 (A shows another cathode side electrode plate 7 (thick buffer plate) with wadding IL cutting applied to the inner and outer peripheral edges of the cathode side electrode plate 8 (thin buffer plate) and a cup-shaped drawing process. Cathode side electrode plate 8
FIG. 3 is a diagram showing a state in which the thin buffer plate (thin buffer plate) is assembled with the portion corresponding to the rounded edge portion being chamfered and pressed against the semiconductor Si pellet 1. In this case, depending on the size of the chamfer C, the R value of the cathode side electrode plate 8 (thin buffer plate) will also change.
In order to reduce deformation of the electrode 2, it is necessary to provide a large chamfer c. Further, FIG. 3 (■) shows the degree of deformation of the cathode At electrode 2 when the state shown in FIG. 3 is pressed under pressure due to thermal fatigue or the like. According to this embodiment, by applying the structure shown in FIG. 3, the scratch deformation as shown in FIG. This has the effect of reducing the deformation of No. 2. Furthermore, in a thermal fatigue life test, it was confirmed through testing that the product had a lifespan of 25,000 cycles or more, compared to the lifespan of 5,000 cycles or less for conventional structural products as shown in Figure 4.

〔発明の効果〕〔Effect of the invention〕

本発明によればカソードAt電極のスクラッチ変形をな
くしカソードAt電極の変形を減少できるので熱疲労寿
命の向上に効果がある。
According to the present invention, scratch deformation of the cathode At electrode can be eliminated and deformation of the cathode At electrode can be reduced, which is effective in improving the thermal fatigue life.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例のカソードAt電極の変形を
減少するためにそれぞれ面取シ及びR採りを施したカソ
ード側電極板が組込まれた縦断面図、第2図は二つのカ
ソード側電極板のうち一方の電極板に面取力を施した状
態で二つのカソード側電極板が組込まれた縦断面図とカ
ソードAt電極の変形を示す拡大図、第3図は第1図の
二つのカソード側電極板にそれぞれ面取シ及びR採りを
施した部分を拡大した縦断面図とカソードAt電極の変
形を示す拡大図、第4図は従来の構造を示す縦断面図、
第5図1−j第4図の二つのカソード側電極板がカソー
ドAt電極を変形させている部分を拡大した縦断面図と
カソードAt電極の変形を示す拡大図である。 1・・・半導体3iベレツト、2・・・カソードAt電
極、3・・・ゲー)At電極、4・・・アノードAti
!極、5・・・カソード−ゲート間絶縁保護膜、6・・
・Biペレット端面保護材、7・・・カソード側電極板
(肉厚緩衝板)、8・・・カソード側電極板(肉薄緩衝
板)、9・・・アノード側電極板(肉厚緩衝板]、10
・・・カソード側冷却電極体、11・・・アノード側冷
却電極体。
FIG. 1 is a longitudinal cross-sectional view of an embodiment of the present invention in which a cathode side electrode plate is chamfered and rounded to reduce deformation of the cathode At electrode, and FIG. Figure 3 is a longitudinal cross-sectional view of two cathode side electrode plates assembled with chamfering force applied to one of the side electrode plates, and an enlarged view showing deformation of the cathode At electrode. FIG. 4 is an enlarged vertical cross-sectional view of the chamfered and rounded portions of the two cathode side electrode plates, and an enlarged view showing the deformation of the cathode At electrode; FIG. 4 is a vertical cross-sectional view showing the conventional structure;
FIG. 5 1-j is an enlarged vertical sectional view of a portion where the two cathode side electrode plates of FIG. 4 deform the cathode At electrode, and an enlarged view showing the deformation of the cathode At electrode. DESCRIPTION OF SYMBOLS 1... Semiconductor 3i beret, 2... Cathode At electrode, 3... Ge) At electrode, 4... Anode Ati
! Pole, 5... Cathode-gate insulating protective film, 6...
・Bi pellet end face protection material, 7... Cathode side electrode plate (thick buffer plate), 8... Cathode side electrode plate (thin buffer plate), 9... Anode side electrode plate (thick buffer plate) , 10
... Cathode side cooling electrode body, 11... Anode side cooling electrode body.

Claims (1)

【特許請求の範囲】[Claims] 1、平型ゲートターンオフサイリスタにおいて、カソー
ド側電極板(肉薄緩衝板)の加工仕上り形状を内外周縁
にわたり、平らな形状に対してR採りとなるカップ状の
絞り型加工とし、またこのカップ状の電極板に位置決め
されるもう一つのカソード側電極板(肉厚緩衝板)の面
取りをカップ状の電極板R採り部に当たる部分をR値よ
りも大きな面取りを施すことを特徴とする半導体装置。
1. In a flat gate turn-off thyristor, the finished shape of the cathode side electrode plate (thin buffer plate) is a cup-shaped drawing process that is rounded from the flat shape over the inner and outer peripheries, and this cup-shaped A semiconductor device characterized by chamfering a portion of another cathode side electrode plate (thick buffer plate) positioned on the electrode plate that corresponds to the R-shaped portion of the cup-shaped electrode plate to a value larger than the R value.
JP16189985A 1985-07-24 1985-07-24 Semiconductor device Granted JPS6223167A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16189985A JPS6223167A (en) 1985-07-24 1985-07-24 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16189985A JPS6223167A (en) 1985-07-24 1985-07-24 Semiconductor device

Publications (2)

Publication Number Publication Date
JPS6223167A true JPS6223167A (en) 1987-01-31
JPH0566730B2 JPH0566730B2 (en) 1993-09-22

Family

ID=15744128

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16189985A Granted JPS6223167A (en) 1985-07-24 1985-07-24 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS6223167A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55121654A (en) * 1979-03-13 1980-09-18 Toshiba Corp Compression bonded semiconductor device
JPS59134876A (en) * 1983-01-20 1984-08-02 Mitsubishi Electric Corp Semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55121654A (en) * 1979-03-13 1980-09-18 Toshiba Corp Compression bonded semiconductor device
JPS59134876A (en) * 1983-01-20 1984-08-02 Mitsubishi Electric Corp Semiconductor device

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Publication number Publication date
JPH0566730B2 (en) 1993-09-22

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