JPS62225915A - Semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To fluctuate the output of a voltage amplifying circuit around a predetermined reference voltage between GND and the voltage of a power source, by feeding back the output of a peak holding circuit to the input side of the voltage amplifying circuit. CONSTITUTION:After optical input is detected by a light detection element 1, the output of a current/voltage converting circuit 14 is amplified by a voltage amplifying circuit 15. That is, the peak value of the output voltage of the voltage amplifying circuit 15 is held to a peak holding circuit 11 and the output thereof is fed back to the input side of the voltage amplifying circuit 15 through a resistor 13 of which the resistance value is properly selected with respect to the resistance value of a resistor 6. By this method, the output of the voltage amplifying circuit 15 fluctuates around voltage VA. The output of the voltage amplifying circuit 15 is compared on the basis of the voltage VA by a voltage comparator 12 to obtain digital output as shown by d.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor integrated circuit that converts the output current of a photodetecting element into a digital signal, and more particularly to a semiconductor integrated circuit with improved input dynamic range.

[Prior Art] FIG. 3 is a circuit diagram showing the configuration of a conventional semiconductor integrated circuit. First, the configuration of this circuit will be explained. In the figure, the output side of the photodetector element 1 is a current/voltage conversion circuit 1 consisting of an inverting amplifier composed of an amplifier 2 and a resistor 3.
Connected to the input side of 4. The photodetector element 1 detects light input and outputs a current according to the detected amount of light. The current/voltage conversion circuit 14 converts an input current into a voltage and outputs the voltage. The output side of the current/voltage conversion circuit 14 is connected to the input side of a voltage amplification circuit 15 made up of an inverting amplifier made up of a resistor 4, an amplifier 5, and a resistor 6. The voltage amplification circuit 15 inverts and amplifies the input voltage and outputs it.

The output side of the voltage amplification circuit 15 is connected to one input side of the voltage comparator 12, and is also connected to the input side of the peak hold circuit 11 via a resistor 9. Amplifier 7 and resistor 8 constitute a reference voltage generation circuit 16 consisting of an inverting amplifier, and the output side of this reference voltage generation circuit 16 is a connection point between resistor 9 and the input side of peak hold circuit 11 via resistor 10. connected to. Amplifier 2, Amplifier 5 and Amplifier 7
have the same characteristics, and the reference voltage generating circuit 16 generates the output voltage of the amplifier 2.5 when there is no optical input to the photodetecting element 1, that is, the same voltage as the DC level of the amplifiers 2 and 5 when there is no signal. Output. The peak hold circuit 11 holds the peak value of the input voltage. Peak hold circuit 1
The output side of 1 is connected to the other input side of voltage comparator 12.

Next, the operation of this circuit will be explained with reference to the signal waveform diagram in FIG. The photodetecting element 1 outputs a current corresponding to the detected amount of light (Fig. 4(a)'), and this current is converted into a voltage by the current/voltage conversion circuit 14 (Fig. 4(a)').
b)). Current/voltage conversion circuit 14 output is voltage amplification circuit 1
5 (FIG. 4(C)), and the output of the voltage amplifying circuit 15 is applied to one input side of the voltage comparator 12. Also, the difference between the output voltage of the voltage amplifier circuit 15 and the output voltage of the MttP and voltage generation circuit 16 is approximately 1.
/2, and this divided voltage is applied to the peak hold circuit 11. Therefore, the peak hold circuit 11 has approximately 1/1/2 of the peak value of the output voltage of the voltage conversion circuit 15.
A value of 2 is held, and this held value is independent of the pulse width of the input signal.

The voltage comparator 12 converts the output of the voltage amplification circuit 15 into a digital output by comparing the output of the voltage amplification circuit 15 and the output of the peak hold circuit 11 (Fig. 4(d)).
In this way, the output current of the photodetector 1 is converted into a digital signal without changing the pulse width of the photodetector 1 output signal.

[Problems to be Solved by the Invention] By the way, in the conventional semiconductor integrated circuit, the voltage amplifier circuit 1
Since the five outputs are made to swing between the voltage V and the power supply voltage Vec, the input of one circuit cannot be made very large. In addition, since the difference between the output voltage of the voltage amplifier circuit 15 and the output voltage VA of the reference voltage generation circuit 16 is divided into approximately 17/2, the error in the output of the peak hold circuit 11 is relatively smaller than when the voltage is not divided. This is approximately twice as large, and the smaller the input to the circuit, the greater the effect. For this reason, conventional integrated circuits have had the problem of not being able to provide a large dynamic range of input to the circuit.

The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to obtain a semiconductor integrated circuit that can widen the dynamic range of input to the circuit.

[Means for Solving the Problems] The semiconductor integrated circuit according to the present invention converts optical input into a current using a photodetecting element, converts the output of the photodetecting element into a voltage using a current/voltage conversion path, and performs voltage amplification. The circuit amplifies the current/voltage conversion circuit output, the peak hold circuit holds the peak value of the voltage amplification circuit output, this peak value is fed back to the input side of the voltage amplification circuit, and the reference voltage generation circuit generates a predetermined level. Generates a reference voltage,
The output of the voltage amplification circuit is compared with a reference voltage using a voltage comparator, and the output of the voltage amplification circuit is converted into a digital output.

[Function] In this invention, by feeding back the peak hold circuit output to the input side of the voltage amplification circuit, the voltage amplification circuit output is grounded around a predetermined reference voltage vA.
and ta voltage Vce. Also, since the output of the voltage amplification circuit is directly input to the peak hold circuit,
The influence of errors in the peak hold circuit output can be reduced.

[Example] Embodiments of the present invention will be described below with reference to the drawings.

In the description of this embodiment, the description of parts that overlap with the description of the conventional technology will be omitted as appropriate.

FIG. 1 is a circuit diagram showing the configuration of a semiconductor integrated circuit according to an embodiment of the present invention. The configuration of this embodiment differs from the configuration shown in FIG. 3 in the following points.

That is, resistor 9.10 is removed and voltage amplification circuit 15
The output side of is connected to one input side of a voltage comparator 12, and is also connected to the input side of a voltage amplification circuit 15 via a peak hold circuit 11 and a resistor 13. The output side of the reference voltage generation circuit 16 is directly connected to the other input side of the voltage comparator 12. Note that amplifier 2, amplifier 5, and amplifier 8 have the same characteristics as in the case of the conventional circuit, and 11 quasi-voltage generating circuit 16 has the same characteristics as amplifier 2. It outputs the same voltage 6 as the DC level of the amplifier 5 when there is no signal.

Next, the operation of this circuit will be explained with reference to the signal waveform diagram in FIG. After the optical input is detected by the photodetection element 1, the output of the current/voltage conversion circuit 14 is transferred to the voltage amplification circuit 15.
The operation is the same as that of the conventional circuit until amplification is performed.

In this embodiment, when there is no optical input to the photodetector element 1, the output of the voltage amplifier circuit 15 is set to the voltage vA! ! As a standard, it is set to 11 times the output of the peak hold circuit 11. That is, the peak value of the output voltage of the voltage amplifier circuit 15 is held by the peak hold circuit 11, and the output of the peak hold circuit 11 is
By feeding back the resistance value of the resistor 6 to the input side of the voltage amplifying circuit 15 via the appropriately selected resistor 13, the output of the voltage amplifying circuit 15 will touch the voltage vA as the center. (Figure 2 (C)). Then, the voltage comparator 12 outputs this voltage V8 from the voltage amplifier circuit 15! ! The output current of the photodetector 1 is converted into a digital signal without changing the pulse width of the photodetector 1 output signal. .

In this way, since the output of the voltage amplifier circuit 15 can be made to swing between GND and the power supply voltage Vce, the input of the semiconductor integrated circuit can be increased. In addition, since the output of the voltage amplification circuit 15 is directly input to the peak hold circuit 11, even when the input to the circuit is small, the peak hold circuit 11
The influence of errors in one output can be reduced. Therefore, the input dynamic range of the semiconductor integrated circuit can be made larger than that of conventional circuits.

[Effects of the Invention] As described above, according to the present invention, the peak hold circuit holds the peak value of the voltage amplification circuit w power, and this peak value is fed back to the input side of the voltage amplification circuit, so that the voltage amplification circuit output can be made to swing between GND and power supply voltage Vcc around a predetermined reference voltage VA. Furthermore, since the output of the voltage amplification circuit is directly input to the peak hold circuit, the influence of errors in the output of the peak hold circuit can be reduced. Therefore, the dynamic range of the input to the semiconductor integrated circuit that converts the output current of the photodetecting element into a digital signal can be increased.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing the configuration of a semiconductor integrated circuit according to an embodiment of the present invention. FIG. 2 is a signal waveform diagram for explaining the operation of the semiconductor integrated circuit of FIG. 1. FIG. 3 is a circuit diagram showing the configuration of a conventional semiconductor integrated circuit. FIG. 4 is a signal waveform diagram for explaining the operation of the semiconductor integrated circuit of FIG. 3. In the figure, 1 is a photodetector element, 2.5.7 is an amplifier, and 3
, 4.6.8.13 are resistors, 12 is a voltage comparator, 14 is a current/voltage conversion circuit, 15 is a voltage amplification circuit, and 16 is a reference voltage generation circuit. Note that the same reference numerals in each figure indicate the same or corresponding parts.

Claims (3)

[Claims] (1) A photodetection element that converts optical input into a current, a current/voltage conversion circuit that converts the output of the photodetection element into a voltage, a voltage amplification circuit that amplifies the output of the current/voltage conversion circuit, and the voltage amplification circuit. a peak hold circuit that holds a peak value of a circuit output and feeds the peak value back to the input side of the voltage amplification circuit; a reference voltage generation circuit that generates a reference voltage at a predetermined level; A semiconductor integrated circuit comprising a voltage comparator that compares the output of the voltage amplifier circuit with a reference voltage and converts the output of the voltage amplifier circuit into a digital output. (2) The semiconductor integrated circuit according to claim 1, wherein the voltage conversion circuit, the voltage amplification circuit, and the reference voltage generation circuit are inverting amplifiers having the same characteristics. (3) The semiconductor according to claim 1 or 2, wherein the reference voltage is equal to the DC level of the voltage amplification circuit when there is no optical input in the case where the peak hold circuit is not provided. integrated circuit.