JPS6222444B2 - - Google Patents
Info
- Publication number
- JPS6222444B2 JPS6222444B2 JP54150253A JP15025379A JPS6222444B2 JP S6222444 B2 JPS6222444 B2 JP S6222444B2 JP 54150253 A JP54150253 A JP 54150253A JP 15025379 A JP15025379 A JP 15025379A JP S6222444 B2 JPS6222444 B2 JP S6222444B2
- Authority
- JP
- Japan
- Prior art keywords
- layer
- hcl
- carrier concentration
- flow rate
- etching
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
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- 229910001218 Gallium arsenide Inorganic materials 0.000 claims abstract description 16
- 238000005530 etching Methods 0.000 claims abstract description 14
- 239000000758 substrate Substances 0.000 claims abstract description 11
- 239000013078 crystal Substances 0.000 claims abstract description 8
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 claims description 12
- 238000000034 method Methods 0.000 claims description 7
- 239000002019 doping agent Substances 0.000 abstract description 3
- 239000007792 gaseous phase Substances 0.000 abstract 2
- 239000007789 gas Substances 0.000 abstract 1
- 230000000630 rising effect Effects 0.000 abstract 1
- 238000004519 manufacturing process Methods 0.000 description 4
- 238000001947 vapour-phase growth Methods 0.000 description 4
- 235000012431 wafers Nutrition 0.000 description 4
- 239000012808 vapor phase Substances 0.000 description 2
- 229910017009 AsCl3 Inorganic materials 0.000 description 1
- RBFQJDQYXXHULB-UHFFFAOYSA-N arsane Chemical compound [AsH3] RBFQJDQYXXHULB-UHFFFAOYSA-N 0.000 description 1
- 229910000070 arsenic hydride Inorganic materials 0.000 description 1
- OEYOHULQRFXULB-UHFFFAOYSA-N arsenic trichloride Chemical compound Cl[As](Cl)Cl OEYOHULQRFXULB-UHFFFAOYSA-N 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 239000007791 liquid phase Substances 0.000 description 1
- 230000010355 oscillation Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02387—Group 13/15 materials
- H01L21/02395—Arsenides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02538—Group 13/15 materials
- H01L21/02546—Arsenides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/0257—Doping during depositing
- H01L21/02573—Conductivity type
- H01L21/02576—N-type
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
Abstract
Description
【発明の詳細な説明】
本発明はガンダイオード等の製造に適したひ化
ガリウム（以下「GaAs」という）エピタキシヤ
ル膜の気相成長方法に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for vapor phase growth of a gallium arsenide (hereinafter referred to as "GaAs") epitaxial film suitable for manufacturing Gunn diodes and the like.
ガンダイオードはマイクロ波固体発振素子の一
種であつて、低電圧電源で、連続またはパルス発
振動作させることができ、また低雑音であるた
め、通信機、レーダー等に不可欠の重要な素子と
なつている。 Gunn diodes are a type of microwave solid-state oscillator, and because they can operate in continuous or pulsed oscillation with a low-voltage power supply and have low noise, they have become an important element indispensable for communications equipment, radar, etc. There is.
ガンダイオードは、単結晶基板表面に通常は
GaAsからなるn+−n-−n+三層構造を有するエピ
タキシヤル膜を形成したウエハを用いて製造され
る。 Gunn diodes are usually mounted on the surface of a single crystal substrate.
It is manufactured using a wafer on which an epitaxial film having an n + −n − −n + three-layer structure made of GaAs is formed.
ここでn+層はｎ型キヤリア濃度が1018／cm3程
度、またはそれ以上であるGaAsエピタキシヤル
層であり、n-層は、ｎ型キヤリア濃度が1017／cm3
以下、望ましくは1015〜1016／cm3であるGaAsエピ
タキシヤル層である。 Here, the n + layer is a GaAs epitaxial layer with an n-type carrier concentration of about 10 18 /cm 3 or more, and the n - layer has an n-type carrier concentration of 10 17 /cm 3 .
Hereinafter, the GaAs epitaxial layer is preferably 10 15 to 10 16 /cm 3 .
ガンダイオードの特性は、上記エピタキシヤル
ウエハのキヤリア濃度の変化のプロフアイルによ
り左右される。 The characteristics of the Gunn diode depend on the profile of the change in carrier concentration of the epitaxial wafer.
すなわち、第１図に示すように、n+層から一
旦急激にキヤリア濃度が減少し、望ましくはデイ
ツプを形成し、その後、徐々にキヤリア濃度が増
加するプロフアイルが望ましい。なお、第１図で
縦軸はキヤリア濃度を、また横軸はエピタキシヤ
ル層の厚みをそれぞれ任意のスケールで示したも
のである。 That is, as shown in FIG. 1, a profile is desirable in which the carrier concentration decreases rapidly starting from the n + layer, preferably forming a dip, and then gradually increases. In FIG. 1, the vertical axis represents the carrier concentration, and the horizontal axis represents the thickness of the epitaxial layer, each on an arbitrary scale.
従来、気相成長方法によつて製造した場合、エ
ピタキシヤル装置内に残留する不純物の影響等に
より、望ましいプロフアイルを再現性よく得るこ
とは困難であつた。 Conventionally, when manufacturing by a vapor phase growth method, it has been difficult to obtain a desired profile with good reproducibility due to the influence of impurities remaining in the epitaxial device.
また、液相成長方法は、エピタキシヤル層の厚
さの制御が困難であり、またオートドーピング等
が生じるため適していなかつた。 Furthermore, the liquid phase growth method is not suitable because it is difficult to control the thickness of the epitaxial layer and autodoping occurs.
本発明者等は、従来法の問題点を解決して、気
相成長方法によりガンダイオードの製造に適した
キヤリア濃度の変化のプロフアイルを有する
GaAsエピタキシヤルウエハを再現性よく製造す
ることを目的として鋭意研究を重ねた結果、本発
明に到達したものである。 The present inventors have solved the problems of the conventional method and have a carrier concentration change profile suitable for manufacturing Gunn diodes by a vapor phase growth method.
The present invention was achieved as a result of extensive research aimed at manufacturing GaAs epitaxial wafers with good reproducibility.
すなわち、本発明の上記の目的は、単結晶基板
表面にn+−n-−n+三層構造を有し、かつ一のn+
−n-界面でキヤリア濃度が急峻に変化し、他の
n+−n-界面ではキヤリア濃度がなだらかに変化
するキヤリア濃度変化のプロフアイルを有する
GaAsエピタキシヤル膜を気相成長させるにあた
つて、上記一のn+−n-界面の形成に際しては、
Ga雰囲気中でエツチングを行ない、また上記他
のn+−n-界面の形成に際しては、As雰囲気中で
エツチングを行うことにより達せられる。 That is, the above object of the present invention is to have an n + −n − −n + three-layer structure on the surface of a single crystal substrate, and to have one n +
The carrier concentration changes sharply at the −n - interface, and other
At the n + −n -interface, the carrier concentration has a profile where the carrier concentration changes gradually.
When growing a GaAs epitaxial film in a vapor phase, when forming the n + -n - interface mentioned above,
Etching is performed in a Ga atmosphere, and the other n + -n - interfaces mentioned above can be formed by etching in an As atmosphere.
単結晶基板としては、ｎ型キヤリア濃度が
1018／cm3以上のGaAs単結晶基板が適当である
が、Si，Ge等からなる単結晶基板を使用するこ
とができる。 As a single crystal substrate, the n-type carrier concentration is
A GaAs single crystal substrate of 10 18 /cm 3 or more is suitable, but a single crystal substrate made of Si, Ge, etc. can also be used.
本発明にかかるGaAsエピタキシヤル膜の成長
にあたつては、上記基板表面にバツフアー層をか
ねて、GaAsn+層を気相エピタキシヤル成長させ
る。成長に用いるガス組成としては、AsH3−Ga
−HCl−H2系、AsCl3−Ga−Hcl−H2系が適当で
ある。 In growing the GaAs epitaxial film according to the present invention, a GaAsn + layer is grown by vapor phase epitaxial growth on the surface of the substrate, which also serves as a buffer layer. The gas composition used for growth is AsH 3 −Ga
-HCl- H2 system and AsCl3 -Ga-Hcl- H2 system are suitable.
n-層が所定の厚さに成長した後、気相成長を
停止する。 After the n - layer has grown to a predetermined thickness, the vapor phase growth is stopped.
続いて、As成分を流量５×10-5mol／分〜５×
10-4mol／分で約２分間流しながら、その間HCl
で５〜30秒エツチングを行なう。 Subsequently, the As component was introduced at a flow rate of 5×10 -5 mol/min to 5×
While flowing at 10 -4 mol/min for about 2 minutes, HCl
Perform etching for 5 to 30 seconds.
この場合、As成分の流量が多い程、キヤリア
濃度の変化のプロフアイルはなだらかになり、
n+−n-界面の厚さを0.2μｍ単位で約３μｍまで
厚くすることができる。 In this case, the higher the flow rate of the As component, the more gradual the profile of the carrier concentration change.
The thickness of the n + −n − interface can be increased to about 3 μm in units of 0.2 μm.
続いて、所定量のｎ型ドーパントを供給しなが
ら、n-層を成長させる。ｎ型ドーパントを流さ
ない場合、キヤリア濃度を約1015／cm3にすること
ができる。 Subsequently, an n - layer is grown while supplying a predetermined amount of n-type dopant. If no n-type dopant is flowed, the carrier concentration can be about 10 15 /cm 3 .
所定の厚さのn-層を形成させた後、エピタキ
シヤル成長を停止し、Ga輸送用のHClを５×
10-5mol／分〜３×10-4mol／分の流量で１〜２
分流しながら、その間別の導入口から導入した
HClで５〜30秒エツチングを行なう。続いてn+層
の成長を開始する。 After forming an n -layer of a predetermined thickness, the epitaxial growth was stopped and HCl for Ga transport was added 5×.
1-2 at a flow rate of 10 -5 mol/min to 3 x 10 -4 mol/min
While diverting the flow, it was introduced from another inlet during that time.
Etch with HCl for 5-30 seconds. Next, the growth of the n + layer begins.
この場合、Ga輸送用HClの流量を２×
10-4mol／分以上にするとデイツプを伴なつた急
峻なキヤリア濃度の立上りを得ることができる。 In this case, the flow rate of HCl for Ga transport is set to 2×
When the rate is 10 -4 mol/min or more, a steep rise in carrier concentration accompanied by a dip can be obtained.
なお、上記の成長の順序を逆にして、最初の
n+−n-界面を形成するためのエツチングを行な
つてもよい。 Note that by reversing the above growth order, the first
Etching may be performed to form an n + -n -interface .
本発明方法を実施することにより、所望のキヤ
リア濃度変化プロフアイルを有するn+−n-−n+
三層構造を有するGaAsエピタキシヤル膜を再現
性よく製造することができるため、産業上の利用
価値は極めて大である。 By carrying out the method of the present invention, n + −n − −n + having the desired carrier concentration change profile can be obtained.
Since a GaAs epitaxial film having a three-layer structure can be manufactured with good reproducibility, it has extremely high industrial value.
次に実施例に基づいて本発明方法をさらに具体
的に説明する。 Next, the method of the present invention will be explained in more detail based on Examples.
実施例
Siをドープしたｎ型キヤリア濃度が2.1×1018／
cm3であり、表面の結晶学的方位が（100）面から
３゜傾いた面であるGaAs単結晶基板及び金属Ga
を収容した容器を縦型エピタキシヤル反応装置に
装入した。Example Si-doped n-type carrier concentration is 2.1×10 18 /
cm 3 and the crystallographic orientation of the surface is a plane tilted 3° from the (100) plane and a GaAs single crystal substrate.
The container containing the sample was charged into a vertical epitaxial reactor.
H2を3500ml／分の流量で供給しながら、基板
温度を750℃、Ga容器を800℃に昇温した。反応
装置が所定の温度に達した後、H2で10％に希釈
したAsH3を100ml／分、Ga輸送用のHClを10ml／
分、H2Sを50ppm含有するH2を600ml／分供給し
ながら20分間n+層を成長させた。キヤリア濃度
は1.2×1018／cm3、厚さは６μｍであつた。 While supplying H 2 at a flow rate of 3500 ml/min, the substrate temperature was raised to 750°C and the Ga container to 800°C. After the reactor reaches a predetermined temperature, AsH3 diluted to 10% with H2 is added at 100 ml/min and HCl for Ga transport is added at 10 ml/min.
The n + layer was grown for 20 minutes while supplying 600 ml/min of H 2 containing 50 ppm H 2 S. The carrier concentration was 1.2×10 18 /cm 3 and the thickness was 6 μm.
AsH3、HCl及びH2Sの供給を停止した後、約１
時間かけて基板温度を770℃に昇温した。次に
AsH3（10％）を100ml／分及びエツチング用HCl
を60ml／分の流量で10秒間流し、上記n+層を0.7
μｍエツチングした。エツチング用HClの供給を
停止した後、さらに110秒間AsH3を流した。 After stopping the supply of AsH 3 , HCl and H 2 S, approx.
The substrate temperature was raised to 770°C over time. next
AsH 3 (10%) at 100 ml/min and HCl for etching
was flowed for 10 seconds at a flow rate of 60 ml/min, and the above n + layer was
μm etched. After stopping the supply of etching HCl, AsH 3 was continued to flow for an additional 110 seconds.
続いてGa輸送用HClを10ml／分流してn-層を
13分間成長させた。得られたn+−n-界面の厚さ
は３μｍ、n-層のキヤリア濃度は1.8×1015／
cm3、厚さは４μｍであつた。 Next, 10 ml/min of HCl for Ga transport was flowed to remove the n -layer .
Grown for 13 minutes. The thickness of the obtained n + -n - interface was 3 μm, and the carrier concentration of the n - layer was 1.8 × 10 15 /
cm 3 and thickness was 4 μm.
次にAsH3の供給を停止して、Ga輸送用HClの
流量を40ml／分、エツチング用HClの流量を60
ml／分として10秒間エツチングを行なつた後、さ
らに50秒間Ga輸送用HClを供給した。その後、
Ga輸送用HClの流量を10ml／分、AsH3（濃度10
％）の流量を100ml／分、H2S（濃度50ppm）を
600ml流しながら５分間n-層を成長させた。得ら
れたn+−n-界面の厚さは0.2μｍでn-層側に幅0.6
μｍのデイツプが形成された。またn+層の厚さ
は1.5μｍ、キヤリア濃度は1.2×1018／cm3であつ
た。 Next, the supply of AsH 3 was stopped, and the flow rate of HCl for Ga transport was 40 ml/min, and the flow rate of HCl for etching was 60 ml/min.
After etching was performed for 10 seconds at a rate of ml/min, HCl for Ga transport was supplied for an additional 50 seconds. after that,
The flow rate of HCl for Ga transport was 10 ml/min, AsH 3 (concentration 10
%) flow rate 100ml/min, H2S (concentration 50ppm)
The n -layer was grown for 5 minutes with a flow of 600 ml. The thickness of the obtained n + −n - interface is 0.2 μm, and the width is 0.6 on the n - layer side.
A dip of μm was formed. The thickness of the n + layer was 1.5 μm, and the carrier concentration was 1.2×10 18 /cm 3 .
第１図はガンダイオード用エピタキシヤルウエ
ハのキヤリア濃度変化プロフアイルの一例を示す
図表である。
１……キヤリア濃度変化プロフアイル。
FIG. 1 is a chart showing an example of a carrier concentration change profile of an epitaxial wafer for Gunn diodes. 1...Carrier concentration change profile.
Claims (1)
し、かつ一のn+−n-界面ではキヤリア濃度が急
峻に変化し、他のn+−n-界面ではキヤリア濃度
がなだらかに変化するキヤリア濃度変化のプロフ
アイルを有するひ化ガリウムエピタキシヤル膜を
気相成長させるにあたつて、上記一のn+−n-界
面の形成に際しては、Ga雰囲気中でエツチング
を行ない、また上記他のn+−n-界面の形成に際
しては、As雰囲気中でエツチングを行なうこと
を特徴とする方法。1 The single crystal substrate surface has an n + -n - -n + three-layer structure, and the carrier concentration changes sharply at one n + -n - interface, and the carrier concentration changes rapidly at the other n + -n - interfaces. When growing a gallium arsenide epitaxial film having a carrier concentration change profile in which the carrier concentration changes gradually, etching is performed in a Ga atmosphere to form the above-mentioned n + -n - interface. , and a method characterized in that etching is performed in an As atmosphere when forming the other n + -n - interface.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15025379A JPS5673427A (en) | 1979-11-20 | 1979-11-20 | Manufacture of gallium arsenide epitaxial wafer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15025379A JPS5673427A (en) | 1979-11-20 | 1979-11-20 | Manufacture of gallium arsenide epitaxial wafer |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5673427A JPS5673427A (en) | 1981-06-18 |
| JPS6222444B2 true JPS6222444B2 (en) | 1987-05-18 |
Family
ID=15492895
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15025379A Granted JPS5673427A (en) | 1979-11-20 | 1979-11-20 | Manufacture of gallium arsenide epitaxial wafer |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5673427A (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6734476B2 (en) * | 2001-06-14 | 2004-05-11 | Ixys Corporation | Semiconductor devices having group III-V compound layers |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4915991A (en) * | 1972-06-05 | 1974-02-12 |
-
1979
- 1979-11-20 JP JP15025379A patent/JPS5673427A/en active Granted
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4915991A (en) * | 1972-06-05 | 1974-02-12 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5673427A (en) | 1981-06-18 |
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