JPS62221044A - Preventing circuit for malfunction of microprocessor - Google Patents

Abstract

PURPOSE:To prevent the deterioration of performance of a motor, a solenoid, etc. owing to the damage caused by burning by detecting via a detecting means that the output signal of a microprocessor is kept ON or OFF for a prescribed period of time or longer and therefore deciding the abnormality of the microprocessor to break a power supply. CONSTITUTION:A microprocessor 1 is programmed so as to output a basic clock 101 from an output port in a normal action mode. If the processor 1 has abnormality, the clock 101 is not outputted from the output port and this port is fixed at a logic level 1 or 0. When the port is fixed at a logic level '0', a transistor Q1 is kept off and therefore a capacitor C1 is continuously charged through resistors R1 and R2. Then the charging voltage level signal 103 exceeds the input threshold level of an OR gate circuit 3. Thus the output signal 105 of the circuit 3 is outputted and supplied to a power supply control part 4. The part 4 turns off the power supply.

Description

TECHNICAL FIELD The present invention relates to a peripheral circuit configuration of a microprocessor, and particularly to a malfunction prevention circuit for a microprocessor.

Conventionally, the peripheral circuits of microprocessors did not have a judgment circuit to judge whether or not the microprocessor itself was operating normally. The disadvantage is that even if the function stops, this abnormal state cannot be detected.

Therefore, an object of the present invention is to provide a microprocessor malfunction detection circuit capable of detecting an abnormal state of a microprocessor.

According to the present invention, there is provided a detection means for detecting that an output signal of a microprocessor continues to be on or off for a predetermined period of time or more, and a power supply that executes power-off based on the output signal of the detection means. A malfunction prevention circuit for a microprocessor characterized by having a control section is obtained.

Embodiment Next, the present invention will be explained in more detail with reference to the drawings showing an embodiment of the present invention.

Referring to FIG. 1, one embodiment of the present invention includes a microprocessor 1, a transistor Q1 that is turned on and off by a basic clock 101 output from the microprocessor 1,
Charges through resistors R1 and R2 when transistor Q1 is off, and charges through resistor R when transistor Q1 is on.
2, an inverter 2 which reverses the polarity of the basic clock 101, a transistor Q2 which is turned on and off by the inverted basic clock 102, and resistors R3 and R4 when the transistor Q2 is off. The capacitor C2 is charged through the capacitor C2 and discharged through the resistor R4 when the transistor Q2 is on, and the charging of the capacitor C1 is caused by the bell signal 103 and the capacitor C2.
2, and a power supply control section 4 that turns off the power when the output signal 105 of the OR gate circuit 3 reaches the logic level "1". Next, the operation of this embodiment will be explained.

The microprocessor 1 is programmed to output the basic clock 101 from the output port during normal operation. Transistor Q1 has basic clock 101 '1
” level, it turns on and discharges the charge stored in the capacitor C1 through the resistor R2. Also, the transistor Q
1 is turned off when the basic clock 101 is at the "0" level. At this time, capacitor C1 is charged through resistors R1 and R2. The charging voltage level of the capacitor C1 due to this charging and discharging is as shown in FIG.

When the microprocessor 1 is in an abnormal state, the basic clock is not output from the output port, and the output port is fixed at the logic level of 1'' or '0''. When the level is fixed at "O", the transistor Q1 is turned off. Since the capacitor C1 continues to be charged through the resistors @R1 and R2, its charging voltage level signal 103 exceeds the input threshold level of the OR gate circuit 3, and the OR gate circuit output signal 105 is output. The signal is input to the power supply control section 4, and the power supply control section 4 turns off the power.

Also, due to an error in microprocessor 1, output port 1
If the logic level is fixed at the logic level of ", transistor Q2 remains off, so the capacitor C
The charging TtTi pressure level signal 104 of 2 is output to the OR gate circuit 3.
exceeds the input threshold level of OR gate circuit 3
An OR gate circuit output signal 105 is output from the circuit, and the power supply control unit 4 turns off the power based on this signal.

Detailed Description of the Invention As described in detail, the present invention detects whether or not a clock signal output from a microprocessor is being output using a circuit that combines a resistor, a capacitor, and a transistor. This has the effect of detecting an abnormal condition and turning off the power to prevent burnout and deterioration of motors, solenoids, etc.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram of an embodiment of the present invention, and FIG. 2 is a signal waveform diagram of each part of the embodiment. Explanation of symbols of main parts 1...Microprocessor 2...Inverter circuit

Claims (1)

[Claims] It is characterized by comprising a detection means for detecting that an output signal of a microprocessor continues to be on or off for a predetermined period of time or more, and a power supply control section for executing power-off based on the output signal of the detection means. Microprocessor malfunction prevention circuit.