JPH0689709B2 - Engine controller - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to an engine control device having a control microcomputer incorporated therein, and particularly to a backup circuit of an external circuit during a period in which the output of the control microcomputer is invalidated by a reset. The present invention relates to an engine control device that outputs an output to a controlled device.

In general, an engine control unit BCU of a vehicle includes a control microcomputer (MPU) 10 including a memory and a controlled device such as a transmission 4 for driving an internal combustion engine 2 and a transmission 3 as shown in FIG. From the battery 7 through the A / D converter 11 for A / D converting the output of the sensor or switch 5 for detecting the state of the device, the level converter 12 for converting the level of those outputs, and the ignition switch 6. Supplied for example 12
Power supply circuit 13 for converting the power supply V _B of V into a constant voltage of 5 V, for example
A reset circuit 14 for resetting the MPU 10, an output control logic circuit 15 for outputting one of the output of the MPU 10 and an internally generated backup signal based on the reset signal from the reset circuit 14, and an output control logic circuit. Amplifying the output of 15 to adjust the fuel (or air amount) of the internal combustion engine 2,
It includes a drive circuit 16 for generating a control signal for adjusting the ignition advance angle, the throttle opening, etc., and a drive signal for the transmission 4.

In the above configuration, the reset circuit 14 generates a reset signal V _RST for resetting the MPU 10, and performs the following operation.

Power-on reset Generally, the microcomputer operates in the order of oscillating circuit operation → program counter operation → initial setting (for example, setting all ports to a high impedance state) → external circuit reset → program start when power is turned on. When the oscillation circuit output (clock cycle) immediately after the power is turned on is unstable, the program related to time control is executed by waiting until it stabilizes to ensure accuracy. Therefore, the power-on detection unit 14a of the reset circuit 14 operates from the power supply circuit 13 to the MPU 10 as shown in FIG.
_The reset signal V _RST is changed from the low level to the high level after a delay time T _RST of about several tens msec to one hundred and several tens msec from the time when _CC is supplied.

Power supply abnormal reset Operating voltage of microcomputer is 5V ± 5% or 5V
Since ± 10% is common, the engine control unit EUC obtains a constant voltage V _{CC of} 5V from the battery voltage V _B as described above. However, V _B line or interruption caulking failure or contact failure in the connector terminal portion of the wire harness, or negative surges and positive surge superimposed by the inductive load such as the starter, drop V _B at low temperatures cranking Therefore, it becomes difficult to make a constant voltage of 5 V (when an overvoltage such as a positive surge is applied, the power load of the power supply circuit 13 becomes large,
V to stop the power supply to the _CC line and provide resistance
_At this time, V _CC fluctuates, but if the potential of the reset terminal of the MPU 10 is unstable near the reset detection level, the MPU 10 will run away or the stored contents will be rewritten. Reset circuit 14 resets MPU 10 until V _CC stabilizes. That is, the low voltage detector 14b of the reset circuit 14, V _CC, for example, FIG. 14 by a negative surge or short break (b), when lowered so l to ₁ below the undervoltage detection level (c), the during T ₁ , T ₂ (several mse
c~ to several tens msec) by the reset signal V _RST to the low level, and the overvoltage detection unit 14c exceeds the overvoltage detection level l _2, as shown in FIG. 14 is V _B by the positive surge example (d), while T ₃ Only the reset signal V _{RST is set} to the low level.

V _B at the time of runaway reset the power is turned _on, the rise of the V _CC, the time variation of the V _B, or by the incorporation of exogenous electromagnetic waves or noise, MPU10 is or come off from the original program area, no longer be exited from the part of the program If the reset signal can be detected, the microcomputer is said to have runaway. In order to prevent this, at least one part of the main routine is provided with a process for generating an output pulse, and the runaway detector 14d of the reset circuit 14 detects that the period of the output pulse is longer than a preset period. At this time, the reset signal is set to the low level for a few msec to reset the microcomputer to initialize the program. In this case, if the runaway is not resolved, the runaway detection unit 14d sets the reset signal to the low level again, so that the reset signal V _RST at the time of the runaway has pulse widths T _L , T _H (such as shown in FIG. 14E). (Msec)
Oscillation waveform.

In this way, the MPU10 in the engine control unit ECU is reset in various cases, but the MPU10 is not performing the original control while the reset is being applied, and therefore its output is used for actual control. You cannot do it.

Therefore, as shown in FIG. 1, even when the MPU 10 is out of control, the controlled device can be controlled uniformly.
An output control logic circuit 15 that outputs the output of the backup circuit configured by hardware instead of the output of the MPU 10 to the controlled device during the reset is provided.

[Conventional technology]

FIG. 15 is a block diagram of a conventional output control logic circuit 15, which monitors the level states of reset signals V _RST and V _CC ,
For example, as shown in FIG. 16, the backup period signal V is set such that the level immediately becomes low level when the reset signal becomes low level, and the level becomes high level after the delay time of T _D when the reset signal becomes high level.
A backup period signal generation circuit 20 for generating _BP (T _BP during the low level period), a backup circuit 21 for generating an output in place of the output M of the MPU 10, and an output M of the MPU 10 when the backup period signal V _BP is at the high level. Is output to the drive circuit 16 in FIG. 13, and the gate 22 outputs the output of the backup circuit 21 to the drive circuit 16 when it is at a low level. Here, the time T _{D in} FIG.
The reset signal V _{RST in} FIG. _7E is set to be larger than the time T _H during which the reset signal V _RST is at a high level, and the output of the backup circuit 21 is continuously output to the drive circuit 16 during a runaway.

[Problems to be solved by the invention]

In this way, the conventional output control logic circuit 15 generates one type of period signal V _BP for a fixed time every time the reset signal V _RST becomes low level, and the period signal causes the backup circuit 21 to replace the output of the MPU 10. Supplying the output to the actual control. Therefore, only one type of output can be adopted as the output of the backup circuit 21, and it is usually set for the evacuation traveling control in the worst case of a runaway.

For this reason, there is no problem in backup during a runaway,
The following problems occurred at the time of starting and abnormal power supply.

(At start-up) As shown in FIG. 14 (a), even if the reset signal V _RST from the reset circuit 14 rises to a high level and the MPU 10 starts to operate normally, the delay time T _{D in} FIG. Cannot use the output of MPU10, and the initial control at the start is delayed.

Further, until the reset signal rises, the control is performed by the backup signal set for the evacuation traveling control, so that the startability is deteriorated when the starter is started immediately after the ignition switch is turned on.

(When power supply is abnormal) Even when the power supply is abnormal such as low voltage, momentary interruption, and overvoltage, the backup signal set for the save control is used during the period T _{BP which} is longer than the period when the reset signal V _RST is at the low level. The degree to which the control value immediately before is applied is changed by the backup signal for evacuation control becomes large, and the period during which the driving performance, fuel consumption, and exhaust gas purification performance deteriorate is prolonged. In addition, the longer the backup signal is used, the longer it takes to return to the original control value.

The present invention solves such a conventional problem, and an object thereof is to provide an engine control device capable of performing backup control according to the type of reset of the MPU 10.

[Means for solving problems]

When the power for the engine control microcomputer is turned on, the reset signal applied to the microcomputer is set to a high level after a predetermined time has elapsed since the power was turned on, and when the power supply abnormality is detected, the reset signal is output only while the power supply abnormality appears. In an engine control device having a reset circuit that sets a low level to a low level for a predetermined time when a runaway of the microcomputer is detected, a starting period indicating a period from when the power is turned on to when the reset signal becomes a high level Signal and a runaway period signal indicating a period during which the reset signal is in an oscillating state, a start / runaway period determination circuit, the start period signal based on the start period signal, the runaway period signal and the reset signal And the reset signal is not issued. A power supply abnormal period determination circuit that generates a power supply abnormal period signal indicating a reset period when the power supply is abnormal, and indicates a normal period when neither of the signals is generated based on the reset signal and the runaway period signal A normal period discriminating circuit for generating a normal period signal, based on the starting period signal, the runaway period signal, the power supply abnormal period signal, and the normal period signal, for starting control when the starting period signal is generated. Among the plurality of outputs of the backup circuit, the output is an output for saving control when the runaway period signal is generated, and an output for power supply abnormality when the power supply abnormal period signal is generated. A selection circuit for selecting and outputting the output of the microcomputer to the controlled system while the normal period signal is being generated.

[Action]

To facilitate understanding, the operation of the present invention will be described with reference to FIG. 1 of the drawings related to the embodiment of the present invention.

When the ignition switch is turned on and V _CC is applied to the MPU 10, the start / runaway period determination circuit 30 becomes high level only during the period from when V _CC rises until the reset signal V _RST becomes high level. The period signal V _ST is generated, and the output B ₁ of the backup circuit 33 is taken out as the output P of the output control logic circuit 15 via the AND circuit 34 and the OR circuit 38. Therefore, if the output B ₁ is set for start control, the startability is improved, and if the reset signal V _RST becomes high level, the backup control ends, and the output M of the MPU 10 immediately outputs the output control logic circuit 15. It is taken out as an output and the initial control is promptly performed.

When the MPU 10 starts to run out of control, the reset signal V _RST from the reset circuit 14 is in an oscillating state, and the MPU 10 is repeatedly reset. In such a case, the start-up / runaway period discrimination circuit 30 generates a runaway period signal V _CS which becomes a low level for almost only the runaway period, and outputs the output B ₂ of the backup circuit 33 via the AND circuit 35 and the OR circuit 38. The output P of the circuit 15 is taken out. Therefore, if the output B ₂ is set for the evacuation traveling control, the vehicle can be evacuation traveling to the nearest dealer or service station during a runaway.

Furthermore, when the reset signal V _RST goes low due to a power supply abnormality, the power supply abnormality period determination circuit 31 resets the reset signal V _RST.
The power supply abnormal period signal that becomes high level is generated for a period almost equal to the low level period of _RST , and the backup circuit
Output B _{2 of} 33 is output P via AND circuit 36 and OR circuit 38
Is taken out as. Therefore, if the output B ₃ is, for example, a control stop signal that does not change the immediately preceding control value,
The fact that the backup period substantially coincides with the period when the reset signal V _RST is at a low level can be combined with the deterioration of operating performance, exhaust gas purification performance, and the like to be minimized.

When the runaway period signal V _{CS of the} start / runaway period determination circuit 30 does not indicate a runaway and the reset signal V _RST is not at low level, that is, when the MPU 10 is operating normally, the normal period signal V from the normal period determination circuit 32 _OK becomes high level, MPU1
The output M of 0 is taken out as the output P via the AND circuit 37 and the OR circuit 38.

〔Example〕

FIG. 1 is a block diagram of an essential part of an embodiment of the present invention, in which 14 is a reset circuit, 15 is an output control logic circuit, and P is its output.

The reset circuit 14 is the 14th when the V _CC is applied to the MPU 10.
As shown in Figure (a), a predetermined time _TRST
The reset signal V _RST to a high level after the power supply abnormality detection time is FIG. 14 (b) ~ low between T ₁ through T ₃ only reset signal V _RST power as shown in (d) of the abnormality has appeared When the runaway of the MPU 10 is detected, the reset signal _VRST is oscillated until the runaway is eliminated as shown in FIG. 14 (e).

In the present embodiment, the output control logic circuit 15 includes a start / runaway period determination circuit 30, a power supply abnormal period determination circuit 31, and a normal period determination circuit.
32, a backup circuit 33, and a selection circuit 39.

The start / runaway period discrimination circuit 30 has reset signals V _RST and V
_{When CC} is input, the start / runaway period determination circuit 30 monitors these levels, and the start period control _VST that becomes high level only during the period from power-on until the reset signal becomes high level, and the reset signal oscillates. The runaway period signal V _CS that is low level only during the period indicating the state is output. The start period signal V _ST is applied to the AND circuit 34 of the selection circuit 39 and the power supply abnormal period determination circuit 31, and the runaway period signal V _CS is _supplied to the AND circuit 3.
5, added to the power supply abnormal period discriminating circuit 31 and the normal period discriminating circuit 32.

In the abnormal power supply period determination circuit 31, the runaway period signal V _CS is at a high level indicating no runaway, the start period signal V _ST is at a low level indicating no start period, and the reset signal V
_RST outputs a power failure period signal V _BS to the low level when the high level, the output of which is inputted to the AND circuit 36.

Further, the normal period discriminating circuit 32 sends to the AND circuit 37 the normal period signal V _OK which is at a high level when the runaway period signal V _CS does not indicate a runaway and which is at a high level when the reset signal V _RST is at a high level. input.

The backup circuit 33 has three types of backup signals B ₁ , B.
Outputs _2, B _3, the output B ₁ represents the AND circuit 34, the output B ₂ is to the AND circuit 35, the output B ₃ are applied, respectively Re ₂ to the AND circuit 36. Output B ₁ is suitable for backup at startup, output
Contents of B ₂ are suitable for backup in case of runaway, and contents of output B ₃ are suitable for backup in case of power failure.

The output M of the MPU 10 is input to the AND circuit 37 of the selection circuit 39.

In the selection circuit 37, the outputs of the AND circuits 34 to 37 are OR circuits.
It is sent as an output P to the drive circuit 16 of FIG. 13 through 38.

FIG. 2 is a circuit diagram of an embodiment of the start / runaway period discrimination circuit 30, which includes resistors R _{1 to} R ₆ , R ₁ ′, capacitors C ₁ and C ₂ , diodes D ₁ and D _2, and a comparator. It is composed of COMP ₁ and COMP ₂ . In this circuit, the time constant τ ₁ (R ₁ ′ C ₁ ) of the charging circuit composed of the resistor R ₁ ′ and the capacitor C ₁ connected to the minus terminal side of the comparator COMP ₁ is almost as shown in FIGS. c) T _{1 to} T ₃
The charging / discharging circuit including resistors R ₂ and R ₄ and a capacitor C ₂ which are set to be equal to each other and which are connected to the + terminal side of the comparator COMP ₂ has T ₁ ~ shown in FIGS. 14 (b) to 14 (d). ₃ of the single order of the reset signal V _RST with low level width, + discharging time constant as the potential is not lowered to V _CC / 2 terminal tau _{2 (=}
R ₂ C ₂ ) and a charging time constant τ ₃ (R ₄ C ₂ ) larger than that. An example of the magnitude relation of the values of the respective elements is as follows.

_{R 5 «2R 3 = R 2 «R} 1, R 1 '<R 4 C 1 <C 2 T 1, T 2, T 3 ≒ τ 1 <τ 2 <τ 3 and the third figure power failure period determination circuit FIG. 31 is a circuit diagram of the 31st embodiment, which uses an AND circuit 50 that performs a logical product of the runaway period signal V _CS , the inversion signal of the instruction period signal V _ST , and the inversion signal of the reset signal V _RST .

FIG. 4 is a circuit diagram of an embodiment of the upper period discriminating circuit 32, which uses an AND circuit 51 which takes the logical product of the runaway period signal V _CS and the reset signal V _RST .

FIG. 5 shows another embodiment of the portion surrounded by the symbol LOG in FIG. 1, in which some gates of the selection circuit 39, the power supply abnormal period discrimination circuit of FIG. 2 and the normal period discrimination circuit of FIG. A common modification is shown. That is, the AND circuit 36 and the AND circuit 50 are realized by one AND circuit 52, and the AND circuit 37 and the AND circuit 51 are realized by one AND circuit 53. Hereinafter, the circuit shown in FIG. 5 will be referred to as a logic circuit.

FIG. 6 is a timing chart for explaining the operation of the embodiment shown in FIGS. 1 to 4, and its operation will be described below with reference to each drawing.

When the ignition switch is turned on, V _CC rises from 0 V to, for example, 5 V, and in the starting / runaway period discriminating circuit 30 shown in FIG. 2, since the initial reset signal V _RST is low level, the comparator COMP ₁ , comparator The voltage at the + terminal of COMP ₂ is-
The voltage becomes higher than the voltage of the terminal, and the start period signal V _ST and the runaway period signal V _CS both immediately become high level. Therefore, only the AND circuit 34 of FIG. 1 is opened, and the output B ₁ of the backup circuit 33 is taken out as the output P.

When a predetermined time T _{RST has} passed since the ignition switch was turned on, the reset signal V _RST from the reset circuit 14 changes to a high level. Thus the voltage of the second view of the start-runaway period judgment circuit 30 of the comparator COMP ₁ in + terminal - smaller than the voltage of the terminal, the start period signal V _ST is at a low level until the subsequent ignition switch is turned off.
As a result, the AND circuit 34 is closed, and instead, the normal period signal V _OK of the normal period determination circuit 32 becomes high level, and the AND circuit 37 is opened. Therefore, the output M of the MPU 10 appears at the output P through the AND circuit 37.

When V _CC drops below a certain value when the starter is activated, the reset signal from the reset circuit 14 temporarily becomes low level. However, at the low level during this period, the comparator CO in the start / runaway period discrimination circuit 30 of FIG.
The output of MP ₂ (runaway period signal) is not inverted and remains high. Therefore, the normal period signal V _OK becomes low level, the AND circuit 37 is closed, the power abnormal period signal V _{BS of the} power abnormal period discriminating circuit 31 becomes high level, and the output B ₁ of the backup circuit 33 is taken out as the output P. .

After the complete explosion of the engine, when the MPU 10 starts to run out of control, the reset signal from the reset circuit 14 becomes an oscillating state. In such an oscillation state, the start / runaway period determination circuit of FIG.
The + terminal voltage of the comparator COMP ₂ in 30 gradually decreases with a time constant τ ₂ and eventually becomes smaller than the − terminal, and the runaway period signal V _CS becomes low-level. When the signal V _CS becomes low level, the AND circuit 35 is opened, so the backup circuit
The output B _{2 of} 33 is taken out as the output P. In addition, MPU10
It takes some time to switch from the output of B to the output of B ₂ , and during that period, the power supply abnormal period signal V _BS becomes high level and the output of B ₃ is output.
Appears in the output P, but no problem occurs when the runaway is started and the output B ₃ is set for the evacuation control as in the embodiment described later.

When the runaway of the MPU10 is resolved, the oscillation of the reset signal V _RST is stopped, the potential of the + terminal of the comparator COMP ₂ rises at the time constant of τ ₃ , and eventually becomes larger than the potential of the-terminal, so the runaway period signal V _CS goes high. As a result, the AND circuit 35 is closed, the normal period signal _OK becomes high level, the AND circuit 37 is opened, and the output M of the MPU 10 is taken out.

When V _CC falls below a predetermined level for some reason after the runaway is eliminated, the reset signal V _RST from the reset circuit 14 goes low for a predetermined time. But,
At this time as well, the output of the comparator COMP ₂ (runaway period signal) in the start / runaway period discrimination circuit 30 of FIG. ₂ is not inverted and maintains a high level, and therefore the normal period signal V _OK becomes a low level and the AND circuit. When 37 is closed and the abnormal power supply period signal V _{BS of the} abnormal power supply period determination circuit 31 becomes high level, the output B ₃ of the backup circuit 33 is taken out as the output P, and the reset signal V _RST returns to high level,
Immediately, the output M of the MPU 10 is taken out as the output P.

FIG. 7 is a block diagram of an embodiment in which the present invention is applied to fuel injection and ignition timing control. The same symbols as in FIG. 1 indicate the same parts, and LOG1 and LOG2 are the logic circuits shown in FIG. Is a drive circuit for the injector 62, 61 is a drive circuit for the igniter 63, 64 is a crank angle sensor, 65 is a presettable counter, 66 and 67 are one-shot multivibrator (hereinafter OMB
68) and 69 are inverters. FIG. 8 is a timing chart for explaining the operation of FIG. 7 and shows the case of a 4-cylinder engine.

In FIG. 7, the MPU 10 determines the crank rotation angle from the pulse PEF output from the crank angle sensor 64 at every 180 degrees of the crank angle and the pulse POS output at every 1 degree, and
Signal INJA for controlling fuel injection timing as shown in the figure
And a signal IGNA that controls the ignition timing and a logic circuit LOG
Input as MPU output M to 1, LOG2.

In the backup circuit 33, there is provided a presettable counter 65 which is set at the rising edge of the pulse REF and is counted up by the pulse POS, and the signal IGNC for controlling the ignition timing at the time of starting is output from the logic circuit LO as the output B _1.
Input to G2. Further, the pulse REF is input to the logic circuit LOG2 as a signal IGNB for controlling the ignition timing of the escape control. This signal IGNB is output from the logic circuit LOG1 B ₂ , B
Corresponds to ₃ .

Further, an OMB66 which is triggered by the falling edge of the pulse REF and an OMB67 which is triggered by the falling edge of the output Q of the presettable counter 65 are provided, and the signal INJB for controlling the fuel injection timing for the escape traveling is generated from the OMB66. , OMB67 generates a signal INJC for controlling the fuel injection timing at the time of starting. The signal INJB corresponds to the outputs B ₂ and B ₃ , and the signal INJC corresponds to the output B ₁ .

Since the logic circuits LOG1 and LOG2 perform backup control by the logic described in FIG. 5, the injector 62 is controlled by the signal INJC and the igniter 63 is controlled by the signal IGNC during the starting period. In addition, during the MPU10 runaway or resetting at power failure, the injector 62
Controlled by JB, igniter 63 is controlled by signal IGNB.

For example, if the engine speed during cranking (starter ON) is 200 rpm, the 180-degree pulse R of the crank angle sensor 64
EF is generated every 150 ms, but the first control timing ST ₁ may not be detected depending on the timing of starter ON, the value of T _RST , or the initial position of the crank angle sensor. Therefore, depending on the output of MPU10 at the start. It may be difficult to control the fuel injection timing or the ignition timing. Conventionally, as shown in the lower part of FIG. 8, a backup period signal V _BP is generated, and during that period, fuel injection and ignition timing are controlled at the timing for escape control.
According to the present embodiment, during that time, the fuel injection and ignition timing can be controlled at the start timing, and the startability is improved.

FIG. 9 is a block diagram of an embodiment in which the present invention is applied to a stepper motor control for adjusting the throttle of the bleed air passage, a DC motor control for adjusting the throttle opening, and a warning display lamp control. Is a DC motor, 72 is a warning lamp, LOG3 to LOG7 are logic circuits shown in FIG. 5, 73 is an oscillator that generates a pulse having the highest driving frequency of the stepper motor 70,
74 and 75 are exclusive OR circuits, 76 and 77 are D-type flip-flops, and 78 is a DC motor drive IC. The control logic of this DC motor drive IC is as shown in FIG. A control chart of the stepper motor 70 is shown in FIG.

The drive pulse of the stepper motor 70 is input from the MPU 10 to the logic circuit LOG3 as the MPU output M, the signal designating the rotation direction of the stepper motor 70 is input to the logic circuit LOG4 as the MPU output M, and the normal rotation of the DC motor 71, Signal to control reverse rotation
DI ₁ and DI ₂ are input as MPU output M to the logic circuits LOG5 and LOG6, respectively. Further, the lighting control signal of the warning lamp 72 is input to the logic circuit LOG7 as the MPU output M.

On the other hand, the output of the oscillator 73 to the B ₂ logic circuit LOG3 is, B _1, B ₃
Logic "0" is input to the logic "0" is input in common to the B ₁ .about.B ₃ logic circuit log4, a logic "0" to B ₂ logic circuit LOG5, B _1, B ₃ Logic "1" is input to the logic circuit LOG6
The of B ₁ .about.B ₃ logical "1" is input to the common logic circuit LOG7
A logic "1" is input to B ₁ and B ₂ , and a logic "0" is input to B ₃ .

Therefore, at start-up and at power failure, logic "0" is output from the logic circuits LOG3 and LOG4, the stepper motor 70 is stopped and controlled, and during runaway, logic "0" is output from the logic circuit LOG4 and from the logic circuit LOG3. Since the output of the oscillator 73 is transmitted, the stepper motor 70 fully closes the bleed air passage. Therefore, the evacuation run at the time of runaway is performed with a high air-fuel ratio.

Further, at the time of start-up and at power failure, the logic circuits LOG5 and LOG6 output logic "1", the DC motor 71 is stopped, and during runaway, the logic circuit LOG5 outputs logic "0" and the logic circuit LOG6
Since the logic "1" is output from the DC motor 71, the DC motor 71 fully closes the throttle valve.

In addition, the logic circuit LOG7 outputs logic "1" at startup and runaway, and the warning lamp lights up. When the power is abnormal, logic "0" is output.
Is output and the warning lamp 72 is not turned on.

FIG. 12 shows the effect of the embodiment of FIGS. 7 and 9 in comparison with the conventional method.

As shown in the same figure, regarding the electronic fuel injection control and the electronic ignition advance control, the backup for the evacuation control is conventionally performed at the time of starting, when the power source is abnormal, and when the vehicle is running out of control.
According to the embodiment shown in FIG. 7, a backup suitable for starting can be performed at the time of starting, and the starting performance is improved.

Regarding the fuel correction control, conventionally, the control for stopping the stepper motor 70 was performed at the time of starting, when the power supply is abnormal, and at the time of runaway, but according to the embodiment of FIG. 9, it is fully closed control only at the time of runaway. Therefore, the evacuation traveling can be performed in a state where the air-fuel ratio is high.

Further, in the throttle opening control, conventionally, the DC motor was stopped only at the time of starting, and the DC motor was backed up so that the throttle valve was fully closed at the time of power failure and runaway. According to the example, at start-up and at power failure DC
It is possible to stop the motor and control the DC motor so that the throttle valve is fully closed only during a runaway, and it is possible to prevent an unnecessary change in the opening degree of the throttle valve when the power supply is abnormal.

In addition, regarding the lighting control of the warning lamp, what was conventionally turned on at the time of starting, power supply abnormality, runaway,
It is possible to transfer it only at the time of start-up and runaway and not to light it at the moment of a power supply abnormal reset.

〔The invention's effect〕

As described above, according to the present invention, at the time of starting, when the power source is abnormal, M
The cause is determined from the state of the reset signal during PU runaway, and multiple period signals such as a start period signal, a runaway period signal, a power supply abnormal period signal, and a normal period signal are generated. It becomes possible to select according to each state, and it becomes possible to back up according to starting, power supply abnormality, and runaway, and it is possible to improve startability, drivability, and exhaust gas purification.

Also, since the start period signal is almost the same as the period from when power is supplied to the MPU until the reset signal becomes high level, immediately after the reset signal becomes high level, the MPU
The output can be used for actual control, and the starting point of initial control can be made earlier than before. Further, since the power supply abnormal period signal indicates a period substantially equal to the reset period at the time of power supply abnormality such as low voltage and instantaneous interruption, the backup control is performed only during the reset period, and the confusion of the control system can be minimized.

[Brief description of drawings]

FIG. 1 is a block diagram of essential parts of an embodiment of the present invention, FIG. 2 is a circuit diagram of an embodiment of a start / runaway period discrimination circuit 30, and FIG. 3 is a circuit diagram of an embodiment of a power supply abnormal period discrimination circuit 31. 4 is a circuit diagram of an embodiment of the normal period discriminating circuit 32, FIG. 5 is a circuit diagram showing a modification of the output control logic circuit, FIG. 6 is a timing chart for explaining the operation of FIGS. 1 to 4, FIG. 7 is a block diagram of an application example to fuel injection and ignition timing control, FIG. 8 is a timing chart for explaining the operation of FIG. 7, FIG. 9 is a block diagram of an application example to stepper motor control, etc. Fig. 11 is a control logic diagram of the DC motor drive IC 78, Fig. 11 is a control chart of the stepper motor 70, Fig. 12 is an explanatory diagram of the effect of the present invention, Fig. 13 is a schematic configuration diagram of an engine control device, and Fig. 14 is 15 is an operation explanatory diagram of the reset circuit 14, FIG. 15 is a block diagram of a conventional output control circuit, and FIG. Is an operation explanatory diagram of a conventional backup period signal generating circuit 20. 10 is a control microcomputer (MPU), 14 is a reset circuit, 15 is an output control logic circuit, 30 is a start / runaway period determination circuit, 31 is a power supply abnormal period determination circuit, 32 is a normal period determination circuit, 33 is a backup A circuit, 39 is a selection circuit.

Claims (1)

[Claims] 1. When a power supply to a microcomputer for engine control is turned on, a reset signal applied to the microcomputer is set to a high level after a predetermined time has passed since the power was turned on, and when a power supply abnormality is detected, a power supply abnormality appears. In the engine control device having a reset circuit that sets the reset signal to the low level only, and sets the reset signal to the low level for a predetermined time when the microcomputer detects a runaway, in a period from when the power is turned on to when the reset signal becomes the high level. A start / runaway period determination circuit that generates a start period signal indicating a period and a runaway period signal indicating the period in which the reset signal is in an oscillating state, based on the start period signal, the runaway period signal and the reset signal , The start period signal and the runaway period signal are not generated, and the reset A power supply abnormality period determination circuit that generates a power supply abnormality period signal indicating a reset period when a power supply abnormality occurs, when neither of the signals is generated based on the reset signal and the runaway period signal A normal period determination circuit that generates a normal period signal indicating a normal period, a start period signal when the start period signal is generated based on the start period signal, the runaway period signal, the power supply abnormal period signal, and the normal period signal. Output for time control, output for save control when the runaway period signal is generated, output for power supply abnormality when the power supply abnormality period signal is generated, respectively. A selection circuit that selects from among the outputs, selects the output of the microcomputer while the normal period signal is being generated, and outputs the selected output to the controlled system. Engine control device.