JPS6221462B2 - - Google Patents

Info

Publication number
JPS6221462B2
JPS6221462B2 JP55051638A JP5163880A JPS6221462B2 JP S6221462 B2 JPS6221462 B2 JP S6221462B2 JP 55051638 A JP55051638 A JP 55051638A JP 5163880 A JP5163880 A JP 5163880A JP S6221462 B2 JPS6221462 B2 JP S6221462B2
Authority
JP
Japan
Prior art keywords
data
line
storage device
received
input data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP55051638A
Other languages
Japanese (ja)
Other versions
JPS56149135A (en
Inventor
Hitoshi Furuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP5163880A priority Critical patent/JPS56149135A/en
Publication of JPS56149135A publication Critical patent/JPS56149135A/en
Publication of JPS6221462B2 publication Critical patent/JPS6221462B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/22Arrangements for detecting or preventing errors in the information received using redundant apparatus to increase reliability

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
  • Hardware Redundancy (AREA)

Description

【発明の詳細な説明】 本発明は2重化データ受信方式に係り、特に、
2重化された端末装置から各通信回線を介して親
局にほぼ同時に同一データを送信する子局からの
データをそれぞれ通信制御装置を介して受信し各
別に処理する計算機とデータ格納用の共通の外部
記憶装置とを親局に備えて2重化入力データから
受信データを採用する2重化データ受信方式に関
するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a duplex data reception system, and in particular,
The same data is sent almost simultaneously from the duplicated terminal device to the master station via each communication line. Data from the slave stations is received via the communication control device and processed separately. A common computer and data storage. The present invention relates to a duplex data reception system in which a master station is equipped with an external storage device and receives data from duplex input data.

従来技術を第1図によつて説明する。第1図に
おいて、1は親局、2は端末装置−A及び端末装
置−Bを備えている子局、3は通信回線−A、4
は通信回線−B、6は計算機−A、7は計算機−
B、8は通信制御装置−A、9は通信制御装置−
B、5は共通の外部記憶装置である。5,6,
7,8,9は親局1を構成している。データは2
つの系統を介して子局から親局へほぼ同時に送信
される。通常は、通信回線−Aと通信回線−Bの
2つのうちのいずれか一方をマスタ回線、他方を
スレーブ回線に分け、マスタ回線の入力データを
受信データと見なし、スレーブ回線のデータはか
ら読みを行ない、万一、マスタ回線に障害が発生
した場合は、スレーブ回線が自動的にマスタ回線
となり処理の肩代りをするという方式となつてい
る。
The prior art will be explained with reference to FIG. In FIG. 1, 1 is a master station, 2 is a slave station equipped with a terminal device-A and a terminal device-B, 3 is a communication line-A, and 4 is a slave station.
is communication line-B, 6 is computer-A, 7 is computer-
B, 8 is a communication control device-A, 9 is a communication control device-
B and 5 are common external storage devices. 5, 6,
7, 8, and 9 constitute the master station 1. The data is 2
The signals are transmitted almost simultaneously from the slave station to the master station via two channels. Normally, one of the communication lines A and B is divided into a master line and the other is a slave line, and the input data of the master line is regarded as received data, and the data of the slave line is read from In the event that a failure occurs in the master line, the slave line automatically becomes the master line and takes over the processing.

しかしながら、上記した従来方式には下記のよ
うな2つの問題点を有している。第1の問題点
は、第1図で例えば通信回線−Bをマスタ回線、
通信回線−Aをスレーブ回線とし、各計算機A,
Bの受信処理プログラムにてマスタ回線、スレー
ブ回線別の受信処理を行なう場合において、第2
図に示すように、子局から送られてきた、、
の3つのデータブロツクからなるメツセージデ
ータ(M)を受信する際、データブロツクのデ
ータを受信後、回線B状態波形(B)に示すよう
にTa時点に通信回線−Bにキヤリア断等の障害
が発生すると、計算機−A受信処理プログラムに
て自動的に切替えが行なわれ、回線−Aがマスタ
となつて処理の肩代りをすることになるが、ここ
で、この回線切替えにt時間(一般に数ミリ秒)
を要するので、回線A状態波形(A)に示すよう
に、切替えが終つてマスタ回線でのデータ受信が
可能となるのはTb時点からであり、このTa,T
b間にデータブロツクのデータが通過すると、
このデータは完全に欠損となつてしまい、次のデ
ータブロツクのデータを正常に受信したとして
も、このメツセージデータは意味をなさなくな
り、これ以降の業務処理に重大な影響を及ぼすと
いう問題点である。
However, the conventional method described above has the following two problems. The first problem is that in Fig. 1, for example, communication line B is the master line.
Communication line-A is the slave line, and each computer A,
When performing reception processing separately for the master line and slave line in the reception processing program of B, the second
As shown in the figure, the message sent from the slave station...
When receiving the message data (M) consisting of three data blocks, after receiving the data block data, a failure such as a carrier disconnection occurs on the communication line-B at time T a as shown in the line B status waveform (B). When this occurs, the computer-A reception processing program automatically switches, and line-A becomes the master and takes over the processing, but here, it takes t time (generally few milliseconds)
Therefore, as shown in the line A status waveform (A), it is from time T b that the switching is completed and data reception on the master line becomes possible, and these T a , T
When the data block data passes between b ,
This data becomes completely missing, and even if the data of the next data block is successfully received, this message data becomes meaningless and has a serious impact on subsequent business processing. .

第2の問題点は、第3図に示すように、マスタ
回線である回線−Bに伝送遅れが生じた場合に、
従来方式では、回線−Bより早く正常に、それぞ
れt1,t2,t3の時点に入力されたスレーブ回線−
Aのデータはから読みにより捨てられてしまい、
回線−Aよりかなり遅れて到着した回線−Bのデ
ータを採用してしまうという点である。これは、
緊急を要するプラント事故情報等の受信処理にと
つて非常に不都合であり、その遅れの度合いによ
つてはメツセージデータの情報が半減するという
問題も生じる。
The second problem is, as shown in Figure 3, when a transmission delay occurs on line-B, which is the master line,
In the conventional method, the slave line - which was input normally earlier than line B at times t 1 , t 2 and t 3 respectively.
A's data is discarded due to reading,
The problem is that data from line-B that arrives much later than line-A is used. this is,
This is very inconvenient for receiving and processing urgent plant accident information, etc., and depending on the degree of delay, there is also the problem that the information in the message data may be halved.

本発明の目的は、上記した従来技術でのマスタ
回線障害時のデータ欠損及び回線の伝送遅れによ
る後着データ受信処理の問題を解決し、高効率、
高信頼性の2重化データ受信方式を提供するにあ
る。
An object of the present invention is to solve the problems of data loss in the prior art described above and late arrival data reception processing due to line transmission delays, and to achieve high efficiency and
The object of the present invention is to provide a highly reliable duplex data reception system.

本発明の特徴は、上記目的を達成するために、
通信回線からの入力データを計算機内のバツフア
メモリに格納し格納した今回入力データの先頭に
付いている一貫番号と外部記憶装置内の前回分受
信データの一貫番号とを比較し番号に差があれば
自系回路の入力データを先着と見なして外部記憶
装置の受信データエリアに格納し番号に差がなけ
れば後着と見なして外部記憶装置の受信データエ
リアを他系に解放する参照動作を、入力データを
先に受信した計算機側が先に実行することで、先
着の回線のデータを受信データとして採用する方
式とするにある。
In order to achieve the above object, the features of the present invention are as follows:
The input data from the communication line is stored in the buffer memory in the computer, and the consistency number attached to the beginning of the stored current input data is compared with the consistency number of the previous received data in the external storage device, and if there is a difference in the numbers. Inputs a reference operation that treats the input data of the own system circuit as the first arrival and stores it in the reception data area of the external storage device, and if there is no difference in numbers, treats it as the last arrival and releases the reception data area of the external storage device to other systems. The computer that received the data first executes the process first, so that the data on the first arriving line is adopted as the received data.

以下第4図〜第6図により本発明の一実施例を
説明する。第4図は本発明によるデータ受信方式
の説明図、第5図は計算機における受信処理のフ
ローチヤート、第6図はデータ受信のタイムチヤ
ートを示す。第4図及び第5図において、各回線
から入力されたデータは、それぞれの計算機内に
あるバツフアー1、バツフアー2にセツトされ、
共通の外部記憶装置5上の前回分受信データと比
較される。第5図のCPUは計算機−Aあるいは
計算機−Bを、GMは共通の外部記憶装置を意味
する。ここで、比較の対象となる情報は、各デー
タの先頭に付いている一貫番号(以下通番と略
す)であり、「今回入力データ通番」と「前回分
受信データ通番」との差が“1”であれば、自系
回線の入力データは先着であるとみなし、外部記
憶装置5上の受信データエリアにセツトする。な
お、各計算機6,7は外部記憶装置5上の受信デ
ータを参照する段階で、他系との競合防止のた
め、リザーブ(RESERVE)マクロを発行し、参
照が終了した段階で受信データエリアを他系に解
放するフリー(FREE)マクロを発行するものと
する。
An embodiment of the present invention will be described below with reference to FIGS. 4 to 6. FIG. 4 is an explanatory diagram of the data reception method according to the present invention, FIG. 5 is a flowchart of reception processing in a computer, and FIG. 6 is a time chart of data reception. In FIGS. 4 and 5, data input from each line is set in buffer 1 and buffer 2 in each computer,
It is compared with the previous received data on the common external storage device 5. CPU in FIG. 5 means computer-A or computer-B, and GM means a common external storage device. Here, the information to be compared is the consistent number attached to the beginning of each data (hereinafter referred to as the serial number), and the difference between the "current input data serial number" and the "previously received data serial number" is "1". ”, it is assumed that the input data of the own line is first-arrived, and is set in the received data area on the external storage device 5. In addition, each computer 6, 7 issues a reserve (RESERVE) macro when referencing the received data on the external storage device 5 in order to prevent conflicts with other systems, and when the reference is completed, the received data area is saved. A free (FREE) macro to be released to other systems shall be issued.

この方式によれば、従来技術での回線切替え時
の受信データの欠損を未然に防止することができ
る。さらに本実施例によれば、第6図のように、
A回線からデータAが、B回線からデータBが図
示タイミングで入力される場合、受信データとし
てはタイムチヤートCに示すように、A回線の
→A回線の→B回線の→A回線のを先着デ
ータとして採るため、回線の伝送遅れにも対処で
き、また第6図中のA回線の入力データが欠け
た場合にも、B回線のデータを採用することに
より、データは欠損されることなく、受信データ
の連続性を保つことができる。
According to this method, it is possible to prevent loss of received data when switching lines in the prior art. Furthermore, according to this embodiment, as shown in FIG.
When data A is input from line A and data B is input from line B at the timing shown in the diagram, the received data is first received from line A → line A → line B → line A as shown in time chart C. Since it is taken as data, it is possible to cope with line transmission delays, and even if the input data of line A in Fig. 6 is missing, by adopting the data of line B, the data will not be lost. Continuity of received data can be maintained.

以上のように、本発明によれば、従来技術で問
題となつた回線障害時の処理及び伝送遅れに対す
る処理が可能となり、伝送データシステム全体の
信頼性を向上させることができる。
As described above, according to the present invention, it is possible to handle line failures and transmission delays, which were problems in the prior art, and improve the reliability of the entire transmission data system.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来技術説明図、第2図及び第3図は
従来技術での問題点を説明する図、第4図は本発
明によるデータ受信方式の説明図、第5図は本発
明による計算機受信処理のフローチヤート、第6
図は本発明におけるデータ受信のタイムチヤート
である。 1……親局、2……子局、3,4……通信回
線、5……共通の外部記憶装置、6,7……計算
機、8,9……通信制御装置、CPU……計算
機、GM……共通の外部記憶装置。
FIG. 1 is an explanatory diagram of the prior art, FIGS. 2 and 3 are diagrams that explain problems in the prior art, FIG. 4 is an explanatory diagram of the data receiving system according to the present invention, and FIG. 5 is a diagram explaining the computer according to the present invention. Reception processing flowchart, No. 6
The figure is a time chart of data reception in the present invention. 1... Master station, 2... Slave station, 3, 4... Communication line, 5... Common external storage device, 6, 7... Computer, 8, 9... Communication control device, CPU... Computer, GM...Common external storage device.

Claims (1)

【特許請求の範囲】[Claims] 1 2重化された端末装置から各通信回線を介し
て親局にほぼ同時に同一データを送信する子局か
らのデータをそれぞれ通信制御装置を介して受信
し各別に処理する計算機とデータ格納用の共通の
外部記憶装置とを親局に備えて2重化データを受
信するものにおいて、通信回線からの入力データ
を計算機内バツフアメモリに格納し格納した今回
入力データの先頭に付いている一貫番号と外部記
憶装置内の前回分受信データの一貫番号とを比較
し番号に差があれば自系回路の入力データを先着
と見なして外部記憶装置の受信データエリアに格
納し番号に差がなければ後着と見なして外部記憶
装置の受信データエリアを他系に解放する参照動
作を、入力データを先に受信した計算機側が先に
実行することにより、先着の回線のデータを受信
データとして採用することを特徴とする2重化デ
ータ受信方式。
1. Computers and data storage computers that transmit the same data almost simultaneously from the duplicated terminal devices to the master station via each communication line, receive data from the slave stations via the communication control device, and process each separately. In a device that receives duplex data by equipping the master station with a common external storage device, the input data from the communication line is stored in the internal buffer memory of the computer, and the consistency number attached to the beginning of the stored current input data and the external Compare the consistent number of the previous received data in the storage device, and if there is a difference in the numbers, the input data of the own system circuit will be regarded as the first arrival and will be stored in the received data area of the external storage device, and if there is no difference in the numbers, it will be the next arrival. The computer side that received the input data first executes the reference operation of releasing the received data area of the external storage device to other systems, assuming that the input data is the same, thereby adopting the data of the first arriving line as the received data. Duplex data reception method.
JP5163880A 1980-04-21 1980-04-21 Duplex data reception system Granted JPS56149135A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5163880A JPS56149135A (en) 1980-04-21 1980-04-21 Duplex data reception system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5163880A JPS56149135A (en) 1980-04-21 1980-04-21 Duplex data reception system

Publications (2)

Publication Number Publication Date
JPS56149135A JPS56149135A (en) 1981-11-18
JPS6221462B2 true JPS6221462B2 (en) 1987-05-13

Family

ID=12892381

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5163880A Granted JPS56149135A (en) 1980-04-21 1980-04-21 Duplex data reception system

Country Status (1)

Country Link
JP (1) JPS56149135A (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61224640A (en) * 1985-03-29 1986-10-06 Hitachi Ltd Data block transfer system
JPH01120932A (en) * 1987-11-04 1989-05-12 Nec Corp Switching system of remote terminal control system
JPH01175036U (en) * 1988-05-30 1989-12-13
JPH02262736A (en) * 1989-04-03 1990-10-25 Takaoka Electric Mfg Co Ltd Communication system by duplex data communication media
JP3880482B2 (en) 2002-08-14 2007-02-14 エヌイーシーコンピュータテクノ株式会社 Duplex network computer system and computer system network duplication method
JP4655733B2 (en) * 2005-04-13 2011-03-23 富士電機システムズ株式会社 Receiving method and apparatus in ring-type duplex network

Also Published As

Publication number Publication date
JPS56149135A (en) 1981-11-18

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