JPS6221019Y2 - - Google Patents

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Publication number
JPS6221019Y2
JPS6221019Y2 JP19427482U JP19427482U JPS6221019Y2 JP S6221019 Y2 JPS6221019 Y2 JP S6221019Y2 JP 19427482 U JP19427482 U JP 19427482U JP 19427482 U JP19427482 U JP 19427482U JP S6221019 Y2 JPS6221019 Y2 JP S6221019Y2
Authority
JP
Japan
Prior art keywords
charge transfer
transfer
register
vertical register
photoelectric conversion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP19427482U
Other languages
Japanese (ja)
Other versions
JPS5996855U (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP19427482U priority Critical patent/JPS5996855U/en
Publication of JPS5996855U publication Critical patent/JPS5996855U/en
Application granted granted Critical
Publication of JPS6221019Y2 publication Critical patent/JPS6221019Y2/ja
Granted legal-status Critical Current

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  • Solid State Image Pick-Up Elements (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)

Description

【考案の詳細な説明】 (a) 考案の技術分野 本考案は電荷転送素子(Charge Coupled
Device)を用いた固体撮像装置に係り、特にイ
ンターライン転送方式による固体撮像装置の改良
に関するものである。
[Detailed explanation of the invention] (a) Technical field of the invention This invention is a charge transfer device (Charge Coupled Device).
The present invention relates to a solid-state imaging device using an interline transfer method, and particularly relates to an improvement of a solid-state imaging device using an interline transfer method.

(b) 技術の背景 固体撮像装置は、半導体を用いていることから
小型軽量、低消費電力、量産効果による低価格化
の可能性を有し、各画素が幾何学的に配置され、
画像信号が時間的に一定の間隔で読み出されるの
で、光電変換過程において図形ひずみに関する不
正確さがなく、また低残像、高S/Nなどの特長
をもつたデバイスであり、撮像管にとつてかわり
実用化されつつある。このような固定撮像装置の
一種として電荷転送素子を用いたインターライン
転送方式による固体撮像装置が周知である。
(b) Background of the technology Since solid-state imaging devices use semiconductors, they are small and lightweight, have low power consumption, and have the potential for lower prices due to mass production effects.
Since image signals are read out at regular time intervals, there is no inaccuracy related to figure distortion in the photoelectric conversion process, and the device has features such as low afterimages and high S/N, making it ideal for image pickup tubes. Instead, it is being put into practical use. A solid-state imaging device using an interline transfer method using a charge transfer element is well known as a type of such a fixed imaging device.

(c) 従来技術と問題点 通常、インターライン転送方式による固体撮像
装置は、第1図に示すように同一半導体基板1上
にマトリツクス状に配列された複数の光電変換素
子、即ち、それぞれが一画素として構成される複
数の受光部2と、その受光部2の各列に平行隣接
してそれぞれトランスフアゲート電極3を介して
複数の電荷転送電極を縦列配置してなる電荷転送
垂直レジスタ4と、その各垂直レジスタ4の一端
と連結された電荷転送水平レジスタ5とから構成
されている。そして動作としては、前記各受光部
2において入射光量に応じて蓄積された信号電荷
を、例えばトランスフアゲート3を介してそれぞ
れ対応する前記垂直レジスタ4へ転送する。該垂
直レジスタ4へ信号電荷を転送した後のトランス
フアゲート3は閉ざされて前記各受光部2には次
の信号電荷が蓄積される。一方前記各垂直レジス
タ4に転送された信号電荷は、順次並列に垂直方
向に転送され前記水平レジスタ5に転送する。該
水平レジスタ5では各垂直レジスタ4の一水平ラ
イン毎に順次水平方向に信号電荷を転送しその出
力端6より撮像出力として取り出される。第1図
中において矢印は信号電荷の転送方向を示す。
(c) Prior Art and Problems Normally, a solid-state imaging device using an interline transfer method has a plurality of photoelectric conversion elements arranged in a matrix on the same semiconductor substrate 1 as shown in FIG. A charge transfer vertical register 4 including a plurality of light receiving sections 2 configured as pixels, and a plurality of charge transfer electrodes arranged in a column parallel to and adjacent to each column of the light receiving sections 2 via transfer gate electrodes 3, respectively; It consists of a charge transfer horizontal register 5 connected to one end of each vertical register 4. In operation, the signal charges accumulated in each of the light receiving sections 2 according to the amount of incident light are transferred to the corresponding vertical registers 4 via, for example, the transfer gate 3. After the signal charge is transferred to the vertical register 4, the transfer gate 3 is closed and the next signal charge is accumulated in each of the light receiving sections 2. On the other hand, the signal charges transferred to each of the vertical registers 4 are sequentially transferred in parallel in the vertical direction and transferred to the horizontal register 5. In the horizontal register 5, signal charges are sequentially transferred in the horizontal direction for each horizontal line of each vertical register 4, and are taken out from the output terminal 6 as an imaging output. In FIG. 1, arrows indicate the direction of signal charge transfer.

ところでこのような構成の従来の固体撮像装置
においては、第2図に示すように、各受光部2に
蓄積された信号電荷を転送する垂直レジスタ4が
一受光部2に対して例えば4相駆動の電荷転送電
極21の1ビツト4電極分が対応するように構成
されている。よつて前記電荷転送電極21の電荷
転送方向への電極長Lが長くなり、高速転送駆動
時において転送効率の劣化をもたらし解像度が低
下するという欠点があつた。
By the way, in a conventional solid-state imaging device having such a configuration, as shown in FIG. The structure is such that one bit of the charge transfer electrodes 21 corresponds to four electrodes. Therefore, the electrode length L of the charge transfer electrode 21 in the charge transfer direction becomes long, resulting in a disadvantage that the transfer efficiency deteriorates during high-speed transfer driving and the resolution decreases.

(d) 考案の目的 本考案は、上記従来の欠点を解消するため、各
受光部に蓄積された信号電荷を転送する垂直レジ
スタとして用いる電荷転送素子の転送電極の電極
長Lを短くして信号電荷の転送効率の劣化を防止
すると共に解像度の向上を図つた新規な固体撮像
装置を提供することを目的とするものである。
(d) Purpose of the invention In order to eliminate the above-mentioned conventional drawbacks, the present invention shortens the electrode length L of the transfer electrode of the charge transfer element used as a vertical register to transfer the signal charge accumulated in each light receiving part. It is an object of the present invention to provide a novel solid-state imaging device that prevents deterioration of charge transfer efficiency and improves resolution.

(e) 考案の構成 そしてこの目的は本考案によれば、半導体基板
上にマトリツクス状に配列された複数の光電変換
素子をそなえ、該光電変換素子の各列に平行隣接
してトランスフアゲート電極を介して複数の電荷
転送電極を縦列配置した電荷転送垂直レジスタ
と、該垂直レジスタによつて垂直方向に転送され
た各素子からの信号電荷を、その垂直レジスタの
一水平ライン毎に、順次水平方向に転送読出しを
行う電荷転送水平レジスタとから構成された装置
において、前記各単位光電変換素子に対応する電
荷転送垂直レジスタの電荷転送電極を、なくとも
2ビツト分、対向配置してなることを特徴とする
固体撮像装置を提供することによつて達成され
る。
(e) Structure of the invention According to the invention, the object is to provide a plurality of photoelectric conversion elements arranged in a matrix on a semiconductor substrate, and to provide transfer gate electrodes in parallel and adjacent to each row of the photoelectric conversion elements. A charge transfer vertical register in which a plurality of charge transfer electrodes are arranged in a column through a charge transfer vertical register, and signal charges from each element transferred in the vertical direction by the vertical register are sequentially transferred in the horizontal direction for each horizontal line of the vertical register. A device comprising a charge transfer horizontal register for transferring and reading data, characterized in that charge transfer electrodes of the charge transfer vertical register corresponding to each unit photoelectric conversion element are arranged oppositely for at least two bits. This is achieved by providing a solid-state imaging device that achieves this goal.

(f) 考案の実施例 以下図面を用いて本考案の実施例について詳細
に説明する。
(f) Embodiments of the invention Examples of the invention will be described below in detail with reference to the drawings.

第3図は本考案に係る固体撮像装置の一実施例
を示す要部拡大平面図である。図において31は
半導体基板であり、32はマトリツクス状に配列
された複数の光電変換素子、即ち、それぞれが一
画素として構成された複数の受光部であり、その
受光部32の各列に平行隣接してトランスフアゲ
ート電極33を介して、本考案においては、前記
各単位受光部32に対応する電荷転送垂直レジス
タ34の、この場合4相駆動電荷転送電極35の
各電極長Lを1/2に短縮して、例えば2ビツト分
8本の転送電極を対向配置した構成とし、かかる
構成の各電荷転送垂直レジスタ34の一端は、従
来と同様に図示しない電荷転送水平レジスタに連
結された構造がとられている。そして各受光部3
2で光電変換され、蓄積された信号電荷をトラン
スフアゲート33を通して前記電荷転送垂直レジ
スタ34の2ビツト分の電荷転送電極35によつ
て垂直方向に転送することにより、信号電荷の転
送効率の劣化が防止されると共に解像度が向上す
る。
FIG. 3 is an enlarged plan view of essential parts of an embodiment of the solid-state imaging device according to the present invention. In the figure, 31 is a semiconductor substrate, and 32 is a plurality of photoelectric conversion elements arranged in a matrix, that is, a plurality of light receiving parts each configured as one pixel, which are adjacent in parallel to each row of the light receiving parts 32. In the present invention, each electrode length L of the charge transfer vertical register 34 corresponding to each unit light receiving section 32, in this case, the four-phase drive charge transfer electrode 35, is halved via the transfer gate electrode 33. In short, for example, eight transfer electrodes for two bits are arranged opposite each other, and one end of each charge transfer vertical register 34 in this structure is connected to a charge transfer horizontal register (not shown) as in the conventional case. It is being And each light receiving section 3
By vertically transferring the signal charge photoelectrically converted and accumulated in step 2 by the charge transfer electrode 35 for 2 bits of the charge transfer vertical register 34 through the transfer gate 33, deterioration of the signal charge transfer efficiency is prevented. This improves the resolution.

なお以上の実施例では電荷転送垂直レジスタに
4相駆動の電荷転送電極を用いた場合の例につい
て説明したが、本考案はこれに限定されるもので
はなく、例えば3相駆動の電荷転送電極を用いた
場合にも同様の効果が得られる。また各単位受光
部に対応する電荷転送垂直レジスタの電荷転送電
極のビツト数も2ビツトに限定されるものではな
く、必要に応じて転送電極長をより短縮し、2ビ
ツト以上の複数ビツトを対向配置して実施できる
ことは云うまでもない。
In the above embodiment, an example was explained in which a four-phase drive charge transfer electrode is used in the charge transfer vertical register, but the present invention is not limited to this, and for example, a three-phase drive charge transfer electrode may be used. A similar effect can be obtained when using the same method. Furthermore, the number of bits of the charge transfer electrodes of the charge transfer vertical register corresponding to each unit light receiving section is not limited to 2 bits, but the length of the transfer electrodes can be further shortened as necessary, and multiple bits of 2 or more bits can be arranged facing each other. Needless to say, it can be arranged and implemented.

(g) 考案の効果 以上の説明から明らかなように、本考案に係る
固体撮像装置の構造によれば、各単位受光部に対
応する電荷転送垂直レジスタの電荷転送電極の電
極長を短くして、2ビツト以上の転送電極を対向
配置することにより、転送する信号電荷の転送効
率の劣化が防止されると共に解像度が上し、信頼
性のよい高解像度の固体撮像装置を得ることがで
きる。よつて各種インターライン転送方式による
固体撮像装置に適用して極めて有利である。
(g) Effect of the invention As is clear from the above explanation, according to the structure of the solid-state imaging device according to the invention, the electrode length of the charge transfer electrode of the charge transfer vertical register corresponding to each unit light receiving section can be shortened. By arranging two or more bits of transfer electrodes facing each other, deterioration of the transfer efficiency of the signal charges to be transferred is prevented, and the resolution is increased, so that a reliable high-resolution solid-state imaging device can be obtained. Therefore, it is extremely advantageous to apply to solid-state imaging devices using various interline transfer methods.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図および第2図は従来のインターライン転
送方式による固体撮像装置を説明するための構成
図、および要部拡大平面図、第3図は本考案に係
るインターライン転送方式による固体撮像装置の
一実施例を示す要部拡大平面図である。 図面において31は半導体基板、32は受光
部、33はトランスフアゲート電極、34は電荷
転送垂直レジスタ、35は4相駆動電荷転送電極
を示す。
1 and 2 are block diagrams and enlarged plan views of essential parts for explaining a solid-state imaging device using a conventional interline transfer method, and FIG. 3 shows a solid-state imaging device using an interline transfer method according to the present invention. FIG. 2 is an enlarged plan view of main parts showing one embodiment. In the drawing, 31 is a semiconductor substrate, 32 is a light receiving section, 33 is a transfer gate electrode, 34 is a charge transfer vertical register, and 35 is a four-phase drive charge transfer electrode.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 半導体基板上にマトリツクス状に配列された複
数の光電変換素子をそなえ、該光電変換素子の各
列に平行隣接して、トランスフアゲート電極を介
して複数の電荷転送電極を縦列配置した電荷転送
垂直レジスタと、該各垂直レジスタによつて垂直
方向に転送された各素子からの信号電荷を、その
垂直レジスタの一水平ライン毎に、順次水平方向
に転送読出しを行う電荷転送水平レジスタとから
構成された装置において、前記各単位光電変換素
子に対応する電荷転送垂直レジスタの電荷転送電
極を、少なくとも2ビツト分、対向配置してなる
ことを特徴とする固体撮像装置。
A charge transfer vertical register comprising a plurality of photoelectric conversion elements arranged in a matrix on a semiconductor substrate, and a plurality of charge transfer electrodes arranged in parallel and adjacent to each column of the photoelectric conversion elements via transfer gate electrodes. and a charge transfer horizontal register that sequentially transfers and reads signal charges from each element vertically transferred by each vertical register in the horizontal direction for each horizontal line of the vertical register. A solid-state imaging device characterized in that charge transfer electrodes of charge transfer vertical registers corresponding to each of the unit photoelectric conversion elements are arranged oppositely for at least two bits.
JP19427482U 1982-12-21 1982-12-21 solid-state imaging device Granted JPS5996855U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19427482U JPS5996855U (en) 1982-12-21 1982-12-21 solid-state imaging device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19427482U JPS5996855U (en) 1982-12-21 1982-12-21 solid-state imaging device

Publications (2)

Publication Number Publication Date
JPS5996855U JPS5996855U (en) 1984-06-30
JPS6221019Y2 true JPS6221019Y2 (en) 1987-05-28

Family

ID=30417622

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19427482U Granted JPS5996855U (en) 1982-12-21 1982-12-21 solid-state imaging device

Country Status (1)

Country Link
JP (1) JPS5996855U (en)

Also Published As

Publication number Publication date
JPS5996855U (en) 1984-06-30

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