JPS62207970A - Matrix display device - Google Patents
Matrix display deviceInfo
- Publication number
- JPS62207970A JPS62207970A JP61049767A JP4976786A JPS62207970A JP S62207970 A JPS62207970 A JP S62207970A JP 61049767 A JP61049767 A JP 61049767A JP 4976786 A JP4976786 A JP 4976786A JP S62207970 A JPS62207970 A JP S62207970A
- Authority
- JP
- Japan
- Prior art keywords
- direction wiring
- continuity
- wiring
- pad
- test
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000011159 matrix material Substances 0.000 title claims abstract description 20
- 239000004973 liquid crystal related substance Substances 0.000 claims description 4
- 239000000758 substrate Substances 0.000 claims 2
- 239000010409 thin film Substances 0.000 claims 1
- 239000000523 sample Substances 0.000 abstract description 18
- 238000000034 method Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 238000005259 measurement Methods 0.000 description 2
- 206010010071 Coma Diseases 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
- 238000002791 soaking Methods 0.000 description 1
Abstract
Description
【発明の詳細な説明】
(産業上の利用分野)
この発明は、液晶等を用いたマトリクス表示装置の配線
の導通テストおよび隣接する配線間の非導通テストを高
速化するための配線構造に関する。DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a wiring structure for speeding up the conduction test of wiring of a matrix display device using a liquid crystal or the like and the non-continuity test between adjacent wirings.
(発明の概要)
この発明は、液晶等を用いたマトリクス表示装置におい
て、X方向配線J3よびY方向配線の各々の両端に導通
テストおよび非導通テストを行なうためのパッドを設【
ノることにより、X方向配線J3J、びY方向配線の導
通テストと短絡テス1〜を同時にかつ迅速に実施できる
J:うにしたものである。(Summary of the Invention) The present invention provides a matrix display device using a liquid crystal or the like, in which pads are provided at both ends of each of the X-direction wiring J3 and the Y-direction wiring for conducting a continuity test and a non-continuity test.
By doing this, the continuity test and the short circuit test 1~ of the X-direction wiring J3J and the Y-direction wiring can be performed simultaneously and quickly.
(従来の技術)
液晶等を用いたマトリクス表示装置の方式は、単純マト
リクス方式およびアクティブ・マトリクス方式がある。(Prior Art) Methods of matrix display devices using liquid crystals or the like include a simple matrix method and an active matrix method.
マトリクス表示装置は、高品位の表示品質および薄型で
軽h)であることを要求されるポケットテレビや壁掛は
テレビおよびワープロやハンドベルトコンピュータのデ
ィスプレイなど多様に応用されている。そして、市場の
要求は、まη′まず高精細度化の方向となっており、マ
トリクス表示装にの配線の導通テストおよび隣接配線聞
の非導通テストのテスト時間の増大が問題となっている
。Matrix display devices are used in a variety of applications, such as pocket televisions, wall-mounted televisions, and displays for word processors and hand-belt computers, which are required to have high display quality and be thin and lightweight. In addition, the market demand is primarily toward higher definition, and the increase in test time for continuity tests of wiring in matrix display devices and non-continuity tests between adjacent wirings has become a problem. .
第2図は、従来のマトリクス表示装置の配線の略口であ
る。X方向配llA1とY方向配線2は、表示領域3内
に−3いて直交し、その交差部に表示画素が形成されて
いる。X方向配線1とY方向配線2の各々は、一方の端
のバッドPが、他方の端にバッドP′が1段番ノられて
いる。FIG. 2 is a schematic diagram of the wiring of a conventional matrix display device. The X-direction wiring 11A1 and the Y-direction wiring 2 are orthogonal to each other at -3 within the display area 3, and display pixels are formed at their intersections. Each of the X-direction wiring 1 and the Y-direction wiring 2 has a pad P at one end and a pad P' at the other end.
X方向配線1とY方向配線2の導通テストは、同一配線
上のバッドPとバッド1〕′ 間の抵抗測定を実施する
ことである。また、X方向舵l5111の隣接するX方
向配線1どの非導通テストおよびY方向配線2の隣接し
たY方向配線2との非導通テストは、測定する配線のバ
ッドPと前記配線に隣接した配線のパッド1間の抵抗測
定を実施1Jることである。The continuity test between the X-direction wiring 1 and the Y-direction wiring 2 is to measure the resistance between the pad P and the pad 1]' on the same wiring. In addition, the non-continuity test of the adjacent X-direction wiring 1 of the X-direction rudder 15111 and the non-continuity test of the Y-direction wiring 2 with the adjacent Y-direction wiring 2 are performed between the pad P of the wiring to be measured and the pad of the wiring adjacent to the said wiring. The resistance measurement for 1J is to be carried out for 1J.
(発明が解決しようとする問題点)
したがって、従来のマトリクス表示装置の尋通テス1〜
と非導通テストは、X方向舵tfA1どY方向配線2の
総本数の回数を、プローブ針の位置出しを行ないながら
実施する必要がある。その結果、導通テストと非導通テ
ストの所要時間が10〜20分と長く、マトリクス表示
装置のrA漬単価の上背をまねいた。(Problems to be Solved by the Invention) Therefore, the examination test 1 of the conventional matrix display device
It is necessary to perform the non-continuity test as many times as the total number of X-direction rudder tfA1 and Y-direction wiring 2 while positioning the probe needle. As a result, the time required for the continuity test and non-continuity test was as long as 10 to 20 minutes, resulting in an increase in the rA soaking unit cost of the matrix display device.
(問題点を解決するための手段)
上記問題点を解決するために、この発明は、X方向配線
とY方向配線の各々をスクライブ領域内まで伸長し、ぞ
れらの両端に導通テスト用のバッドを設けることにより
、プローブ針の位置出しを筒略化した導通テストJ5よ
び非導通テストを可能とし、テスト時間の短縮化を実現
している。(Means for Solving the Problems) In order to solve the above problems, the present invention extends each of the X-direction wiring and the Y-direction wiring into the scribe area, and provides continuity test wires at both ends of each. By providing the pad, it is possible to perform the continuity test J5 and non-continuity test in which positioning of the probe needle is simplified, thereby shortening the test time.
(実施例)
以下に、この発明の第1の実施例を第1図にもとづいて
説明する。X方向配線1とY方向配線2は、表示領域3
内において第2図に示す従来の7トリクス表示装置と同
様の構成となっている。しかし、X方向配置i11とY
方向配線2の両端は、スクライブ領域4内まで伸長した
うえη通テスト用バッドPとP′が設8プられている。(Example) A first example of the present invention will be described below based on FIG. 1. The X-direction wiring 1 and the Y-direction wiring 2 are connected to the display area 3.
Internally, the structure is similar to that of the conventional 7-trix display device shown in FIG. However, the X direction arrangement i11 and the Y
Both ends of the directional wiring 2 extend into the scribe area 4 and are provided with η test pads P and P'.
導通テストは、バッド1〕とP′のある平行な位n関係
にあるスクライブ領11!4上にプローブ針NとN′を
接触させた状態で、プローブ針NとN′を同時にスクラ
イブ領域4の長さ方向に移動させながらX方向配線1ま
たG、i Y方向配線2の抵抗測定を順次行なうことで
ある。一方、非導通テストは、プローブ針NがバッドP
に接触した時、プローブSIN’が手前か次のX方向配
線1またはY方向配線2のバッドP′に接触するような
プローブ針NとN′の位置関係で、η通テス1−と同様
に抵抗測定を行なうことである。The continuity test is carried out with the probe needles N and N' in contact with the scribe region 11!4 which is parallel to the scribe region 11!4 with the pad 1] and P'. The resistance of the X direction wire 1 and the G, i and Y direction wires 2 is sequentially measured while moving the wire in the length direction. On the other hand, in the non-continuity test, the probe needle N is bad P.
With the positional relationship of the probe needles N and N' such that when the probe SIN' contacts the pad P' of the X-direction wiring 1 or the Y-direction wiring 2, the probe SIN' contacts the pad P' of the X-direction wiring 1 or the Y-direction wiring 2. This is to perform a resistance measurement.
導通テストおよび非導通テストt、L、プローブ針Nと
N′をバッドPとP′に接触さUながら移動させるため
、バッドPとP′にキズが発生したり、バッドPとP′
の一部が剥離したりする。しかし、この問題は、スクラ
イブ領域4を明所するときに、導通テストおよび非導通
テスト後、不要どなっているバッド1〕と1〕′ が自
動的に除去されるのぐ、解決する。Continuity test and non-continuity test Since the probe needles N and N' are moved while touching the pads P and P', scratches may occur on the pads P and P'.
Part of it may peel off. However, this problem is solved as soon as the unnecessary pads 1] and 1]' are automatically removed after the continuity test and the non-continuity test when the scribe area 4 is illuminated.
次に、この発明の第2の実施例を第3図にもとづいて説
明する。第1図の実施例と異なる点もよ、導通テストと
非導通テストで用いられるバッドPとP′のみである。Next, a second embodiment of the present invention will be described based on FIG. 3. The only difference from the embodiment shown in FIG. 1 is the pads P and P' used in the continuity test and non-continuity test.
ぞこで、第3図もよ、バッドPとP′を改善したバッド
PLとPL’の部分を拡大して示している。As shown in FIG. 3, bad parts PL and PL' which are improved from bad parts P and P' are shown enlarged.
導通テストと非導通テストは、スクライブ領域4にプロ
ーブ公INとN′を接触さt!ながら、1回スクライブ
領域4の艮ざ方向に移動さぼることで同時に実施できる
。すなわち、プローブEI Nが位置11へ、プローブ
if N ’が位置[1′へ到達覆るど導通テス1〜が
可能どなる。その後、プローブ公INが位置12へ、プ
ローブSIN’ が位置12’へ到達すると隣接したX
方向配線1の非導通テストが可能となる。Y方向配FJ
12に関してもパッド1)1−とPL′と同様の形状の
パッドを採用づることにより、導通テストど非導通テス
]・を効率的に実施できる。For continuity and non-continuity tests, contact the probes IN and N' to the scribe area 4. However, it can be performed at the same time by moving the scribe area 4 once in the cutting direction. That is, when the probe EIN reaches the position 11 and the probe if N' reaches the position [1', the continuity test 1~ becomes possible. After that, when probe public IN reaches position 12 and probe SIN' reaches position 12', the adjacent
A non-continuity test of the directional wiring 1 becomes possible. Y direction alignment FJ
Continuity tests and non-continuity tests can be carried out efficiently by employing pads 1) having the same shape as pads 1- and PL' for pads 12.
(発明の効果)
この発明は、以上説明したように、X方向配線とY方向
配線の導通テストと非導通テスト用パッドをスクライブ
領域内に設【ノかつパッドの形を改;9することにより
、数十分の所要時間の尋通テス1〜と非導通jス1〜が
、数十秒の時間で可能となり、その結果、導通テストと
非導通テス]−の費用が削減でき、マトリクス表示装置
の製造単価を下げることが可能となるという効果がある
。(Effects of the Invention) As explained above, the present invention provides continuity test and non-continuity test pads for X-direction wiring and Y-direction wiring within the scribe area and by changing the shape of the pads. The interrogation test 1~ and the non-continuity test 1~, which took several tens of minutes, can now be performed in a few tens of seconds.As a result, the cost of the continuity test and non-continuity test can be reduced, and the matrix display This has the effect of making it possible to lower the unit manufacturing cost of the device.
第1図は、この発明にかかるマトリクス表示装置の実施
例の平面図、第2図tま、従来のマトリクス表示装置の
平面図、第3図は、この発明にかかるパッド形状を改善
したマトリクス表示装置の拡大平面図である。
1・・・X方向配線
2・・・Y方向配線
4・・・スクライブ領域
N、N’ ・・・プローブ針
1)、P’ 、PL、PL’・・・パッド出願人 セ
イコー電子工業株式会社
第2図
バ、シトをC¥@L?:マトソクス烹ゴ優保j【のネぬ
犬→耐狛図第3図FIG. 1 is a plan view of an embodiment of a matrix display device according to the present invention, FIG. 2 is a plan view of a conventional matrix display device, and FIG. 3 is a matrix display with an improved pad shape according to the present invention. FIG. 3 is an enlarged plan view of the device. 1...X direction wiring 2...Y direction wiring 4...Scribe area N, N'...Probe needle 1), P', PL, PL'...Pad applicant Seiko Electronics Co., Ltd. Figure 2: C¥@L? :Matosokusuogo Yuhoj [Nonenunu→Koma-taizu Figure 3]
Claims (2)
複数本のY方向配線を備え、その各交差部に薄膜トラン
ジスタ等のスイッチ素子アレイを形成した基板とITO
等の透明電極を備えた対向基板の間に液晶を封止した構
造のマトリクス表示装置において、 前記X方向配線と前記Y方向配線の両端の各々が、スク
ライブ領域内まで伸長し、かつ前記両端の各々にパッド
を設けた構造であることを特徴とするマトリクス表示装
置。(1) A substrate with a plurality of X-direction wirings and a plurality of Y-direction wirings perpendicular to the X-direction wirings, and a switch element array such as a thin film transistor formed at each intersection thereof, and an ITO
In a matrix display device having a structure in which a liquid crystal is sealed between opposing substrates having transparent electrodes such as A matrix display device characterized by having a structure in which each pad is provided.
設けられたパッドが、前記X方向配線と前記Y方向配線
の各々の配線方向を水平方向の座標として仮定した場合
、一方の端では、上方に伸長し、他方の端では、下方に
伸長し、 さらに、第1のX方向配線又はY方向配線の上方に第1
のX方向配線又はY方向配線と平行の位置関係にある第
2のX方向配線又はY方向配線の他方のパッドの上下方
向の辺が、第1のX方向配線又はY方向配線の一方のパ
ッドの上下方向の辺とが対応していることを特徴とする
特許請求の範囲第1項記載のマトリクス表示装置。(2) If the wiring direction of each of the X-direction wiring and the Y-direction wiring is assumed to be a horizontal coordinate, the pads provided at both ends of each of the X-direction wiring and the Y-direction wiring are located at one end. , the other end extends upward, and the other end extends downward, and furthermore, a first
The vertical side of the other pad of the second X-direction wiring or Y-direction wiring that is parallel to the X-direction wiring or Y-direction wiring is one pad of the first X-direction wiring or Y-direction wiring. The matrix display device according to claim 1, wherein the vertical sides of the matrix correspond to each other.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61049767A JPH0830820B2 (en) | 1986-03-07 | 1986-03-07 | Matrix display |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61049767A JPH0830820B2 (en) | 1986-03-07 | 1986-03-07 | Matrix display |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS62207970A true JPS62207970A (en) | 1987-09-12 |
JPH0830820B2 JPH0830820B2 (en) | 1996-03-27 |
Family
ID=12840323
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP61049767A Expired - Lifetime JPH0830820B2 (en) | 1986-03-07 | 1986-03-07 | Matrix display |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0830820B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6686224B2 (en) | 2001-09-13 | 2004-02-03 | Nec Electronics Corporation | Chip manufacturing method for cutting test pads from integrated circuits by sectioning circuit chips from circuit substrate |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS56135887A (en) * | 1980-03-26 | 1981-10-23 | Tokyo Shibaura Electric Co | Method of manufacturing electrode for matrix drive type element |
JPS5895383A (en) * | 1981-11-30 | 1983-06-06 | 株式会社東芝 | Matrix type display |
JPS59210419A (en) * | 1983-05-13 | 1984-11-29 | Seiko Epson Corp | Liquid crystal display body device |
-
1986
- 1986-03-07 JP JP61049767A patent/JPH0830820B2/en not_active Expired - Lifetime
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS56135887A (en) * | 1980-03-26 | 1981-10-23 | Tokyo Shibaura Electric Co | Method of manufacturing electrode for matrix drive type element |
JPS5895383A (en) * | 1981-11-30 | 1983-06-06 | 株式会社東芝 | Matrix type display |
JPS59210419A (en) * | 1983-05-13 | 1984-11-29 | Seiko Epson Corp | Liquid crystal display body device |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6686224B2 (en) | 2001-09-13 | 2004-02-03 | Nec Electronics Corporation | Chip manufacturing method for cutting test pads from integrated circuits by sectioning circuit chips from circuit substrate |
Also Published As
Publication number | Publication date |
---|---|
JPH0830820B2 (en) | 1996-03-27 |
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Legal Events
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