JPS6220512B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a device for displaying AM and PM in a watch using a liquid crystal or the like.

Generally, the AM and PM indications on a clock are
AM and PM are displayed, but this was difficult to read intuitively. In addition, the time display and
Since the AM and PM display positions were far apart, I had to look at two places.

Therefore, the present invention provides a display device for displaying AM and PM that is easy to read intuitively by displaying either the left or right side of a display band formed around the outer periphery of a time display section to display AM and PM. It is.

An embodiment of the present invention will be described below based on the drawings. In FIG. 1, 1 is a crystal oscillator and 2 is a frequency divider. 3 and 4 each measure the seconds digit10
They are a hexadecimal counter and a hexadecimal counter. 5 and 6 are decimal counters that measure minute digits and 6, respectively.
It is a decimal counter, and 7 and 8 are a decimal counter and a hexadecimal counter that measure the hour digits, respectively.
Each counter shall produce an output in binary coded decimal code. 9 is a hexadecimal counter, 10 is a timing pulse generation circuit, and from the frequency divider 2, for example, 128
Timing pulses are sequentially generated at terminals P ₁ to _{P 3} in response to the Hz output pulse. 11 to 16 are gate circuits having an AND function, which are controlled by pulses sequentially generated at terminals P ₁ to _{P 3} . 17 and 18 are gate circuits having an OR function, and 19 and 20 are decoders that convert the output codes of the gate circuits 17 and 18, respectively. 21 is an output order switching circuit, and the output order of the decoder 19 is switched according to the state of one output of the gate circuit 18. 22 is a segment potential setting circuit that selects a potential to be applied to the segment electrodes, which will be described in detail later, and 23 is a common potential setting circuit that selects a potential to be applied to the common electrode. 24 is a potential selection circuit, 25 is a morning,
This is the afternoon discrimination circuit, and these constitute a control circuit. 26 is a flip-flop circuit;
27 is a potential setting circuit, which has terminals S ₀ , S ₁ , C ₀ ,
Predetermined potentials of potentials 0, v ₀ , 2v ₀ and 3v ₀ are periodically generated on C ₁ and C ₂ . 28 is an inverter.

FIGS. 2 and 3 show electrode patterns of a liquid crystal display device that displays hands.

In FIG. 2, numeral 29 indicates the arrangement of segment electrodes with 60 electrodes, and segment electrodes 29a with 10 electrodes are connected to the terminals e ₁ to e ₁₀ of the segment potential setting circuit 22 as shown in the figure. It's connected. Other segment electrodes have the following connection relationships. The order of segment electrodes specified below is segment electrode 2 connected to terminal e ₁ .
9a is the first and counting clockwise. The 10th segment electrode 29a is connected to the 11th segment electrode 29a, the 9th is connected to the 12th, the 1st is connected to the 20th, the 20th is connected to the 21st, the 19th is connected to the 22nd, etc. ...The 11th is commonly connected to the 30th. Below, segment electrodes up to the 60th are connected in the same relationship as above.

FIG. 3 shows a pattern 30 of a common electrode, and the common electrode 30 is divided into six parts on the outside, inside, and inside.
d, 30b, and 30a. Note that index portions M ₁ to _{M 12} corresponding to each time scale from 1 o'clock to 12 o'clock are formed on the common electrode 30d.

Note that each dividing groove 30 of the common electrodes 30a, 30b
c...30c is between the 10th and 11th segment electrodes, between the 20th and 21st segment electrodes, between the 30th and 31st segment electrodes, and between the 40th and 41st segment electrodes in the clockwise direction. between the th segment electrodes,
Between the 50th and 51st segment electrodes and between the 50th and 51st segment electrodes.
It is configured so that it can be located between the 60th and 1st segment electrodes.

Note that a liquid crystal display device is constituted by an assembly of display parts with liquid crystal interposed between segment electrodes and a common electrode, but the configuration can be easily implemented by a person skilled in the art, and Since the present invention is not characterized by such a configuration itself, it will be omitted.

FIG. 4 is a detailed circuit diagram of the output priority switching circuit 21 and the segment potential setting circuit 22.
45 is a gate circuit, 46 to 55 are switching circuits made of semiconductors, and 56 to 58c are inverters.

FIG. 5 is a detailed circuit diagram of the potential setting circuit 27, in which 59 to 74 are switching circuits similar to those described above, and 75 and 76 are inverters.

FIG. 6 is a detailed circuit diagram of the common potential setting circuit 23, in which 77-82 are gate circuits, 83-92 are switching circuits similar to those described above, and 93-97 are inverters.

The voltage states set in this embodiment will be explained below.

In Figure 5, v 0 is applied to terminals l ₃ and l ₄ , and v ₀ is applied to terminals l ₂ and l ₅ .
2v ₀ , a potential of 3v ₀ is applied to the terminals l ₀ and l ₇ , and a potential of 0 is applied to the terminals l ₁ and l ₆ . Also, to simplify the explanation, the liquid crystal display device has a voltage of |v ₀
It will not light up when the voltage is below ｜2v ₀ ｜, and it will turn on when the voltage is above ｜2v 0｜.

The pulse train shown in FIG. 7A is applied to the terminal _P0 in FIG. 5, and the switching circuits 67, 69, 7
1, 73 and switching circuits 68, 70, 72,
74 are opened and closed alternately. On the other hand, the pulse shown in FIG. 7B is generated at the terminal Q of the flip-flop circuit 26 triggered by the pulse generated at the terminal _P1 .
As a result, the switching circuit 59 shown in FIG.
61, 63, 65 and switching circuits 60, 6
2, 64, and 66 are alternately opened and closed, and a predetermined potential among 0, V ₀ , 2V ₀ and 3V ₀ is generated at the output terminal of each switching circuit. Therefore, Figure 7B
In the pulse waveform _b1 , the potential is 0 at the terminal _S0 ,
Potentials 2V ₀ and 0 are generated alternately at the terminal S ₁ , potentials 3V ₀ and 0 are generated at the terminal C ₀ , potentials V ₀ and 0 are generated at the terminal C ₁ , and potentials V ₀ and 2V ₀ are generated at the terminal C ₂ . In addition, in waveform b ₂ , the terminal S ₀ has a potential of 3V ₀ , the terminal S ₁ has a potential of V ₀ and 3V ₀ , the terminal C ₀ has a potential of 0 and 3V ₀ , the terminal C ₁ has a potential of 2V ₀ and 3V ₀ , and the terminal C ₂ The potentials 2V ₀ and V ₀ occur alternately. Each of these waveforms and terminals S ₀ and S ₁
FIG. 8 shows the voltage waveform generated by the potential difference between the terminals C ₀ , C ₁ , and C ₂ .

As an example, the counters 3 to 8 shown in the first diagram are 10:05.
The pointer display when counting minutes and seconds will be explained. In this timekeeping state, counter 3 is "0", counter 4 is "0", counter 5 is "5",
The counter 6 counts "0", the counter 7 counts "0", the counter 8 counts "5", and the counter 9 counts "5".

When a pulse is periodically generated from the terminal _P1 of the timing pulse generation circuit 10 shown in FIG. Data is input to gate circuit 18. Therefore,
“0” is generated at the terminals ²⁰ to ²³ of the gate circuit 17,
"0" is generated at terminals ²⁰ to ²² of the gate circuit 18. Therefore, "1" is produced at the terminal, "0" is produced at the terminal h, and "1" is produced at the terminal _x0 of the decoder 19.
Therefore, referring to FIG. 4, the gate circuit 31,
Since the output of 41 becomes "1", the potential generated at the terminal _S0 is generated at the terminal _e1 . Regarding other terminals e ₂ to _{e 10} , switching circuits...49, 51,...53,
55 is turned on, a potential is generated at terminal _S1 .

Next, regarding the decoder 20 shown in FIG. 6, since "1" is generated at the terminal _y0 , the potential generated at the terminal _C0 is generated at the terminal _k1 . Further, in this state, since the terminal _P3 of the timing pulse generating circuit 10 is "0", the terminal ₃ is "1", and therefore the gate circuits 77 to 82 are open. Therefore, the switching circuit 83 is turned on, and the potential generated at the terminal _C0 is generated at the terminal _g1 . Other terminals k ₂ to k ₆ ,
The potential occurring at the terminal _C1 is generated in _g2 to _g6 .

Therefore, a voltage |3V ₀ | (shown in the eighth figure), which is the difference in the potentials applied to the terminals e ₁ , g ₁ , and k ₁ , is periodically applied to the liquid crystal, and the electrode shown in the second figure corresponding to the electrode is periodically applied to the liquid crystal. The display section corresponding to S lights up. Since the voltage |V ₀ | is periodically applied between the other electrodes (as shown in the eighth figure), the display portions corresponding thereto are not lit.

Next, paying attention to the terminal _P2 of the timing pulse generation circuit 10, the pulses generated periodically therefrom open the gate circuits 12 and 15, and the output data "5" and "0" of the counters 5 and 6 open the gate circuit. pass. Therefore, "1" is generated at the terminal _x5 of the decoder 19 and "1" is generated at the terminal _y0 of the decoder 20, or "1" and h are held at "0".

Therefore, the output of the gate circuit 43 shown in FIG. 4 becomes "1", the switching circuit 51 is turned on, and the potential generated at the terminal _S0 is generated at the terminal _e6 . The potential occurring at the terminal _S1 is generated at the other terminals e1 _{to e5 , e7} to _e10 .

Also, from FIG. 6, the potential that occurs at terminal C ₀ is generated at terminals g ₁ and k ₁ , and the potential that occurs at terminal C 0 is generated at terminals g 1 and k 1 , and the potential at other terminals g ₂ to g ₆ and k ₂ to
The potential that appears at terminal _C1 is generated at _k6 . Therefore, the segment electrode M connected to point terminal e ₆ and the terminal
The display section formed by g ₁ , k ₁ and the opposing common electrode is lit.

Focusing on the terminal _P3 of the timing pulse generation circuit 10, the pulses periodically generated therefrom open the gate circuits 13 and 16 and allow the outputs of the counters 7 and 8 to pass through them. As a result, the potential generated at the terminal _S0 is generated at the terminal _e10 of the segment potential setting circuit 22. The potential generated at the terminal _C0 is generated at the terminal _k6 of the common potential setting circuit 23, and the potential generated at the terminal _C1 is generated at the other terminals _k1 to _k5 . Note that when a pulse occurs at terminal _P3 , the 6th
Since the outputs of the gate circuits 77 to 82 shown in the figure become "0", the potential occurring at the terminal _C1 is generated in all of the terminals _g1 to _g6 .

Therefore, the display section is lit when it is constituted by the segment electrode H connected to the terminal e ₁₀ and the common electrode connected to the terminal k ₆ . As a result of the above, the display portions corresponding to the segment electrodes H, M, and S in FIG. 2 are lit, and 10:05:00 is displayed.

Next, display operations in the morning and afternoon will be explained. The discrimination circuit 25 in FIG. 1 consists of a gate circuit, a flip-flop circuit, etc.
After receiving the output of step 8, it determines whether it is morning or afternoon.
On the other hand, the potential selection circuit 24 selects the potentials from the terminals C ₂ and C ₁ to the terminals m ₁ and m ₂ , respectively, based on the morning discrimination output.
The afternoon discrimination output generates potentials from terminals C ₁ and C ₂ at terminals m ₁ and m ₂ , respectively. The terminal _m1 is the common electrode 30d in FIG. 3...
...30d, the three on the right are commonly connected, and the terminal _m2 is commonly connected to the three on the left. Therefore, in the morning, regardless of whether a segment electrode is selected or not, the voltages |V ₀ | and |2V ₀ | are generated between the segment electrode and the three common electrodes 30d on the right as shown in FIG. Because they are applied alternately,
As shown in FIG. 9, the corresponding display band _B1 is lit to indicate the morning. At this time, voltages 0 and |V ₀ | are alternately applied between the three left common electrodes 30d and the segment electrodes as shown in FIG. 8, so the corresponding display bands are in a non-display state. ing.

Since the right half-circle display band _B1 is displayed in this way, it can be intuitively understood that if the entire circumference is defined as one day, it is the first half of the day, that is, in the morning. Furthermore, when looking at the time display, the display band _B1 naturally catches the eye, making it easy to tell that it is morning without being particularly conscious.

In the afternoon, contrary to the above, the voltage between the three left common electrodes 30d and the segment electrodes |V ₀
| and |2V ₀ | are applied alternately, so the first
As shown in Figure 0, the display band _B2 on the left half circle is lit to indicate the afternoon.

Next, other embodiments will be described. In FIG. 11, 60 lead wires (not shown) are independently led out from the 60 segment electrodes 98...98, and are connected to the common electrode 9 through the liquid crystal.
9a and 99b are opposed to each other. Common electrode 99a
The pulse PC ₁ shown in FIG. 12 is supplied to the common electrode 99b, and the pulse PC ₂ is supplied to the common electrode 99b. On the other hand, the pulse PS _{1 .} . . is applied to the segment electrodes 98...98.
By selectively supplying PS ₄ , the liquid crystal between segment electrode 98 and common electrode 99a and between segment electrode 98 and common electrode 99b can be made to respond and non-response, respectively. Therefore, when displaying the time in the morning, pulse PS ₃ is supplied to the segment electrodes in the right half that do not correspond to hour, minute, and second hand display, and the time in the morning is displayed in the right half as shown in Figure 13. Light up the display band. Also, among the segment electrodes on the left half, those that do not correspond to the hour, minute, and second hands are kept non-lit by supplying pulse PS ₄ . Regarding the minute hand and second hand display, pulse PS ₂ is supplied from 0 to 29 minutes (and seconds) to display the long hand as shown in display segment M in Figure 13, and from 30 to 59 minutes (and seconds), pulse PS 2 is supplied. PS ₁ is supplied to display the long hand as in display segment S. Regarding the hour hand display, pulse PS ₁ is supplied from 0 to 5 o'clock, and pulse PS 1 is supplied from 6 to 11 o'clock.
Until then, the pulse PS ₂ is supplied to display the hour hand as shown in display segment H in FIG.

In addition, in Fig. 13, 10:05:40 am is displayed.

Further, when displaying the afternoon time, contrary to the above, the afternoon display band is lit in the left half circle as shown in Fig. 14. The figure shows 10:05:40 p.m.

As described above, according to the present invention, display bands are formed along each of the right half circumference and the left half circumference of the time display section, the right display band displays AM, and the left display band displays PM. As a result, when looking at the time display, the morning and afternoon distinctions are naturally visible and easy to read intuitively.

[Brief explanation of the drawing]

Fig. 1 is an electrical circuit diagram of an embodiment of the present invention;
The figure is a plan view of the segment electrode pattern of the display section 3, FIG. 3 is a plan view of the common electrode pattern of the display section, FIGS. 1 is a time chart for explaining the operation of the illustrated circuit, FIG. 8 is an explanatory diagram showing the potential waveforms supplied to the electrodes and the voltage waveforms applied to the liquid crystal, and FIGS. 9 and 10 are examples of the display mode of the display section. 11 is a front view showing another example of the display section, and FIG. 12 shows the potential waveform supplied to the electrodes of the display section shown in FIG. 11 and the voltage waveform applied to the liquid crystal. The explanatory drawings, FIGS. 13 and 14, are front views showing the display mode of the display section of FIG. 11. 3 to 8... Counter, 10... Timing pulse generation circuit, 22... Segment potential setting circuit,
23... Common potential setting circuit, 24... Selection circuit,
25...discrimination circuit, 29a-29a...segment electrode, 30a, 30b, 30c...common electrode,
_B1 , _B2 ...Display band, 98-98...Segment electrode, 99a, 99b...Common electrode.

Claims (1)

[Scope of Claims] 1. A timepiece that displays the time in analog form using a display section using an electro-optical display element, comprising: a display band formed along each of the right half circumference and the left half circumference of the display section; A morning and afternoon display device comprising a control circuit that selects a display band and displays morning and afternoon discrimination. 2. The morning and afternoon display device according to claim 1, wherein each of the display bands also serves as an outer peripheral portion of the display section. 3. The AM and PM display device according to claim 1, wherein each of the display bands is formed outwardly along the outer periphery of the display section.