JPS62204370U - - Google Patents
Info
- Publication number
- JPS62204370U JPS62204370U JP9305686U JP9305686U JPS62204370U JP S62204370 U JPS62204370 U JP S62204370U JP 9305686 U JP9305686 U JP 9305686U JP 9305686 U JP9305686 U JP 9305686U JP S62204370 U JPS62204370 U JP S62204370U
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- wiring board
- printed wiring
- pins
- view
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000005476 soldering Methods 0.000 claims 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
Landscapes
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Description
第1図はこの考案の第1の実施例の斜視図、第
2図はその断面図、第3図はその印刷配線板が反
つた状態を示す断面図、第4図はそのスリツトの
変形例を示す斜視図、第5図はこの考案の第2の
実施例の斜視図、第6図はその印刷配線板が反つ
た状態を示す断面図、第7図および第8図はその
集積回路の変形例の正面図、第9図は従来例の断
面図である。
10…印刷配線板、12…集積回路(IC)、
14,16…スリツト、18…ピン。
Fig. 1 is a perspective view of the first embodiment of this invention, Fig. 2 is a sectional view thereof, Fig. 3 is a sectional view showing the printed wiring board in a warped state, and Fig. 4 is a modification of the slit. 5 is a perspective view of the second embodiment of the invention, FIG. 6 is a sectional view showing the printed wiring board in a warped state, and FIGS. 7 and 8 are views of the integrated circuit. A front view of the modified example and FIG. 9 are a sectional view of the conventional example. 10...Printed wiring board, 12...Integrated circuit (IC),
14, 16...slit, 18...pin.
Claims (1)
付けして実装した集積回路と、前記印刷配線板ま
たは前記集積回路に設けられ前記集積回路の前記
ピンの並び方向と交差する方向に延びたスリツト
とを備えた集積回路の固定構造。 A printed wiring board, an integrated circuit mounted on the printed wiring board by soldering pins, and a slit provided in the printed wiring board or the integrated circuit and extending in a direction intersecting the direction in which the pins of the integrated circuit are arranged. A fixed structure of an integrated circuit with and.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9305686U JPS62204370U (en) | 1986-06-18 | 1986-06-18 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9305686U JPS62204370U (en) | 1986-06-18 | 1986-06-18 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS62204370U true JPS62204370U (en) | 1987-12-26 |
Family
ID=30955307
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9305686U Pending JPS62204370U (en) | 1986-06-18 | 1986-06-18 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS62204370U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2019216244A1 (en) * | 2018-05-07 | 2019-11-14 | 株式会社村田製作所 | Multilayer board and connection structure therefor |
-
1986
- 1986-06-18 JP JP9305686U patent/JPS62204370U/ja active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2019216244A1 (en) * | 2018-05-07 | 2019-11-14 | 株式会社村田製作所 | Multilayer board and connection structure therefor |
JPWO2019216244A1 (en) * | 2018-05-07 | 2021-03-11 | 株式会社村田製作所 | Multilayer board and its connection structure |
US11470728B2 (en) | 2018-05-07 | 2022-10-11 | Murata Manufacturing Co., Ltd. | Multilayer board and connecting structure of the same |
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