JPS62202620U - - Google Patents

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Publication number
JPS62202620U
JPS62202620U JP8856586U JP8856586U JPS62202620U JP S62202620 U JPS62202620 U JP S62202620U JP 8856586 U JP8856586 U JP 8856586U JP 8856586 U JP8856586 U JP 8856586U JP S62202620 U JPS62202620 U JP S62202620U
Authority
JP
Japan
Prior art keywords
offset
error signal
focus servo
servo device
focus
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8856586U
Other languages
Japanese (ja)
Other versions
JPH0433543Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1986088565U priority Critical patent/JPH0433543Y2/ja
Publication of JPS62202620U publication Critical patent/JPS62202620U/ja
Application granted granted Critical
Publication of JPH0433543Y2 publication Critical patent/JPH0433543Y2/ja
Expired legal-status Critical Current

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  • Moving Of The Head For Recording And Reproducing By Optical Means (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図および第2図は、この考案に係るフオー
カスサーボ装置の実施例を示すもので、第1図は
全体構成を示すブロツク図、第2図は第1図の要
部の動作説明用の特性図である。第3図乃至第5
図A,Bは、従来例を示すもので、第3図はブロ
ツク図、第4図および第5図A,Bはそれぞれ特
性図である。 1:光ピツクアツプ、2:FE検出部、3:コ
ンパレータ、4:コントロール回路、5:補償回
路、6:フオーカスサーチ回路、7:出力アンプ
、8:デイスク、SW1,SW2,SW3:スイ
ネチ、OFS……オフセツト電圧。
Figures 1 and 2 show an embodiment of the focus servo device according to this invention. Figure 1 is a block diagram showing the overall configuration, and Figure 2 is for explaining the operation of the main parts of Figure 1. FIG. Figures 3 to 5
Figures A and B show a conventional example, Figure 3 is a block diagram, and Figures 4 and 5 A and B are characteristic diagrams, respectively. 1: Optical pickup, 2: FE detection section, 3: Comparator, 4: Control circuit, 5: Compensation circuit, 6: Focus search circuit, 7: Output amplifier, 8: Disk, SW1, SW2, SW3: Switch, OFS ...Offset voltage.

Claims (1)

【実用新案登録請求の範囲】 (1) フオーカスエラー信号のゼロクロスを検出
する検出手段の出力に応じてフオーカスサーボル
ープを閉じるように構成されたフオーカスサーボ
装置において、 前記フオーカスエラー信号に負または正の電位
のオフセツトを予め付与するオフセツト手段を設
け、前記フオーカスエラー信号の有効範囲にアク
チユエータが接近する過程で前記検出手段がゼロ
クロスを検出したときは、前記オフセツトを略ゼ
ロ電位とし、さらに前記検出手段がフオーカスエ
ラー信号の有効範囲内におけるゼロクロスを検出
したときは、前記オフセツトの付与を停止すると
共にフオーカスサーボループを閉じるように構成
したことを特徴とするフオーカスサーボ装置。 (2) フオーカスエラー信号の有効範囲にアクチ
ユエータが接近する過程で前記検出手段がゼロク
ロスを検出したときに、前記フオーカスエラー信
号に付与する略ゼロ電位のオフセツトを、わずか
に負または正の電位に設定されるように構成した
オフセツト手段を設けたことを特徴とする実用新
案登録請求の範囲第1項記載のフオーカスサーボ
装置。 (3) オフセツト手段は、負または正の電源と、
第1の抵抗とからなり、その負または正の電位の
オフセツトを、フオーカスエラー信号のゼロクロ
スを検出する検出手段の入力に付与するように構
成したことを特徴とする実用新案登録請求の範囲
第1項記載のフオーカスサーボ装置。 (4) オフセツト手段は、負または正の電源と第
1の抵抗とからなる第1のオフセツトと、フオー
カスエラー信号のゼロクロスを検出する検出手段
の出力と第2の抵抗とで与えられる第2のオフセ
ツトとの和のオフセツトを付与するように構成し
たことを特徴とする実用新案登録請求の範囲第1
項記載のフオーカスサーボ装置。 (5) オフセツト手段は、負または正の電源と第
1の抵抗とからなる第1のオフセツトと、フオー
カスエラー信号のゼロクロスを検出する検出手段
の出力と、その出力に時定数を与える第2の抵抗
とコンデンサとからなる第2のオフセツトとの和
のオフセツトを付与するように構成したことを特
徴とする実用新案登録請求の範囲第1項記載のフ
オーカスサーボ装置。 (6) 検出手段がフオーカスエラー信号の有効範
囲内におけるゼロクロスを検出したときの検出出
力によりオフセツト手段のオフセツト付与を停止
させるスイツチ手段を設けたことを特徴とする実
用新案登録請求の範囲第1項記載のフオーカスサ
ーボ装置。
[Claims for Utility Model Registration] (1) In a focus servo device configured to close a focus servo loop in response to the output of a detection means for detecting zero crossing of a focus error signal, An offset means for applying a negative or positive potential offset in advance is provided, and when the detection means detects a zero cross in the process of the actuator approaching the effective range of the focus error signal, the offset is set to approximately zero potential, The focus servo device is further configured to stop applying the offset and close the focus servo loop when the detection means detects a zero cross within the effective range of the focus error signal. (2) When the detection means detects a zero cross in the process of the actuator approaching the effective range of the focus error signal, the approximately zero potential offset applied to the focus error signal is changed to a slightly negative or positive potential. The focus servo device according to claim 1, further comprising an offset means configured to set the focus servo device. (3) The offset means is connected to a negative or positive power supply;
A first resistor, the negative or positive potential offset of which is configured to be applied to the input of a detection means for detecting a zero crossing of a focus error signal. The focus servo device according to item 1. (4) The offset means includes a first offset consisting of a negative or positive power supply and a first resistor, and a second offset provided by the output of the detection means for detecting the zero crossing of the focus error signal and a second resistor. Utility model registration claim 1 characterized in that the utility model is configured to give an offset equal to the sum of the offset of
The focus servo device described in . (5) The offset means includes a first offset consisting of a negative or positive power source and a first resistor, an output of the detection means for detecting the zero crossing of the focus error signal, and a second offset that provides a time constant for the output. 2. The focus servo device according to claim 1, wherein the focus servo device is configured to provide an offset equal to the sum of a second offset consisting of a resistor and a capacitor. (6) Utility model registration claim 1, characterized in that a switch means is provided for stopping the offset application of the offset means based on the detection output when the detection means detects a zero cross within the effective range of the focus error signal. The focus servo device described in .
JP1986088565U 1986-06-12 1986-06-12 Expired JPH0433543Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1986088565U JPH0433543Y2 (en) 1986-06-12 1986-06-12

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1986088565U JPH0433543Y2 (en) 1986-06-12 1986-06-12

Publications (2)

Publication Number Publication Date
JPS62202620U true JPS62202620U (en) 1987-12-24
JPH0433543Y2 JPH0433543Y2 (en) 1992-08-11

Family

ID=30946775

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1986088565U Expired JPH0433543Y2 (en) 1986-06-12 1986-06-12

Country Status (1)

Country Link
JP (1) JPH0433543Y2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0486223U (en) * 1990-11-30 1992-07-27

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62264439A (en) * 1986-05-09 1987-11-17 Sanyo Electric Co Ltd Focus controller

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62264439A (en) * 1986-05-09 1987-11-17 Sanyo Electric Co Ltd Focus controller

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0486223U (en) * 1990-11-30 1992-07-27

Also Published As

Publication number Publication date
JPH0433543Y2 (en) 1992-08-11

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