JPS62202598A - Circuit board device of electronic equipment - Google Patents
Circuit board device of electronic equipmentInfo
- Publication number
- JPS62202598A JPS62202598A JP61044576A JP4457686A JPS62202598A JP S62202598 A JPS62202598 A JP S62202598A JP 61044576 A JP61044576 A JP 61044576A JP 4457686 A JP4457686 A JP 4457686A JP S62202598 A JPS62202598 A JP S62202598A
- Authority
- JP
- Japan
- Prior art keywords
- board
- connector
- bus line
- board unit
- circuit board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000010586 diagram Methods 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- 238000009429 electrical wiring Methods 0.000 description 1
Landscapes
- Combinations Of Printed Boards (AREA)
- Mounting Of Printed Circuit Boards And The Like (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
〈産業上の利用分野〉
本発明は、主として電子計算機システムにおけるメモリ
基板、制御回路基板、ＣＰＵ基板等の複数枚の回路基板
がユニット化された回路基板装置に関するものである。[Detailed Description of the Invention] <Industrial Application Field> The present invention mainly relates to a circuit board device in which a plurality of circuit boards such as a memory board, a control circuit board, and a CPU board are unitized in an electronic computer system. be.
〈従来の技術〉 電子計算機システムにおいては、ＣＰＵ基板。<Conventional technology> In electronic computer systems, the CPU board.
メモリ基板、メモリ制御回路基板等の各種の回路基板が
マザーボードにコネクタにより接続され、このマザーボ
ードにプリント印刷により配線された共通バスラインに
よって各回路基板のそれぞれの信号がバイパスされる回
路基板ユニットが設けられている。Various circuit boards such as a memory board and a memory control circuit board are connected to a motherboard by connectors, and a circuit board unit is provided in which each signal of each circuit board is bypassed by a common bus line printed on this motherboard. It is being
〈発明が解決しようとする問題点〉
ところで、前述の回路基板ユニットのシステム設計に際
し、システム構成的に複数種類を有する場合、このユニ
ットにおける回路基板数が必然的に相違し、それに応じ
て最小構成から最大構成までの各システム構成を設計す
ると、設計効率が極めて悪いものとなり、また、常に最
大システム構成で機構設計しておくと、設計効率は改善
されるが、無駄な構成要素が多くなって極めて不経済で
ある。<Problems to be Solved by the Invention> By the way, when designing a system for the circuit board unit described above, if there are multiple types of system configurations, the number of circuit boards in this unit will inevitably differ, and the minimum configuration will need to be adjusted accordingly. If you design each system configuration from 1 to the maximum configuration, the design efficiency will be extremely poor.Also, if you always design the mechanism with the maximum system configuration, design efficiency will be improved, but you will end up with a lot of unnecessary components. It is extremely uneconomical.
〈発明の目的〉
本発明は、このような問題点に鑑みなされたもので、最
小のシステム構成を標準とした基板ユニットと、拡張さ
れる最大のシステム構成の基板ユニットとに分割し、こ
れら各基板ユニットを必要に応じて容易に接続する構成
とすることにより、前記従来の問題点を解消した電子計
算機システム等の電子機器の回路基板装置を提供するこ
とを目的とするものである。<Object of the Invention> The present invention was made in view of the above problems, and is divided into a board unit with the minimum system configuration as standard and a board unit with the maximum expanded system configuration. It is an object of the present invention to provide a circuit board device for electronic equipment such as a computer system, which solves the above-mentioned conventional problems by having a configuration in which board units can be easily connected as necessary.
〈問題点を解決するための手段〉
本発明の電子機器の回路基板装置は、前記目的を達成す
るために、複数枚の各種回路基板が共通バスラインを有
するマザーボードに取付けられ前記共通バスラインによ
り信号配線されて成る基板ユニットを複数個備え、この
各基板ユニットの各共通バスラインの終端にコネクタを
設け、隣接する２つの基板ユニットの各コネクタ間を接
続するバイパス基板および単一の基板ユニットのコネク
タに取り付く終端抵抗とを備えて成る構成を要旨とする
ものである。<Means for Solving the Problems> In order to achieve the above object, the circuit board device for electronic equipment of the present invention has a plurality of various circuit boards attached to a motherboard having a common bus line. A bypass board and a single board unit are provided with a plurality of board units each having signal wiring, a connector is provided at the end of each common bus line of each board unit, and each connector of two adjacent board units is connected to each other. The gist of the configuration is that it includes a terminating resistor attached to the connector.
く作用〉
前記構成とした本発明の電子機器の回路基板装置は、基
板ユニットを複数個に分割するので、例えば、最小シス
テム構成の標準基板ユニットと機能拡張用の拡張基板ユ
ニットとに分割し、標準基板ユニットのみを用いる場合
には、この基板ユニットのコネクタに終端抵抗を接続し
て共通ノ＼スライン終端におけるバスライン上へのノイ
ズの混入を防止し、一方、両基板ユニ・７トを用いる場
合には、バイパス基板を隣接する両基板ユニ・ントの各
コネクタに接続して両基板ユニ・ノドの共通バスライン
を相互に接続する。Effects> The circuit board device for electronic equipment of the present invention configured as described above divides the board unit into a plurality of parts, so for example, the circuit board unit is divided into a standard board unit with a minimum system configuration and an expansion board unit for functional expansion, When using only the standard board unit, connect a terminating resistor to the connector of this board unit to prevent noise from entering the bus line at the end of the common node line, while using both board units. In this case, the bypass board is connected to each connector of both adjacent board unit nodes, and the common bus lines of both board unit nodes are connected to each other.
〈実施例〉
以下、本発明の好ましい一実施例を図面に従って詳細に
説明する。<Embodiment> Hereinafter, a preferred embodiment of the present invention will be described in detail with reference to the drawings.
第１図は電子計算機システムの内部回路基板に通用した
場合の一実施例を示し、同図において、標準基板ユニッ
ト１は、ＣＰＵ基板、メモリ基板。FIG. 1 shows an embodiment that is applicable to an internal circuit board of a computer system. In the figure, a standard board unit 1 includes a CPU board and a memory board.
メモリ制御回路基板等の最小限の標準構成に相当する各
種回路基板２が、シャーシ（図示せず）に固定されたマ
ザーボード３に縦列に配設したコネクタジャック４に基
板２のコネクタ（図示せず）を挿入接続された構成にな
っている。同様に拡張用基板ユニット５も、各種制御回
路を設けた複数枚の回路基板６が、マザーボード７のコ
ネクタジャック８にそれぞれのコネクタ（図示せず）を
挿入接続された構成になっている。Various circuit boards 2 corresponding to a minimum standard configuration such as a memory control circuit board are connected to connector jacks 4 arranged in tandem on a motherboard 3 fixed to a chassis (not shown) on the board 2 (not shown). ) is inserted and connected. Similarly, the expansion board unit 5 has a configuration in which a plurality of circuit boards 6 each having various control circuits are connected to the connector jack 8 of the motherboard 7 by inserting each connector (not shown) into the connector jack 8 of the motherboard 7.
そして、両マザーボード３．７には、それぞれの回路基
板２，６の各信号をバイパスするための配線、つまりデ
ータバスライン、アドレスバスライン、制御バスライン
等の共通バスライン９．１０が平行にプリント配線され
ている。標準基板ユニット１の共通バスライン９の図に
おける右端には、ブロック形態となった終端抵抗１１が
半田付けされているとともに、図の左端には、各共通バ
スライン９の左端にそれぞれコネクタ端子を半田付けし
て成るコネクタプラグ１２が設けられている。In both motherboards 3.7, wiring for bypassing each signal of each circuit board 2, 6, that is, a common bus line 9.10 such as a data bus line, an address bus line, a control bus line, etc. are connected in parallel. Printed wiring. A terminal resistor 11 in the form of a block is soldered to the right end of the common bus line 9 of the standard board unit 1 in the figure, and a connector terminal is connected to the left end of each common bus line 9 at the left end of the figure. A connector plug 12 is provided which is soldered.
一方、拡張用基板ユニット５の共通バスライン１０の両
端には、前述のコネクタプラグ１２と同一形態のコネク
タプラグ１３．１４がそれぞれ半田付けにより固着され
ている。On the other hand, connector plugs 13 and 14 having the same form as the aforementioned connector plug 12 are fixed to both ends of the common bus line 10 of the expansion board unit 5 by soldering, respectively.
また、両ユニット１，５を接続するためのバイパス基板
１５は、第２図に示すように、基板本体１５ａの両端に
、一対のコネクタジャック１５ｂ。Moreover, the bypass board 15 for connecting both units 1 and 5 has a pair of connector jacks 15b at both ends of the board main body 15a, as shown in FIG.
１５ｃが両ユニット１．５の隣接するコネクタプラグ１
２．１３の間隙に対応して配設されており、基板本体１
５ａには、第３図に示すように両コネクタジャック１５
ｂ、１５Ｃのそれぞれ対応する端子８１〜Ｂｎを接続す
る配線が施されている。15c is the adjacent connector plug 1 of both units 1.5
2. It is arranged corresponding to the gap of 13, and the board body 1
5a has both connector jacks 15 as shown in FIG.
Wiring is provided to connect the corresponding terminals 81 to Bn of B and 15C, respectively.
同図から明らかように、バイパス基板１５の両コネクク
ジャック１５ｂ、１５Ｃをそれぞれ対応する両基板ユニ
ット１．５の各コネクタプラグ１２゜１３に挿入接続す
ることにより、両マザーボード３．７の各共通バスライ
ン９．１０が接続される。As is clear from the figure, by inserting and connecting both the connector jacks 15b and 15C of the bypass board 15 to the respective connector plugs 12 and 13 of the corresponding board units 1.5, each of the common connectors of both the motherboards 3.7 Bus line 9.10 is connected.
そして、前述の終端抵抗１１は、第５図に示すように複
数個の抵抗Ｒａ１〜Ｒａｎ、Ｒｂ１〜Ｒｂｎが接続され
た回路構成に、なっていて、同図および第４図に示すよ
うに、コネクタジャック１６を介して標準基板ユニット
１の右端のコネクタプラグ１７に接続され、この基板ユ
ニットｌの共通バスライン９の終端回路を形成する。ま
た、第４図に示すコネクタジャック１６を備えた終端抵
抗１１は、標準基板ユニット１の右端に固定されたちの
以外に少なくとも１個を用意する。The above-mentioned terminating resistor 11 has a circuit configuration in which a plurality of resistors Ra1 to Ran and Rb1 to Rbn are connected as shown in FIG. 5, and as shown in the same figure and FIG. It is connected to the connector plug 17 at the right end of the standard board unit 1 via the connector jack 16, and forms a termination circuit for the common bus line 9 of this board unit l. Further, at least one terminating resistor 11 equipped with a connector jack 16 shown in FIG. 4 is prepared in addition to the one fixed to the right end of the standard board unit 1.
従って、標準基板ユニットｌのみのシステム構成とする
場合は、終端抵抗１１をコネクタジャック１６を介して
基板ユニット１の左端のコネクタプラグ１２に挿入して
各共通バスライン９を接続すればよい。また、両基板ユ
ニット１，５を用いるシステム構成に拡張する場合には
、バイパス基板１５を、両基板ユニット１．５の隣接す
るコネクタプラグ１２．１３に接続するとともに、拡張
基板ユニット５の他方のコネクタプラグ１４に、終端抵
抗１１をコネクタジャック１６を介して接続すればよい
。Therefore, if the system is configured with only the standard board unit 1, the terminating resistor 11 may be inserted into the connector plug 12 at the left end of the board unit 1 via the connector jack 16 to connect each common bus line 9. In addition, when expanding the system configuration to use both board units 1 and 5, connect the bypass board 15 to the adjacent connector plugs 12.13 of both board units 1.5, and connect the bypass board 15 to the adjacent connector plugs 12.13 of both board units 1.5 and The terminating resistor 11 may be connected to the connector plug 14 via the connector jack 16.
〈発明の効果〉
以上詳述したように本発明の電子機器の回路基板装置に
よると、複数の基板ユニットを備えてこの各基板ユニッ
トの共通バスラインをバイパス基板により断接できると
ともに、単一の基板ユニッ］・の共通バスラインの接続
されない終端に終端抵抗を接続できる構成としたので、
例えば、電子計算機ユニットにおいて標準の基板ユニッ
トと拡張用基板ユニソ）−に分割して必要に応じて両ユ
ニットを接続するようにすれば、システム設計の設計効
率が向上するとともに、無駄な構成要素がなくなる効果
がある。また、バイパス基板および終端抵抗をコネクタ
により接続するようにしたので、断接の都度半田付けす
るような煩雑な作業が解消され、良好な組立性および操
作性を得ることかできる。<Effects of the Invention> As detailed above, according to the circuit board device for electronic equipment of the present invention, a plurality of board units are provided, and the common bus line of each board unit can be connected and disconnected by a bypass board, and a single The configuration allows a terminating resistor to be connected to the unconnected end of the common bus line of the board unit.
For example, if a computer unit is divided into a standard board unit and an expansion board unit (UNIS), and both units are connected as necessary, system design efficiency will improve and unnecessary components will be eliminated. It has the effect of disappearing. Furthermore, since the bypass board and the terminating resistor are connected by a connector, the complicated work of soldering every time they are connected or disconnected is eliminated, and good assemblability and operability can be obtained.
各図面は本発明の電子機器の回路基板装置の一実施例を
示し、第１図は斜視図、第２図および第３図はそれぞれ
バイパス基板の斜視図および接続状態時の電気結線図、
第４図および第５図はそれぞれ終端抵抗の斜視図および
接続状態時の電気結線図である。
１．５一基板ユニツト
２．６−・回路基板
３．７−マザーボード
９．１０−・−共通バスライン
１１−終端抵抗Each drawing shows an embodiment of the circuit board device for electronic equipment of the present invention, in which FIG. 1 is a perspective view, FIGS. 2 and 3 are a perspective view of a bypass board and an electrical connection diagram in a connected state, respectively.
FIG. 4 and FIG. 5 are a perspective view of the terminating resistor and an electrical wiring diagram in a connected state, respectively. 1.5 - Board unit 2.6 - Circuit board 3.7 - Motherboard 9.10 - Common bus line 11 - Termination resistor
Claims (1)
ーボードに取付けられ前記共通バスラインにより信号配
線されて成る基板ユニットを複数個備え、この各基板ユ
ニットの各共通バスラインの終端にコネクタを設け、隣
接する２つの基板ユニットの各コネクタ間を接続するバ
イパス基板および単一の基板ユニットのコネクタに取り
付く終端抵抗とを備えて成る電子機器の回路基板装置。A plurality of board units are provided in which a plurality of various circuit boards are attached to a motherboard having a common bus line, and signals are wired by the common bus line, and a connector is provided at the end of each common bus line of each board unit, and 1. A circuit board device for electronic equipment, comprising: a bypass board that connects connectors of two board units; and a terminating resistor that is attached to a connector of a single board unit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61044576A JPS62202598A (en) | 1986-02-28 | 1986-02-28 | Circuit board device of electronic equipment |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61044576A JPS62202598A (en) | 1986-02-28 | 1986-02-28 | Circuit board device of electronic equipment |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS62202598A true JPS62202598A (en) | 1987-09-07 |
| JPH0567080B2 JPH0567080B2 (en) | 1993-09-24 |
Family
ID=12695331
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61044576A Granted JPS62202598A (en) | 1986-02-28 | 1986-02-28 | Circuit board device of electronic equipment |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62202598A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0274787U (en) * | 1988-11-28 | 1990-06-07 | ||
| US9619000B2 (en) | 2013-05-17 | 2017-04-11 | Nec Corporation | Board, board apparatus and method for interconnection of boards |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57106198A (en) * | 1980-12-24 | 1982-07-01 | Fujitsu Ltd | Wiring system for back panel |
| JPS5894020A (en) * | 1981-11-30 | 1983-06-04 | Fuji Electric Co Ltd | Terminating system of back board signal line |
| JPS58147038U (en) * | 1982-03-25 | 1983-10-03 | 日本電気株式会社 | electronic equipment |
| JPS6029819A (en) * | 1983-07-29 | 1985-02-15 | Hitachi Ltd | Connecting device of signal cable |
| JPS6047385A (en) * | 1983-08-25 | 1985-03-14 | ケル株式会社 | Intermediate connection connector |
-
1986
- 1986-02-28 JP JP61044576A patent/JPS62202598A/en active Granted
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57106198A (en) * | 1980-12-24 | 1982-07-01 | Fujitsu Ltd | Wiring system for back panel |
| JPS5894020A (en) * | 1981-11-30 | 1983-06-04 | Fuji Electric Co Ltd | Terminating system of back board signal line |
| JPS58147038U (en) * | 1982-03-25 | 1983-10-03 | 日本電気株式会社 | electronic equipment |
| JPS6029819A (en) * | 1983-07-29 | 1985-02-15 | Hitachi Ltd | Connecting device of signal cable |
| JPS6047385A (en) * | 1983-08-25 | 1985-03-14 | ケル株式会社 | Intermediate connection connector |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0274787U (en) * | 1988-11-28 | 1990-06-07 | ||
| US9619000B2 (en) | 2013-05-17 | 2017-04-11 | Nec Corporation | Board, board apparatus and method for interconnection of boards |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0567080B2 (en) | 1993-09-24 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EXPY | Cancellation because of completion of term |