JPS62201859U - - Google Patents

Info

Publication number
JPS62201859U
JPS62201859U JP9145886U JP9145886U JPS62201859U JP S62201859 U JPS62201859 U JP S62201859U JP 9145886 U JP9145886 U JP 9145886U JP 9145886 U JP9145886 U JP 9145886U JP S62201859 U JPS62201859 U JP S62201859U
Authority
JP
Japan
Prior art keywords
memory
control
initial value
control variable
variable data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9145886U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP9145886U priority Critical patent/JPS62201859U/ja
Publication of JPS62201859U publication Critical patent/JPS62201859U/ja
Pending legal-status Critical Current

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  • Techniques For Improving Reliability Of Storages (AREA)
  • Retry When Errors Occur (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

添付図面は本考案の制御データメモリーの初期
値設定装置の実施例を示し、第１図は要部のブロ
ツク図、第２図は動作順序を示すフローチヤート
図、第３図および第４図は第１図のＲＡＭ及びＲ
ＯＭのアドレスマツプ図、第５図はデイジタルＶ
ＴＲの音声処理系の要部ブロツク図である。 なお図面に用いた符号において、１……ＲＡＭ
、２……ＲＯＭ、３……バツクアツプ回路、４…
…バツクアツプエリア、５……イニシヤル値エリ
ア、６……ＣＰＵ、７……リセツト回路、８……
リセツト釦、９……パワースイツチ、１０……初
期値設定スイツチ、１１……入力ポート、１２…
…バス、１５……ワークエリア、１６……ＲＯＭ
エリア、１７……音声処理系、１８……デイジタ
ルボリユーム、２０……処理回路、２２……デイ
ジタルボリユーム、２３……システムコントロー
ラ、Ｉ……イニシヤル値である。 The accompanying drawings show an embodiment of the control data memory initial value setting device of the present invention, in which FIG. 1 is a block diagram of the main parts, FIG. 2 is a flowchart showing the operation sequence, and FIGS. 3 and 4 are RAM and R in Figure 1
OM address map diagram, Figure 5 is the digital V
FIG. 2 is a block diagram of the main parts of the sound processing system of the TR. In addition, in the symbols used in the drawings, 1...RAM
, 2...ROM, 3...backup circuit, 4...
...Backup area, 5...Initial value area, 6...CPU, 7...Reset circuit, 8...
Reset button, 9...Power switch, 10...Initial value setting switch, 11...Input port, 12...
...Bus, 15...Work area, 16...ROM
Area, 17...Audio processing system, 18...Digital volume, 20...Processing circuit, 22...Digital volume, 23...System controller, I...Initial value.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 機器の動作に必要な制御変数データを保持する
ための書込み、消去可能な不揮発領域を備えた制
御データメモリーと、上記制御変数データの初期
値を記憶した読出し専用メモリーと、初期値設定
用の操作スイツチと、この操作スイツチが操作さ
れたときに上記読出し専用メモリーの初期値を上
記制御データメモリーの制御変数データの記憶領
域に書込み手段とを機器内に備える制御データメ
モリーの初期値設定装置。 A control data memory with a writable and erasable non-volatile area for holding the control variable data necessary for the operation of the equipment, a read-only memory that stores the initial values of the control variable data, and operations for setting the initial values. An initial value setting device for a control data memory, comprising a switch and means for writing the initial value of the read-only memory into a control variable data storage area of the control data memory when the operation switch is operated.
JP9145886U 1986-06-16 1986-06-16 Pending JPS62201859U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9145886U JPS62201859U (en) 1986-06-16 1986-06-16

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9145886U JPS62201859U (en) 1986-06-16 1986-06-16

Publications (1)

Publication Number Publication Date
JPS62201859U true JPS62201859U (en) 1987-12-23

Family

ID=30952258

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9145886U Pending JPS62201859U (en) 1986-06-16 1986-06-16

Country Status (1)

Country Link
JP (1) JPS62201859U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02159613A (en) * 1988-12-13 1990-06-19 Nec Corp Microcomputer

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5719447A (en) * 1980-07-07 1982-02-01 Riken Keikinzoku Kogyo Kk Coping
JPS60132250A (en) * 1983-12-21 1985-07-15 Yamatake Honeywell Co Ltd Restarting method of control device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5719447A (en) * 1980-07-07 1982-02-01 Riken Keikinzoku Kogyo Kk Coping
JPS60132250A (en) * 1983-12-21 1985-07-15 Yamatake Honeywell Co Ltd Restarting method of control device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02159613A (en) * 1988-12-13 1990-06-19 Nec Corp Microcomputer

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