JPS62198597U - - Google Patents

Info

Publication number
JPS62198597U
JPS62198597U JP8714886U JP8714886U JPS62198597U JP S62198597 U JPS62198597 U JP S62198597U JP 8714886 U JP8714886 U JP 8714886U JP 8714886 U JP8714886 U JP 8714886U JP S62198597 U JPS62198597 U JP S62198597U
Authority
JP
Japan
Prior art keywords
power supply
static ram
diode
external power
prevent backflow
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8714886U
Other languages
Japanese (ja)
Other versions
JPH0249040Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP8714886U priority Critical patent/JPH0249040Y2/ja
Publication of JPS62198597U publication Critical patent/JPS62198597U/ja
Application granted granted Critical
Publication of JPH0249040Y2 publication Critical patent/JPH0249040Y2/ja
Expired legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案を適用したメモリカセツトの回
路図、第2図は同メモリカセツトにおける電源端
子電圧とチツプセレクト信号入力端子電圧との関
係を示す図、第3図はS―RAMのチツプセレク
ト信号入力端子電圧を制御するための回路の一例
を示す図である。 1…スタテイツクRAM、2…内部電池、3,
6,7,8…ダイオード、5…外部電源。
Fig. 1 is a circuit diagram of a memory cassette to which the present invention is applied, Fig. 2 is a diagram showing the relationship between the power supply terminal voltage and chip select signal input terminal voltage in the same memory cassette, and Fig. 3 is a diagram showing the S-RAM chip select signal. FIG. 3 is a diagram showing an example of a circuit for controlling signal input terminal voltage. 1...Static RAM, 2...Internal battery, 3,
6, 7, 8...Diode, 5...External power supply.

Claims (1)

【実用新案登録請求の範囲】 スタテイツクRAMと、 外部電源に前記スタテイツクRAMの電源端子
を逆流防止して接続するためのダイオードと、 前記外部電源に前記スタテイツクRAMのチツ
プセレクト信号入力端子を逆流防止して接続する
ための直列接続した少なくとも2つのダイオード
とを具えたことを特徴とするメモリ装置。
[Scope of Claim for Utility Model Registration] A static RAM, a diode for connecting a power supply terminal of the static RAM to an external power supply to prevent backflow, and a diode for connecting a chip select signal input terminal of the static RAM to the external power supply to prevent backflow. and at least two diodes connected in series for connection.
JP8714886U 1986-06-10 1986-06-10 Expired JPH0249040Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8714886U JPH0249040Y2 (en) 1986-06-10 1986-06-10

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8714886U JPH0249040Y2 (en) 1986-06-10 1986-06-10

Publications (2)

Publication Number Publication Date
JPS62198597U true JPS62198597U (en) 1987-12-17
JPH0249040Y2 JPH0249040Y2 (en) 1990-12-21

Family

ID=30944106

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8714886U Expired JPH0249040Y2 (en) 1986-06-10 1986-06-10

Country Status (1)

Country Link
JP (1) JPH0249040Y2 (en)

Also Published As

Publication number Publication date
JPH0249040Y2 (en) 1990-12-21

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