JPS62198143A - Lead frame - Google Patents

Lead frame

Info

Publication number
JPS62198143A
JPS62198143A JP4103086A JP4103086A JPS62198143A JP S62198143 A JPS62198143 A JP S62198143A JP 4103086 A JP4103086 A JP 4103086A JP 4103086 A JP4103086 A JP 4103086A JP S62198143 A JPS62198143 A JP S62198143A
Authority
JP
Japan
Prior art keywords
lead
solder
shape
lead frame
outer lead
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4103086A
Other languages
Japanese (ja)
Inventor
Hideaki Yaguchi
矢口　秀昭
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinko Electric Industries Co Ltd
Original Assignee
Shinko Electric Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinko Electric Industries Co Ltd filed Critical Shinko Electric Industries Co Ltd
Priority to JP4103086A priority Critical patent/JPS62198143A/en
Publication of JPS62198143A publication Critical patent/JPS62198143A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H01L23/49548—Cross section geometry
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3447—Lead-in-hole components

Abstract

PURPOSE:To effectively solder a lead frame by forming the sectional shape of an outer lead in the shape that melted solder is substantially uniformly bonded over the entire periphery. CONSTITUTION:When the sectional shape of an outer lead 1 is formed in a circular shape or elliptical shape near the circular shape, the influences of the surface tension and the wettability of the melted solder 2 become substantially uniform over the entire periphery of the lead 1 so that the solder 2 is uniformly bonded. Therefore, the lead 1 becomes substantially equal to the profile in the circular connection hole of a printed substrate, has good bondability with the hole and is soldered uniformly over the entire periphery.

Description

【発明の詳細な説明】 （産業上の利用分野〕 本発明は半導体チップと外部端子笠を電気的に接続する
リードフレームに関する。DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a lead frame for electrically connecting a semiconductor chip and an external terminal cap.

〔従来技術とその問題点〕[Prior art and its problems]

一般にリードフレームは、半導体チップと電気的に接続
される多数のインナーリードと、外部回路と接続される
多数の７ウターリードとを有している。例えば樹脂封止
型半導体装置に用いられるリードフレームでは、一方の
インナーリードは、半導体チップとワイヤボンディング
により接続された後に、その半導体チップと一緒に樹脂
モールドされる。他方のアウターリードは、前記樹脂モ
ールドが終了した後に、例えばプリント基板の円形をし
た所定の接続孔中に挿入され、溶融しているはんだ中に
浸漬した後に引き上げられてはんだ付けされる。Generally, a lead frame has a large number of inner leads that are electrically connected to a semiconductor chip and a large number of seven outer leads that are connected to an external circuit. For example, in a lead frame used in a resin-sealed semiconductor device, one inner lead is connected to a semiconductor chip by wire bonding, and then resin-molded together with the semiconductor chip. After the resin molding is completed, the other outer lead is inserted into, for example, a predetermined circular connection hole of a printed circuit board, immersed in molten solder, and then pulled up and soldered.

ところが、これらのリードフレームは帯状の基材にプレ
ス加工によって打扱き成形されたものであるから、イン
ナーリードおよびアウターリードの打抜き下面側にだれ
が発生し、打広き上面側にかえりすなわち成形ばりが生
じてしまう。However, since these lead frames are formed by stamping on a band-shaped base material by press working, sagging occurs on the lower surface of the punched inner and outer leads, and burrs, that is, molding burrs, occur on the upper surface of the punched area. It will happen.

一方のインナーリードの場合には、成形ばりがモールド
樹脂のクランク発生の゛原因となるので、成形ぼり部分
を再度プレス加工してＣ面状に面取り等を施すことが提
案されている。In the case of the inner lead, molding burrs cause cranking of the molded resin, so it has been proposed that the molding burrs be pressed again and be chamfered into a C-face shape.

他方の７ウターリード１の場合には、第３図に示すよう
に溶融しているはんだ中に浸漬し引き上げた時にアウタ
ーリード１の外周に付着しているはんだ２は、アウター
リード１のだれ部３とばつ部４の部分で少量となり、ア
ウターリード１の平面部には多量となっている。これは
溶融しているはんだ２の表面張力や、アウターリード１
の材質と溶融しているはんだ２との濡れ性の影響により
、だれ部３やばり部４のように曲率半径の小さい部分に
はばんだ２が逃げて少量しか付着し得ないからである。In the case of the other 7 outer leads 1, as shown in FIG. A small amount is present at the flange portion 4, and a large amount is present at the flat portion of the outer lead 1. This is due to the surface tension of the molten solder 2 and the outer lead 1.
This is because, due to the influence of the wettability between the material and the molten solder 2, the solder 2 escapes and only a small amount of solder 2 can adhere to portions with a small radius of curvature, such as the sag portion 3 and the burr portion 4.

ばり部４の先端部にははんだ２が全く付着していない場
合もある。In some cases, no solder 2 is attached to the tip of the burr 4 at all.

この状態のアウターリード１をプリント基板にはんだ付
けすると、アウターリード１の全周に亘って均一にはん
だ付けされないおそれがあり、特にだれ部３およびばり
部４の部分ではんだ付は不十分なことがあり、ひいては
導通不良を起すおそれがあった。If the outer lead 1 in this state is soldered to a printed circuit board, there is a risk that the soldering will not be uniform over the entire circumference of the outer lead 1, and in particular, the soldering may not be sufficient at the sagging portion 3 and the burr portion 4. This may lead to poor conduction.

このため、アウターリード１のばり部４をインナーリー
ドと同様にプレスで再成形してＣ面状に面取り（Ｃ面取
り）形成することが提案されているが、０面としてもだ
れ部３と同様にはんだ２が逃げてしまうので、結局アウ
ターリード１の全周に亘ってはんだ２を均一に付着させ
ることができなかった。For this reason, it has been proposed to reshape the burr portion 4 of the outer lead 1 using a press in the same way as the inner lead and form a C-face chamfer (C-chamfer). Since the solder 2 escaped, it was not possible to apply the solder 2 uniformly over the entire circumference of the outer lead 1.

〔発明の目的〕[Purpose of the invention]

本発明はこれらの点に鑑みてなされたものであり、溶融
したはんだを全周に亘ってほぼ均一に付着させることが
でき、導通不良等を起すことなく確実にはんだ付けする
ことができ、外部回路との接続の信頼性が極めて高いリ
ードフレームを提供することを目的とする。The present invention has been made in view of these points, and it is possible to apply molten solder almost uniformly over the entire circumference, and it is possible to reliably solder without causing conductivity defects, etc. The purpose of the present invention is to provide a lead frame that has extremely high reliability in connection with a circuit.

〔発明の概要〕[Summary of the invention]

本発明のリードフレームは、アウターリードの断面形状
を、溶融しているはんだが全周に亘ってほぼ均一に付着
する形に形成したことを特徴とする。The lead frame of the present invention is characterized in that the cross-sectional shape of the outer lead is formed such that molten solder adheres almost uniformly over the entire circumference.

〔発明の実施例〕[Embodiments of the invention]

以下、本発明の実施例を第１図および第２図について説
明する。Embodiments of the present invention will be described below with reference to FIGS. 1 and 2.

本実施例においては、第１図に示すように、アウターリ
ード１の断面形状を楕円形に形成している。In this embodiment, as shown in FIG. 1, the outer lead 1 has an elliptical cross-sectional shape.

すなわち、溶融しているはんだ２をアウターリード１の
外周に均一に付着させるには、溶融しているはんだ２の
表面張力や濡れ性の影響がアウターリード１の外周全体
に亘ってほぼ均一となればよい。そのためにはアウター
リード１の断面形状を円形または円形に近い楕円形に形
成すればよい。That is, in order to uniformly adhere the molten solder 2 to the outer periphery of the outer lead 1, the influence of the surface tension and wettability of the molten solder 2 must be almost uniform over the entire outer periphery of the outer lead 1. Bye. For this purpose, the cross-sectional shape of the outer lead 1 may be formed into a circular shape or an elliptical shape close to a circular shape.

これにより、第１図に示すように、アウターリード１の
外周全体に亘ってはんだ２がほぼ均一に付着する。従っ
て、本実施例のアウターリード１はプリント基板の円形
の接続孔と外形もほぼ等しくなり、接続孔との密着性も
よくなり、全周に亘って均一にはんだ付けされることと
なる。よって、導通不良を起すこともなくなり、接続が
確実強固となるため振動等の外力に対しても良好な接続
状態を保持することができ、外部回路との接続の信頼性
も高くなる。As a result, as shown in FIG. 1, the solder 2 adheres almost uniformly over the entire outer periphery of the outer lead 1. Therefore, the outer lead 1 of this embodiment has an outer shape that is almost the same as the circular connection hole of the printed circuit board, has good adhesion to the connection hole, and can be soldered uniformly over the entire circumference. Therefore, there is no possibility of conduction failure, and the connection is reliably strong, so that a good connection state can be maintained even against external forces such as vibration, and the reliability of the connection with an external circuit is also increased.

第２図はアウターリード１を楕円系に成形する加工方法
の一例を示している。FIG. 2 shows an example of a processing method for forming the outer lead 1 into an elliptical shape.

本実施例においては、上部に図示したような従来と同様
にして形成しただれ部３およびばり部４を有する偏平な
アウターリード１を、中間部に図示したような半円形の
矯正凹部６を有する割型５によって、挟圧しながらプレ
スすることにより、下部に図示したような断面楕円形の
７ウターリード１を成形することができる。In this embodiment, a flat outer lead 1 has a sagging portion 3 and a burr portion 4 formed in the same way as in the conventional example as shown in the upper part, and a semicircular correction recess 6 as shown in the middle part. By pressing with the split mold 5 while compressing, it is possible to form the seven outer reeds 1 having an oval cross section as shown in the lower part.

〔発明の効果〕〔Effect of the invention〕

このように本発明のリードフレームにおけるアウターリ
ードは構成され作用するものであるから、溶融したはん
だを全周に亘ってほぼ均一に付着させることができ、導
通不良等を起すことなく確実にはんだ付けすることがで
き、外部回路との接続の信頼性も極めて高いものとなる
等の効果を奏する。Since the outer leads in the lead frame of the present invention are structured and function as described above, molten solder can be applied almost uniformly over the entire circumference, and soldering can be performed reliably without causing conductivity defects. This has advantages such as extremely high reliability of connection with external circuits.

【図面の簡単な説明】[Brief explanation of drawings]

第１図は本発明のリードフレームの７ウターリードの一
実施例を示す断面図、第２図は本発明の７ウターリード
の加工方法を示す斜視図、第３図は従来例を示す断面図
である。 １・・・アウターリード、２・・・はんだ、３・・・だ
れ部、４・・・ばり部。 図面 第　　　１　　　図 第　　　３　　　図 上 第　　　２　　　図FIG. 1 is a sectional view showing an embodiment of the seven outer leads of the lead frame of the present invention, FIG. 2 is a perspective view showing a method of processing the seven outer leads of the present invention, and FIG. 3 is a cross sectional view showing a conventional example. . 1... Outer lead, 2... Solder, 3... Drop part, 4... Burr part. Drawings Figure 1 Figure 3 Upper Figure 2

Claims (1)

【特許請求の範囲】 １）リードフレームのアウターリードの断面形状を、溶
融しているはんだが全周に亘つてほぼ均一に付着する形
に形成したことを特徴とするリードフレーム。 ２）アウターリードの断面形状を円形または楕円形に形
成したことを特徴とする特許請求の範囲第１項記載のリ
ードフレーム。[Scope of Claims] 1) A lead frame characterized in that the cross-sectional shape of the outer lead of the lead frame is formed in such a shape that molten solder adheres almost uniformly over the entire circumference. 2) The lead frame according to claim 1, wherein the outer lead has a circular or elliptical cross-sectional shape.
JP4103086A 1986-02-26 1986-02-26 Lead frame Pending JPS62198143A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4103086A JPS62198143A (en) 1986-02-26 1986-02-26 Lead frame

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4103086A JPS62198143A (en) 1986-02-26 1986-02-26 Lead frame

Publications (1)

Publication Number Publication Date
JPS62198143A true JPS62198143A (en) 1987-09-01

Family

ID=12596998

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4103086A Pending JPS62198143A (en) 1986-02-26 1986-02-26 Lead frame

Country Status (1)

Country Link
JP (1) JPS62198143A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01216563A (en) * 1988-02-25 1989-08-30 Mitsui High Tec Inc Manufacture of lead frame
JPH0677374A (en) * 1992-08-27 1994-03-18 Nec Corp Lead for semiconductor device and manufacture thereof
JP2001230453A (en) * 1999-12-08 2001-08-24 Nichia Chem Ind Ltd Led lamp and its manufacturing method
JP2012160517A (en) * 2011-01-31 2012-08-23 Mitsubishi Electric Corp Manufacturing method of semiconductor device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01216563A (en) * 1988-02-25 1989-08-30 Mitsui High Tec Inc Manufacture of lead frame
JPH0677374A (en) * 1992-08-27 1994-03-18 Nec Corp Lead for semiconductor device and manufacture thereof
JP2001230453A (en) * 1999-12-08 2001-08-24 Nichia Chem Ind Ltd Led lamp and its manufacturing method
JP2012160517A (en) * 2011-01-31 2012-08-23 Mitsubishi Electric Corp Manufacturing method of semiconductor device
US8518751B2 (en) 2011-01-31 2013-08-27 Mitsubishi Electric Corporation Method for manufacturing semiconductor device including removing a resin burr

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